374 lines
13 KiB
C
374 lines
13 KiB
C
//*****************************************************************************
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//
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// am_hal_mcuctrl.h
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//! @file
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//!
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//! @brief Functions for accessing and configuring the MCUCTRL.
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//!
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//! @addtogroup mcuctrl3p MCU Control (MCUCTRL)
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//! @ingroup apollo3phal
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2020, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// Third party software included in this distribution is subject to the
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// additional license terms as defined in the /docs/licenses directory.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#ifndef AM_HAL_MCUCTRL_H
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#define AM_HAL_MCUCTRL_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//
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// Designate this peripheral.
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//
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#define AM_APOLLO3_MCUCTRL 1
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//*****************************************************************************
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//
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// Chip Revision IDentification.
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//
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//*****************************************************************************
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#define APOLLO3P \
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((MCUCTRL->CHIPREV & \
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(MCUCTRL_CHIPREV_REVMAJ_Msk | MCUCTRL_CHIPREV_REVMIN_Msk)) == \
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(_VAL2FLD(MCUCTRL_CHIPREV_REVMAJ, MCUCTRL_CHIPREV_REVMAJ_C) | \
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_VAL2FLD(MCUCTRL_CHIPREV_REVMIN, MCUCTRL_CHIPREV_REVMIN_REV0)))
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#define APOLLO3_B0 \
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((MCUCTRL->CHIPREV & \
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(MCUCTRL_CHIPREV_REVMAJ_Msk | MCUCTRL_CHIPREV_REVMIN_Msk)) == \
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(_VAL2FLD(MCUCTRL_CHIPREV_REVMAJ, MCUCTRL_CHIPREV_REVMAJ_B) | \
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_VAL2FLD(MCUCTRL_CHIPREV_REVMIN, MCUCTRL_CHIPREV_REVMIN_REV0)))
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#define APOLLO3_A1 \
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((MCUCTRL->CHIPREV & \
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(MCUCTRL_CHIPREV_REVMAJ_Msk | MCUCTRL_CHIPREV_REVMIN_Msk)) == \
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(_VAL2FLD(MCUCTRL_CHIPREV_REVMAJ, MCUCTRL_CHIPREV_REVMAJ_A) | \
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_VAL2FLD(MCUCTRL_CHIPREV_REVMIN, MCUCTRL_CHIPREV_REVMIN_REV1)))
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#define APOLLO3_A0 \
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((MCUCTRL->CHIPREV & \
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(MCUCTRL_CHIPREV_REVMAJ_Msk | MCUCTRL_CHIPREV_REVMIN_Msk)) == \
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(_VAL2FLD(MCUCTRL_CHIPREV_REVMAJ, MCUCTRL_CHIPREV_REVMAJ_A) | \
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_VAL2FLD(MCUCTRL_CHIPREV_REVMIN, MCUCTRL_CHIPREV_REVMIN_REV0)))
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//
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// Determine if >= a given revision level.
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//
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#define APOLLO3_GE_B0 \
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((MCUCTRL->CHIPREV & \
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(MCUCTRL_CHIPREV_REVMAJ_Msk | MCUCTRL_CHIPREV_REVMIN_Msk)) >= \
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(_VAL2FLD(MCUCTRL_CHIPREV_REVMAJ, MCUCTRL_CHIPREV_REVMAJ_B) | \
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_VAL2FLD(MCUCTRL_CHIPREV_REVMIN, MCUCTRL_CHIPREV_REVMIN_REV0)))
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#define APOLLO3_GE_A1 \
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((MCUCTRL->CHIPREV & \
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(MCUCTRL_CHIPREV_REVMAJ_Msk | MCUCTRL_CHIPREV_REVMIN_Msk)) >= \
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(_VAL2FLD(MCUCTRL_CHIPREV_REVMAJ, MCUCTRL_CHIPREV_REVMAJ_A) | \
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_VAL2FLD(MCUCTRL_CHIPREV_REVMIN, MCUCTRL_CHIPREV_REVMIN_REV1)))
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//*****************************************************************************
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//
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// MCUCTRL specific definitions.
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//
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//*****************************************************************************
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#define AM_HAL_MCUCTRL_CHIPPN_FLASH_SIZE_N ((MCUCTRL_CHIPPN_PARTNUM_FLASHSIZE_M >> MCUCTRL_CHIPPN_PARTNUM_FLASHSIZE_S) + 1)
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#define AM_HAL_MCUCTRL_CHIPPN_SRAM_SIZE_N ((MCUCTRL_CHIPPN_PARTNUM_SRAMSIZE_M >> MCUCTRL_CHIPPN_PARTNUM_SRAMSIZE_S) + 1)
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//*****************************************************************************
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//
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// MCUCTRL enumerations
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//
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//*****************************************************************************
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//**************************************
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//! MCUCTRL control operations
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//**************************************
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typedef enum
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{
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AM_HAL_MCUCTRL_CONTROL_FAULT_CAPTURE_ENABLE,
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AM_HAL_MCUCTRL_CONTROL_FAULT_CAPTURE_DISABLE,
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AM_HAL_MCUCTRL_CONTROL_EXTCLK32K_ENABLE,
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AM_HAL_MCUCTRL_CONTROL_EXTCLK32K_DISABLE,
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AM_HAL_MCUCTRL_CONTROL_SRAM_PREFETCH
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} am_hal_mcuctrl_control_e;
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//**************************************
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//! MCUCTRL info get
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//**************************************
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typedef enum
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{
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AM_HAL_MCUCTRL_INFO_FEATURES_AVAIL,
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AM_HAL_MCUCTRL_INFO_DEVICEID,
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AM_HAL_MCUCTRL_INFO_FAULT_STATUS
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} am_hal_mcuctrl_infoget_e;
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//**************************************
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//! MCUCTRL SRAM prefetch settings
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//!
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//! Prefetch settings are made via a call to:
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//! am_hal_mcuctrl_control(AM_HAL_MCUCTRL_CONTROL_SRAM_PREFETCH,
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//! &ui32PrefetchSetting);
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//!
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//! The settings may be logically ORed together to obtain the desired settings.
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//!
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//! Notes:
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//! - NOPREFETCH settings override PREFETCH settings if both are provided.
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//! For example, calling with both PREFETCH_INSTR and NOPREFETCH_INSTR
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//! will result in instruction prefetch being disabled.
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//! - When executing from SRAM, it is recommended that the PREFETCH_INSTR and
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//! PREFETCH_INSTRCACHE bits be set.
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//! - It is generally okay to have PREFETCH_INSTR & PREFETCH_INSTRCACHE enabled
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//! even if no SRAM execution is expected.
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//! - It is generally not recommended that data prefetch be enabled unless the
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//! work flow has a large number of sequential accesses.
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//! - Setting PREFETCH_INSTRCACHE requires PREFETCH_INSTR. This is enforced by
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//! the function and an error is returned if both are not being set or if
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//! PREFETCH_INSTR is not already set in the register.
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//! - Setting PREFETCH_DATACACHE requires PREFETCH_DATA. This is enforced by
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//! the function. An error is returned if both are not being set or if
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//! PREFETCH_DATA is not already set in the register.
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//**************************************
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#define SRAM_NOPREFETCH_Pos 16
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#define AM_HAL_MCUCTRL_SRAM_PREFETCH_INSTR (MCUCTRL_SRAMMODE_IPREFETCH_Msk << 0)
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#define AM_HAL_MCUCTRL_SRAM_PREFETCH_INSTRCACHE (MCUCTRL_SRAMMODE_IPREFETCH_CACHE_Msk << 0)
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#define AM_HAL_MCUCTRL_SRAM_PREFETCH_DATA (MCUCTRL_SRAMMODE_DPREFETCH_Msk << 0)
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#define AM_HAL_MCUCTRL_SRAM_PREFETCH_DATACACHE (MCUCTRL_SRAMMODE_DPREFETCH_CACHE_Msk << 0)
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#define AM_HAL_MCUCTRL_SRAM_NOPREFETCH_INSTR (MCUCTRL_SRAMMODE_IPREFETCH_Msk << SRAM_NOPREFETCH_Pos)
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#define AM_HAL_MCUCTRL_SRAM_NOPREFETCH_INSTRCACHE (MCUCTRL_SRAMMODE_IPREFETCH_CACHE_Msk << SRAM_NOPREFETCH_Pos)
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#define AM_HAL_MCUCTRL_SRAM_NOPREFETCH_DATA (MCUCTRL_SRAMMODE_DPREFETCH_Msk << SRAM_NOPREFETCH_Pos)
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#define AM_HAL_MCUCTRL_SRAM_NOPREFETCH_DATACACHE (MCUCTRL_SRAMMODE_DPREFETCH_CACHE_Msk << SRAM_NOPREFETCH_Pos)
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//*****************************************************************************
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//
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// MCUCTRL data structures
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//
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//*****************************************************************************
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//**************************************
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//! MCUCTRL device structure
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//**************************************
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typedef struct
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{
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//
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//! Device part number. (BCD format)
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//
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uint32_t ui32ChipPN;
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//
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//! Unique Chip ID 0.
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//
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uint32_t ui32ChipID0;
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//
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//! Unique Chip ID 1.
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//
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uint32_t ui32ChipID1;
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//
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//! Chip Revision.
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//
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uint32_t ui32ChipRev;
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//
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//! Vendor ID.
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//
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uint32_t ui32VendorID;
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//
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//! SKU (Apollo3).
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//
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uint32_t ui32SKU;
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//
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//! Qualified chip.
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//
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uint32_t ui32Qualified;
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//
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//! Flash Size.
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//
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uint32_t ui32FlashSize;
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//
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//! SRAM Size.
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//
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uint32_t ui32SRAMSize;
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//
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// JEDEC chip info
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//
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uint32_t ui32JedecPN;
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uint32_t ui32JedecJEPID;
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uint32_t ui32JedecCHIPREV;
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uint32_t ui32JedecCID;
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}
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am_hal_mcuctrl_device_t;
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//**************************************
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//! MCUCTRL fault structure
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//**************************************
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typedef struct
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{
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//
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//! ICODE bus fault occurred.
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//
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bool bICODE;
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//
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//! ICODE bus fault address.
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//
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uint32_t ui32ICODE;
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//
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//! DCODE bus fault occurred.
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//
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bool bDCODE;
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//
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//! DCODE bus fault address.
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//
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uint32_t ui32DCODE;
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//
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//! SYS bus fault occurred.
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//
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bool bSYS;
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//
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//! SYS bus fault address.
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//
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uint32_t ui32SYS;
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}
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am_hal_mcuctrl_fault_t;
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//**************************************
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//! MCUCTRL status structure
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//**************************************
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typedef struct
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{
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bool bBurstAck; // FEATUREENABLE
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bool bBLEAck; // "
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bool bDebuggerLockout; // DEBUGGER
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bool bADCcalibrated; // ADCCAL
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bool bBattLoadEnabled; // ADCBATTLOAD
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uint8_t bSecBootOnWarmRst; // BOOTLOADER
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uint8_t bSecBootOnColdRst; // "
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} am_hal_mcuctrl_status_t;
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//**************************************
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//! MCUCTRL features available structure
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//**************************************
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typedef struct
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{
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bool bBurstAvail; // FEATUREENABLE
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bool bBLEavail; // "
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bool bBLEFeature; // SKU
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bool bBurstFeature; // "
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uint8_t ui8SecBootFeature; // BOOTLOADER
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} am_hal_mcuctrl_feature_t;
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// ****************************************************************************
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//
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//! @brief Apply various specific commands/controls on the MCUCTRL module.
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//!
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//! This function is used to apply various controls to MCUCTRL.
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//!
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//! @param eControl - One of the following:
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//! AM_HAL_MCUCTRL_CONTROL_FAULT_CAPTURE_ENABLE
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//! AM_HAL_MCUCTRL_CONTROL_FAULT_CAPTURE_DISABLE
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//! AM_HAL_MCUCTRL_CONTROL_EXTCLK32K_ENABLE
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//! AM_HAL_MCUCTRL_CONTROL_EXTCLK32K_DISABLE
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//! AM_HAL_MCUCTRL_CONTROL_SRAM_PREFETCH
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//!
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//! @return status - generic or interface specific status.
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//
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// ****************************************************************************
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extern uint32_t am_hal_mcuctrl_control(am_hal_mcuctrl_control_e eControl,
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void *pArgs);
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// ****************************************************************************
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//
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//! @brief MCUCTRL status function
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//!
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//! This function returns current status of the MCUCTRL as obtained from
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//! various registers of the MCUCTRL block.
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//!
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//! @param psStatus - ptr to a status structure to receive the current statuses.
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//!
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//! @return status - generic or interface specific status.
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//
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// ****************************************************************************
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extern uint32_t am_hal_mcuctrl_status_get(am_hal_mcuctrl_status_t *psStatus);
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// ****************************************************************************
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//
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//! @brief Get information of the given MCUCTRL item.
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//!
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//! This function returns a data structure of information regarding the given
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//! MCUCTRL parameter.
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//!
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//! @param eInfoGet - One of the following: Return structure type:
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//! AM_HAL_MCUCTRL_INFO_DEVICEID, psDevice
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//! AM_HAL_MCUCTRL_INFO_FAULT_STATUS psFault
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//!
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//! @param pInfo - A pointer to a structure to receive the return data,
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//! the type of which is dependent on the eInfo parameter.
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//!
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//! @return status - generic or interface specific status.
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//
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// ****************************************************************************
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extern uint32_t am_hal_mcuctrl_info_get(am_hal_mcuctrl_infoget_e eInfoGet,
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void *pInfo);
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#ifdef __cplusplus
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}
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#endif
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#endif // AM_HAL_MCUCTRL_H
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//*****************************************************************************
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//
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// End Doxygen group.
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//! @}
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//
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//*****************************************************************************
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