367 lines
13 KiB
C
367 lines
13 KiB
C
//*****************************************************************************
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//
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// am_hal_clkgen.h
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//! @file
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//!
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//! @brief Functions for accessing and configuring the CLKGEN.
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//!
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//! @addtogroup clkgen3 Clock Generator (CLKGEN)
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//! @ingroup apollo3hal
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2020, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// Third party software included in this distribution is subject to the
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// additional license terms as defined in the /docs/licenses directory.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#ifndef AM_HAL_CLKGEN_H
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#define AM_HAL_CLKGEN_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//
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// Designate this peripheral.
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//
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#define AM_APOLLO3_CLKGEN 1
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//*****************************************************************************
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//
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//! @name System Clock max frequency
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//! @brief Defines the maximum clock frequency for this device.
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//!
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//! These macros provide a definition of the maximum clock frequency.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_CLKGEN_FREQ_MAX_HZ 48000000
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#define AM_HAL_CLKGEN_FREQ_MAX_KHZ (AM_HAL_CLKGEN_FREQ_MAX_HZ / 1000)
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#define AM_HAL_CLKGEN_FREQ_MAX_MHZ (AM_HAL_CLKGEN_FREQ_MAX_HZ / 1000000)
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#define AM_HAL_CLKGEN_CORESEL_MAXDIV 1
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//! @}
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//
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// Control operations.
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//
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typedef enum
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{
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AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX,
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AM_HAL_CLKGEN_CONTROL_XTAL_START,
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AM_HAL_CLKGEN_CONTROL_LFRC_START,
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AM_HAL_CLKGEN_CONTROL_XTAL_STOP,
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AM_HAL_CLKGEN_CONTROL_LFRC_STOP,
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AM_HAL_CLKGEN_CONTROL_SYSCLK_DIV2,
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AM_HAL_CLKGEN_CONTROL_RTC_SEL_XTAL,
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AM_HAL_CLKGEN_CONTROL_RTC_SEL_LFRC,
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AM_HAL_CLKGEN_CONTROL_HFADJ_ENABLE,
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AM_HAL_CLKGEN_CONTROL_HFADJ_DISABLE,
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} am_hal_clkgen_control_e;
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//
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// Current RTC oscillator.
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//
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typedef enum
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{
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AM_HAL_CLKGEN_STATUS_RTCOSC_XTAL,
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AM_HAL_CLKGEN_STATUS_RTCOSC_LFRC,
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} am_hal_clkgen_status_rtcosc_e;
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//
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// CLKOUT
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//
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typedef enum
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{
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AM_HAL_CLKGEN_CLKOUT_LFRC_1024 = 0x0, // LFRC
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AM_HAL_CLKGEN_CLKOUT_XTAL_16384, // XTAL / 2
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AM_HAL_CLKGEN_CLKOUT_XTAL_8192, // XTAL / 4
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AM_HAL_CLKGEN_CLKOUT_XTAL_4096, // XTAL / 8
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AM_HAL_CLKGEN_CLKOUT_XTAL_2048, // XTAL / 16
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AM_HAL_CLKGEN_CLKOUT_XTAL_1024, // XTAL / 32
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AM_HAL_CLKGEN_CLKOUT_RTC_1HZ = 0x10, // RTC
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AM_HAL_CLKGEN_CLKOUT_XTAL_0_015 = 0x16, // XTAL / 2097152 = 0.015625 Hz
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AM_HAL_CLKGEN_CLKOUT_XTAL_32768, // XTAL
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AM_HAL_CLKGEN_CLKOUT_CG_100, // ClkGen 100Hz
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AM_HAL_CLKGEN_CLKOUT_LFRC_512 = 0x23, // LFRC / 2 = 512 Hz
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AM_HAL_CLKGEN_CLKOUT_LFRC_32, // LFRC / 32 = 32 Hz
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AM_HAL_CLKGEN_CLKOUT_LFRC_2, // LFRC / 512 = 2 Hz
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AM_HAL_CLKGEN_CLKOUT_LFRC_0_03, // LFRC / 32768 = 0.03125 Hz
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AM_HAL_CLKGEN_CLKOUT_XTAL_128, // XTAL / 256 = 128 Hz
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AM_HAL_CLKGEN_CLKOUT_XTAL_4, // XTAL / 8192 = 4 Hz
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AM_HAL_CLKGEN_CLKOUT_XTAL_0_5, // XTAL / 65536 = 0.5 Hz
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// The next 5 are Uncalibrated LFRC
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AM_HAL_CLKGEN_CLKOUT_ULFRC_64, // ULFRC / 16 = 64 Hz (uncal LFRC)
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AM_HAL_CLKGEN_CLKOUT_ULFRC_8, // ULFRC / 128 = 8 Hz (uncal LFRC)
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AM_HAL_CLKGEN_CLKOUT_ULFRC_1, // ULFRC / 1024 = 1 Hz (uncal LFRC)
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AM_HAL_CLKGEN_CLKOUT_ULFRC_0_25, // ULFRC / 4096 = 0.25 Hz (uncal LFRC)
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AM_HAL_CLKGEN_CLKOUT_ULFRC_0_0009, // ULFRC / 1M = 0.000976 Hz (uncal LFRC)
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//
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AM_HAL_CLKGEN_CLKOUT_LFRC_0_0004 = 0x31, // LFRC / 2M = 0.00048828125 Hz
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// Following are Not Autoenabled ("NE")
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AM_HAL_CLKGEN_CLKOUT_XTALNE_32768 = 0x35, // XTALNE / 1 = 32768 Hz
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AM_HAL_CLKGEN_CLKOUT_XTALNE_2048, // XTALNE / 16 = 2048 Hz
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AM_HAL_CLKGEN_CLKOUT_LFRCNE_32, // LFRCNE / 32 = 32 Hz
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AM_HAL_CLKGEN_CLKOUT_LFRCNE_1024 = 0x39 // LFRCNE / 1 = 1024 Hz
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} am_hal_clkgen_clkout_e;
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//
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// ClkGen Interrupts
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//
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typedef enum
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{
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AM_HAL_CLKGEN_INTERRUPT_OF = CLKGEN_INTRPTEN_OF_Msk,
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AM_HAL_CLKGEN_INTERRUPT_ACC = CLKGEN_INTRPTEN_ACC_Msk,
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AM_HAL_CLKGEN_INTERRUPT_ACF = CLKGEN_INTRPTEN_ACF_Msk
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} am_hal_clkgen_interrupt_e;
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//
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// Status structure.
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//
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typedef struct
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{
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//
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// ui32SysclkFreq
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// Returns the current system clock frequency, in hertz.
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//
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uint32_t ui32SysclkFreq;
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//
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// ui32RTCoscillator
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//
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// Returns the current RTC oscillator as one of:
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// AM_HAL_CLKGEN_STATUS_RTCOSC_LFRC
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// AM_HAL_CLKGEN_STATUS_RTCOSC_XTAL
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//
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uint32_t eRTCOSC;
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//
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// bXtalFailure
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// true = XTAL has failed (is enabled but not oscillating). Also if the
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// LFRC is selected as the oscillator in OCTRL.OSEL.
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//
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bool bXtalFailure;
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} am_hal_clkgen_status_t;
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// ****************************************************************************
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//
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//! @brief Apply various specific commands/controls on the CLKGEN module.
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//!
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//! This function is used to apply various controls on CLKGEN.
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//!
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//! @note IMPORTANT! This function MUST be called very early in execution of
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//! an application with the parameter AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX
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//! in order to set Apollo3 to its required operating frequency.
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//!
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//! @param eControl - One of the following:
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//! AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX
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//! AM_HAL_CLKGEN_CONTROL_XTAL_START
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//! AM_HAL_CLKGEN_CONTROL_LFRC_START
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//! AM_HAL_CLKGEN_CONTROL_XTAL_STOP
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//! AM_HAL_CLKGEN_CONTROL_LFRC_STOP
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//! AM_HAL_CLKGEN_CONTROL_RTC_SEL_XTAL
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//! AM_HAL_CLKGEN_CONTROL_RTC_SEL_LFRC
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//! AM_HAL_CLKGEN_CONTROL_HFADJ_ENABLE
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//! AM_HAL_CLKGEN_CONTROL_HFADJ_DISABLE
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//!
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//! @return status - generic or interface specific status.
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//!
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//! @note After starting the XTAL, a 2 second warm-up delay is required.
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//
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// ****************************************************************************
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extern uint32_t am_hal_clkgen_control(am_hal_clkgen_control_e eControl,
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void *pArgs);
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// ****************************************************************************
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//
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//! @brief Get CLKGEN status.
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//!
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//! This function returns the current value of various CLKGEN statuses.
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//!
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//! @param psStatus - ptr to a status structure to receive the current statuses.
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//!
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//! @return status - generic or interface specific status.
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//!
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//! @note After selection of the RTC Oscillator, a 2 second delay is required
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//! before the new oscillator takes effect. Therefore the CLKGEN.STATUS.OMODE
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//! bit will not reflect the new status until after the 2s wait period.
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//
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// ****************************************************************************
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extern uint32_t am_hal_clkgen_status_get(am_hal_clkgen_status_t *psStatus);
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// ****************************************************************************
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//
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//! @brief Enable CLKOUT.
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//!
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//! This function is used to enable and select a CLKOUT frequency.
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//!
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//! @param bEnable: true to enable, false to disable.
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//! @param eClkSelect - One of the following:
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//! AM_HAL_CLKGEN_CLKOUT_LFRC_1024
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//! AM_HAL_CLKGEN_CLKOUT_XTAL_16384
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//! AM_HAL_CLKGEN_CLKOUT_XTAL_8192
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//! AM_HAL_CLKGEN_CLKOUT_XTAL_4096
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//! AM_HAL_CLKGEN_CLKOUT_XTAL_2048
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//! AM_HAL_CLKGEN_CLKOUT_XTAL_1024
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//! AM_HAL_CLKGEN_CLKOUT_RTC_1HZ
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//! AM_HAL_CLKGEN_CLKOUT_XTAL_0_015
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//! AM_HAL_CLKGEN_CLKOUT_XTAL_32768
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//! AM_HAL_CLKGEN_CLKOUT_CG_100
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//! AM_HAL_CLKGEN_CLKOUT_LFRC_512
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//! AM_HAL_CLKGEN_CLKOUT_LFRC_32
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//! AM_HAL_CLKGEN_CLKOUT_LFRC_2
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//! AM_HAL_CLKGEN_CLKOUT_LFRC_0_03
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//! AM_HAL_CLKGEN_CLKOUT_XTAL_128
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//! AM_HAL_CLKGEN_CLKOUT_XTAL_4
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//! AM_HAL_CLKGEN_CLKOUT_XTAL_0_5
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//!
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//! The next 5 are Uncalibrated LFRC
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//! AM_HAL_CLKGEN_CLKOUT_ULFRC_64
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//! AM_HAL_CLKGEN_CLKOUT_ULFRC_8
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//! AM_HAL_CLKGEN_CLKOUT_ULFRC_1
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//! AM_HAL_CLKGEN_CLKOUT_ULFRC_0_25
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//! AM_HAL_CLKGEN_CLKOUT_ULFRC_0_0009
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//!
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//! AM_HAL_CLKGEN_CLKOUT_LFRC_0_0004
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//!
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//! Following are Not Autoenabled ("NE")
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//! AM_HAL_CLKGEN_CLKOUT_XTALNE_32768
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//! AM_HAL_CLKGEN_CLKOUT_XTALNE_2048
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//! AM_HAL_CLKGEN_CLKOUT_LFRCNE_32
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//! AM_HAL_CLKGEN_CLKOUT_LFRCNE_1024
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//!
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//! @return status - generic or interface specific status.
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//
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// ****************************************************************************
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extern uint32_t am_hal_clkgen_clkout_enable(bool bEnable,
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am_hal_clkgen_clkout_e eClkSelect);
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// ****************************************************************************
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//
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//! @brief Enable selected CLKGEN Interrupts.
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//!
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//! Use this function to enable the interrupts.
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//!
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//! @param ui32IntMask - One or more of the following bitmasks.
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//! AM_HAL_CLKGEN_INTERRUPT_OF
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//! AM_HAL_CLKGEN_INTERRUPT_ACC
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//! AM_HAL_CLKGEN_INTERRUPT_ACF
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//!
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//! @return status - generic or interface specific status.
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//
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// ****************************************************************************
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extern uint32_t am_hal_clkgen_interrupt_enable(am_hal_clkgen_interrupt_e ui32IntMask);
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// ****************************************************************************
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//
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//! @brief Disable selected CLKGEN Interrupts.
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//!
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//! Use this function to disable the CLKGEN interrupts.
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//!
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//! @param ui32IntMask - One or more of the following bitmasks.
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//! AM_HAL_CLKGEN_INTERRUPT_OF
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//! AM_HAL_CLKGEN_INTERRUPT_ACC
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//! AM_HAL_CLKGEN_INTERRUPT_ACF
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//!
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//! @return status - generic or interface specific status.
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//
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// ****************************************************************************
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extern uint32_t am_hal_clkgen_interrupt_disable(am_hal_clkgen_interrupt_e ui32IntMask);
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//*****************************************************************************
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//
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//! @brief IOM interrupt clear
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//!
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//! @param ui32IntMask - interface specific interrupt mask.
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//!
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//! This function clears the interrupts for the given peripheral.
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//!
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//! The following are valid clear bits, any of which can be ORed together.
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//! AM_HAL_CLKGEN_INTERRUPT_OF
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//! AM_HAL_CLKGEN_INTERRUPT_ACC
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//! AM_HAL_CLKGEN_INTERRUPT_ACF
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//!
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//! @return status - generic or interface specific status.
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//
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//*****************************************************************************
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extern uint32_t am_hal_clkgen_interrupt_clear(am_hal_clkgen_interrupt_e ui32IntMask);
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// ****************************************************************************
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//
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//! @brief Return CLKGEN interrupts.
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//!
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//! Use this function to get all CLKGEN interrupts, or only the interrupts
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//! that are enabled.
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//!
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//! @return All or only enabled CLKGEN interrupts.
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//
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// ****************************************************************************
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extern uint32_t am_hal_clkgen_interrupt_status_get(bool bEnabledOnly,
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uint32_t *pui32IntStatus);
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// ****************************************************************************
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//
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//! @brief Sets the interrupt status.
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//!
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//! This function sets the CLKGEN interrupts.
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//!
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//! @param ui32IntMask - One or more of the following bitmasks.
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//! AM_HAL_CLKGEN_INTERRUPT_OF
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//! AM_HAL_CLKGEN_INTERRUPT_ACC
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//! AM_HAL_CLKGEN_INTERRUPT_ACF
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//!
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//! @return None.
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//
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// ****************************************************************************
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extern uint32_t am_hal_clkgen_interrupt_set(am_hal_clkgen_interrupt_e ui32IntMask);
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#ifdef __cplusplus
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}
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#endif
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#endif // AM_HAL_CLKGEN_H
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//*****************************************************************************
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//
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// End Doxygen group.
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//! @}
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//
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//*****************************************************************************
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