1573 lines
66 KiB
HTML
1573 lines
66 KiB
HTML
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<title>AmbiqSuite User Guide: AmbiqSuite Apollo Device Register Overview</title>
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<img alt="Logo" src="../resources/am_logo.png" />
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<td style="padding-left: 0.5em;">
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<div id="projectname">Apollo Register Documentation  <span id="projectnumber">v2.4.2</span></div>
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<div class="title">RTC - Real Time Clock</div>
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<!--header-->
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<body>
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<br>
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<div class="panel panel-default">
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<div class="panel-heading">
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<h3 class="panel-title"> RTC Register Index</h3>
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<div class="panel-body">
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<table>
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<tr id="row_0_0_">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000040:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#CTRLOW" target="_self">CTRLOW - RTC Counters Lower</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000044:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#CTRUP" target="_self">CTRUP - RTC Counters Upper</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000048:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#ALMLOW" target="_self">ALMLOW - RTC Alarms Lower</a>
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</td>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x0000004C:</span>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#ALMUP" target="_self">ALMUP - RTC Alarms Upper</a>
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</td>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000050:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#RTCCTL" target="_self">RTCCTL - RTC Control Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000100:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#INTEN" target="_self">INTEN - RTC Interrupt Register: Enable</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000104:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#INTSTAT" target="_self">INTSTAT - RTC Interrupt Register: Status</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000108:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#INTCLR" target="_self">INTCLR - RTC Interrupt Register: Clear</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x0000010C:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#INTSET" target="_self">INTSET - RTC Interrupt Register: Set</a>
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</td>
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</tr>
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</table>
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</div>
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</div>
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<div class="panel panel-default">
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<div class="panel-heading">
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<h3 id="CTRLOW" class="panel-title">CTRLOW - RTC Counters Lower</h3>
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</div>
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<div class="panel-body">
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<h3>Address:</h3>
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<table style="margin:10px">
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">Instance 0 Address:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x40004240</span>
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</td>
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</tr>
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</table>
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<h3>Description:</h3>
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<p>This counter contains the values for hour, minutes, seconds and 100ths of a second Counter.</p>
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<h3>Example Macro Usage:</h3>
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<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
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// Register access is all performed through the standard CMSIS structure-based
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// interface. This includes module-level structure definitions with members and
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// bitfields corresponding to the physical registers and bitfields within each
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// module. In addition, Ambiq has provided instance-level macros for modules
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// that have more than one physical instance and a generic AM_REGVAL() macro
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// for directly accessing memory by address.
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//
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// The following examples show how to use these structures and macros:
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// Setting the ADC configuration register...</span>
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AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
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ADC->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
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ADCn(0)->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
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<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
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ADCn(0)->CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
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ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
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<h3>Register Fields:</h3>
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<table style="margin:10px" class="table table-bordered table-condensed">
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<thead>
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<tr>
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<th>31</th>
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<th>30</th>
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<th>29</th>
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<th>28</th>
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<th>27</th>
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<th>26</th>
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<th>25</th>
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<th>24</th>
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<th>23</th>
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<th>22</th>
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<th>21</th>
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<th>20</th>
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<th>19</th>
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<th>18</th>
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<th>17</th>
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<th>16</th>
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<th>15</th>
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<th>14</th>
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<th>13</th>
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<th>12</th>
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<th>11</th>
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<th>10</th>
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<th>9</th>
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<th>8</th>
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<th>7</th>
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<th>6</th>
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<th>5</th>
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<th>4</th>
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<th>3</th>
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<th>2</th>
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<th>1</th>
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<th>0</th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td align="center" colspan="2">RSVD
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<br>0x0</td>
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<td align="center" colspan="6">CTRHR
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<br>0x1</td>
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<td align="center" colspan="1">RSVD
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<br>0x0</td>
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<td align="center" colspan="7">CTRMIN
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<br>0x0</td>
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<td align="center" colspan="1">RSVD
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<br>0x0</td>
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<td align="center" colspan="7">CTRSEC
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<br>0x0</td>
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<td align="center" colspan="8">CTR100
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<br>0x0</td>
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</tr>
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</tbody>
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</table>
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<br>
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<table style="margin:10px" class="table table-bordered table-condensed">
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<thead>
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<tr>
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<th>Bits</th>
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<th>Name</th>
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<th>RW</th>
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<th>Description</th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td>31:30</td>
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<td>RSVD</td>
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<td>RO</td>
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<td>RESERVED<br><br>
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</td>
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</tr>
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<tr>
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<td>29:24</td>
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<td>CTRHR</td>
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<td>RW</td>
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<td>Hours Counter<br><br>
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</td>
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</tr>
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<tr>
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<td>23</td>
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<td>RSVD</td>
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<td>RO</td>
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<td>RESERVED<br><br>
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</td>
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</tr>
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<tr>
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<td>22:16</td>
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<td>CTRMIN</td>
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<td>RW</td>
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<td>Minutes Counter<br><br>
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</td>
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</tr>
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<tr>
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<td>15</td>
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<td>RSVD</td>
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<td>RO</td>
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<td>RESERVED<br><br>
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</td>
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</tr>
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<tr>
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<td>14:8</td>
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<td>CTRSEC</td>
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<td>RW</td>
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<td>Seconds Counter<br><br>
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</td>
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</tr>
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<tr>
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<td>7:0</td>
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<td>CTR100</td>
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<td>RW</td>
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<td>100ths of a second Counter<br><br>
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</td>
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</tr>
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</tbody>
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</table>
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<br>
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</div>
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</div>
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<div class="panel panel-default">
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<div class="panel-heading">
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<h3 id="CTRUP" class="panel-title">CTRUP - RTC Counters Upper</h3>
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</div>
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<div class="panel-body">
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<h3>Address:</h3>
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<table style="margin:10px">
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">Instance 0 Address:</span>
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</td>
|
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<td class="entry">
|
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x40004244</span>
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</td>
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</tr>
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</table>
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<h3>Description:</h3>
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<p>This register contains the day, month and year information. It contains which day in the week, and the century as well. The information of the century can also be derived from the year information. The 31st bit contains the error bit. See description in the register bit for condition when error is triggered.</p>
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<h3>Example Macro Usage:</h3>
|
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<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// Register access is all performed through the standard CMSIS structure-based
|
|
// interface. This includes module-level structure definitions with members and
|
|
// bitfields corresponding to the physical registers and bitfields within each
|
|
// module. In addition, Ambiq has provided instance-level macros for modules
|
|
// that have more than one physical instance and a generic AM_REGVAL() macro
|
|
// for directly accessing memory by address.
|
|
//
|
|
// The following examples show how to use these structures and macros:
|
|
|
|
// Setting the ADC configuration register...</span>
|
|
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
|
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ADC->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
|
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ADCn(0)->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
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|
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|
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
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ADCn(0)->CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
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ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
|
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<h3>Register Fields:</h3>
|
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<table style="margin:10px" class="table table-bordered table-condensed">
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<thead>
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<tr>
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<th>31</th>
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<th>30</th>
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<th>29</th>
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<th>28</th>
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<th>27</th>
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<th>26</th>
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<th>25</th>
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<th>24</th>
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<th>23</th>
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<th>22</th>
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<th>21</th>
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<th>20</th>
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<th>19</th>
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<th>18</th>
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<th>17</th>
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<th>16</th>
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<th>15</th>
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<th>14</th>
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<th>13</th>
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<th>12</th>
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<th>11</th>
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<th>10</th>
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<th>9</th>
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<th>8</th>
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<th>7</th>
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<th>6</th>
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<th>5</th>
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<th>4</th>
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<th>3</th>
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<th>2</th>
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<th>1</th>
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<th>0</th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td align="center" colspan="1">CTERR
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<br>0x0</td>
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<td align="center" colspan="2">RSVD
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<br>0x0</td>
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<td align="center" colspan="1">CEB
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<br>0x0</td>
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<td align="center" colspan="1">CB
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<br>0x0</td>
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<td align="center" colspan="3">CTRWKDY
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<br>0x0</td>
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<td align="center" colspan="8">CTRYR
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<br>0x0</td>
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<td align="center" colspan="3">RSVD
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<br>0x0</td>
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<td align="center" colspan="5">CTRMO
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<br>0x0</td>
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<td align="center" colspan="2">RSVD
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<br>0x0</td>
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<td align="center" colspan="6">CTRDATE
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<br>0x0</td>
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</tr>
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</tbody>
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</table>
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<br>
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<table style="margin:10px" class="table table-bordered table-condensed">
|
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<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
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<th>Name</th>
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<th>RW</th>
|
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<th>Description</th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td>31</td>
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<td>CTERR</td>
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<td>RO</td>
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<td>Counter read error status. Error is triggered when software reads the lower word of the counters, and fails to read the upper counter within 1/100 second. This is because when the lower counter is read, the upper counter is held off from incrementing until it is read so that the full time stamp can be read.<br><br>
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NOERR = 0x0 - No read error occurred<br>
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RDERR = 0x1 - Read error occurred</td>
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</tr>
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<tr>
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<td>30:29</td>
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<td>RSVD</td>
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<td>RO</td>
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<td>RESERVED<br><br>
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</td>
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</tr>
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<tr>
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<td>28</td>
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<td>CEB</td>
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<td>RW</td>
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<td>Century enable<br><br>
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DIS = 0x0 - Disable the Century bit from changing<br>
|
|
EN = 0x1 - Enable the Century bit to change</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27</td>
|
|
<td>CB</td>
|
|
<td>RW</td>
|
|
<td>Century<br><br>
|
|
2000 = 0x0 - Century is 2000s<br>
|
|
1900_2100 = 0x1 - Century is 1900s/2100s</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:24</td>
|
|
<td>CTRWKDY</td>
|
|
<td>RW</td>
|
|
<td>Weekdays Counter<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:16</td>
|
|
<td>CTRYR</td>
|
|
<td>RW</td>
|
|
<td>Years Counter<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12:8</td>
|
|
<td>CTRMO</td>
|
|
<td>RW</td>
|
|
<td>Months Counter<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:0</td>
|
|
<td>CTRDATE</td>
|
|
<td>RW</td>
|
|
<td>Date Counter<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALMLOW" class="panel-title">ALMLOW - RTC Alarms Lower</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40004248</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register is the Alarm settings for hours, minutes, second and 1/100th seconds settings.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// Register access is all performed through the standard CMSIS structure-based
|
|
// interface. This includes module-level structure definitions with members and
|
|
// bitfields corresponding to the physical registers and bitfields within each
|
|
// module. In addition, Ambiq has provided instance-level macros for modules
|
|
// that have more than one physical instance and a generic AM_REGVAL() macro
|
|
// for directly accessing memory by address.
|
|
//
|
|
// The following examples show how to use these structures and macros:
|
|
|
|
// Setting the ADC configuration register...</span>
|
|
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
|
|
ADC->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
|
|
ADCn(0)->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
|
|
|
|
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
|
|
ADCn(0)->CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
|
|
ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">ALMHR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="7">ALMMIN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="7">ALMSEC
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="8">ALM100
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:24</td>
|
|
<td>ALMHR</td>
|
|
<td>RW</td>
|
|
<td>Hours Alarm<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22:16</td>
|
|
<td>ALMMIN</td>
|
|
<td>RW</td>
|
|
<td>Minutes Alarm<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14:8</td>
|
|
<td>ALMSEC</td>
|
|
<td>RW</td>
|
|
<td>Seconds Alarm<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:0</td>
|
|
<td>ALM100</td>
|
|
<td>RW</td>
|
|
<td>100ths of a second Alarm<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALMUP" class="panel-title">ALMUP - RTC Alarms Upper</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x4000424C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register is the alarm settings for week, month and day.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// Register access is all performed through the standard CMSIS structure-based
|
|
// interface. This includes module-level structure definitions with members and
|
|
// bitfields corresponding to the physical registers and bitfields within each
|
|
// module. In addition, Ambiq has provided instance-level macros for modules
|
|
// that have more than one physical instance and a generic AM_REGVAL() macro
|
|
// for directly accessing memory by address.
|
|
//
|
|
// The following examples show how to use these structures and macros:
|
|
|
|
// Setting the ADC configuration register...</span>
|
|
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
|
|
ADC->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
|
|
ADCn(0)->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
|
|
|
|
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
|
|
ADCn(0)->CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
|
|
ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="13">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">ALMWKDY
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="5">ALMMO
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">ALMDATE
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:19</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18:16</td>
|
|
<td>ALMWKDY</td>
|
|
<td>RW</td>
|
|
<td>Weekdays Alarm<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12:8</td>
|
|
<td>ALMMO</td>
|
|
<td>RW</td>
|
|
<td>Months Alarm<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:0</td>
|
|
<td>ALMDATE</td>
|
|
<td>RW</td>
|
|
<td>Date Alarm<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="RTCCTL" class="panel-title">RTCCTL - RTC Control Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40004250</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This is the register control for the RTC module. It sets the 12 or 24 hours mode, enables counter writes and sets the alarm repeat interval.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// Register access is all performed through the standard CMSIS structure-based
|
|
// interface. This includes module-level structure definitions with members and
|
|
// bitfields corresponding to the physical registers and bitfields within each
|
|
// module. In addition, Ambiq has provided instance-level macros for modules
|
|
// that have more than one physical instance and a generic AM_REGVAL() macro
|
|
// for directly accessing memory by address.
|
|
//
|
|
// The following examples show how to use these structures and macros:
|
|
|
|
// Setting the ADC configuration register...</span>
|
|
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
|
|
ADC->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
|
|
ADCn(0)->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
|
|
|
|
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
|
|
ADCn(0)->CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
|
|
ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="26">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">HR1224
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">RSTOP
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RPT
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WRTC
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>HR1224</td>
|
|
<td>RW</td>
|
|
<td>Hours Counter mode<br><br>
|
|
24HR = 0x0 - Hours in 24 hour mode<br>
|
|
12HR = 0x1 - Hours in 12 hour mode</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>RSTOP</td>
|
|
<td>RW</td>
|
|
<td>RTC input clock control<br><br>
|
|
RUN = 0x0 - Allow the RTC input clock to run<br>
|
|
STOP = 0x1 - Stop the RTC input clock</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RPT</td>
|
|
<td>RW</td>
|
|
<td>Alarm repeat interval<br><br>
|
|
DIS = 0x0 - Alarm interrupt disabled<br>
|
|
YEAR = 0x1 - Interrupt every year<br>
|
|
MONTH = 0x2 - Interrupt every month<br>
|
|
WEEK = 0x3 - Interrupt every week<br>
|
|
DAY = 0x4 - Interrupt every day<br>
|
|
HR = 0x5 - Interrupt every hour<br>
|
|
MIN = 0x6 - Interrupt every minute<br>
|
|
SEC = 0x7 - Interrupt every second/10th/100th</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>WRTC</td>
|
|
<td>RW</td>
|
|
<td>Counter write control<br><br>
|
|
DIS = 0x0 - Counter writes are disabled<br>
|
|
EN = 0x1 - Counter writes are enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INTEN" class="panel-title">INTEN - RTC Interrupt Register: Enable</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40004300</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Set bits in this register to allow this module to generate the corresponding interrupt.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// Register access is all performed through the standard CMSIS structure-based
|
|
// interface. This includes module-level structure definitions with members and
|
|
// bitfields corresponding to the physical registers and bitfields within each
|
|
// module. In addition, Ambiq has provided instance-level macros for modules
|
|
// that have more than one physical instance and a generic AM_REGVAL() macro
|
|
// for directly accessing memory by address.
|
|
//
|
|
// The following examples show how to use these structures and macros:
|
|
|
|
// Setting the ADC configuration register...</span>
|
|
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
|
|
ADC->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
|
|
ADCn(0)->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
|
|
|
|
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
|
|
ADCn(0)->CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
|
|
ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="31">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">ALM
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>ALM</td>
|
|
<td>RW</td>
|
|
<td>RTC Alarm interrupt<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INTSTAT" class="panel-title">INTSTAT - RTC Interrupt Register: Status</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40004304</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Read bits from this register to discover the cause of a recent interrupt.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// Register access is all performed through the standard CMSIS structure-based
|
|
// interface. This includes module-level structure definitions with members and
|
|
// bitfields corresponding to the physical registers and bitfields within each
|
|
// module. In addition, Ambiq has provided instance-level macros for modules
|
|
// that have more than one physical instance and a generic AM_REGVAL() macro
|
|
// for directly accessing memory by address.
|
|
//
|
|
// The following examples show how to use these structures and macros:
|
|
|
|
// Setting the ADC configuration register...</span>
|
|
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
|
|
ADC->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
|
|
ADCn(0)->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
|
|
|
|
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
|
|
ADCn(0)->CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
|
|
ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="31">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">ALM
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>ALM</td>
|
|
<td>RW</td>
|
|
<td>RTC Alarm interrupt<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INTCLR" class="panel-title">INTCLR - RTC Interrupt Register: Clear</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40004308</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Write a 1 to a bit in this register to clear the interrupt status associated with that bit.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// Register access is all performed through the standard CMSIS structure-based
|
|
// interface. This includes module-level structure definitions with members and
|
|
// bitfields corresponding to the physical registers and bitfields within each
|
|
// module. In addition, Ambiq has provided instance-level macros for modules
|
|
// that have more than one physical instance and a generic AM_REGVAL() macro
|
|
// for directly accessing memory by address.
|
|
//
|
|
// The following examples show how to use these structures and macros:
|
|
|
|
// Setting the ADC configuration register...</span>
|
|
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
|
|
ADC->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
|
|
ADCn(0)->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
|
|
|
|
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
|
|
ADCn(0)->CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
|
|
ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="31">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">ALM
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>ALM</td>
|
|
<td>RW</td>
|
|
<td>RTC Alarm interrupt<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INTSET" class="panel-title">INTSET - RTC Interrupt Register: Set</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x4000430C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for testing purposes).</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// Register access is all performed through the standard CMSIS structure-based
|
|
// interface. This includes module-level structure definitions with members and
|
|
// bitfields corresponding to the physical registers and bitfields within each
|
|
// module. In addition, Ambiq has provided instance-level macros for modules
|
|
// that have more than one physical instance and a generic AM_REGVAL() macro
|
|
// for directly accessing memory by address.
|
|
//
|
|
// The following examples show how to use these structures and macros:
|
|
|
|
// Setting the ADC configuration register...</span>
|
|
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
|
|
ADC->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
|
|
ADCn(0)->CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
|
|
|
|
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
|
|
ADCn(0)->CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
|
|
ADCn(0)->CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="31">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">ALM
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>ALM</td>
|
|
<td>RW</td>
|
|
<td>RTC Alarm interrupt<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
</body>
|
|
|
|
<hr size="1">
|
|
<body>
|
|
<div id="footer" align="right">
|
|
<small>
|
|
AmbiqSuite Register Documentation
|
|
<a href="http://www.ambiqmicro.com">
|
|
<img class="footer" src="../resources/ambiqmicro_logo.png" alt="Ambiq Micro"/></a>   Copyright © 2019  <br />
|
|
This documentation is licensed and distributed under the <a rel="license" href="http://opensource.org/licenses/BSD-3-Clause">BSD 3-Clause License</a>.  <br/>
|
|
</small>
|
|
</div>
|
|
</body>
|
|
</html>
|
|
|