17525 lines
736 KiB
HTML
17525 lines
736 KiB
HTML
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
|
<html xmlns="http://www.w3.org/1999/xhtml">
|
|
|
|
<head>
|
|
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8" />
|
|
<meta http-equiv="X-UA-Compatible" content="IE=9" />
|
|
<meta name="generator" content="AmbiqMicro" />
|
|
<title>AmbiqSuite User Guide: AmbiqSuite Apollo Device Register Overview</title>
|
|
<link href="../resources/tabs.css" rel="stylesheet" type="text/css" />
|
|
<link href="../resources/bootstrap.css" rel="stylesheet" type="text/css" />
|
|
<script type="text/javascript" src="../resources/jquery.js"></script>
|
|
<script type="text/javascript" src="../resources/dynsections.js"></script>
|
|
<link href="search/search.css" rel="stylesheet" type="text/css" />
|
|
<link href="../resources/customdoxygen.css" rel="stylesheet" type="text/css" />
|
|
</head>
|
|
|
|
<body>
|
|
<div id="top">
|
|
<!-- do not remove this div, it is closed by doxygen! -->
|
|
<div id="titlearea">
|
|
<table cellspacing="0" cellpadding="0">
|
|
<tbody>
|
|
<tr style="height: 56px;">
|
|
<td id="projectlogo">
|
|
<img alt="Logo" src="../resources/am_logo.png" />
|
|
</td>
|
|
<td style="padding-left: 0.5em;">
|
|
<div id="projectname">Apollo Register Documentation  <span id="projectnumber">v2.4.2</span></div>
|
|
</td>
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
</div>
|
|
<!-- end header part -->
|
|
<div id="navrow1" class="tabs">
|
|
<ul class="tablist">
|
|
<li class="current"><a href="../index.html"><span>Main Page</span></a>
|
|
</li>
|
|
</div>
|
|
</li>
|
|
</ul>
|
|
</div>
|
|
</div>
|
|
<!-- top -->
|
|
<!-- window showing the filter options -->
|
|
<div class="header">
|
|
<div class="headertitle">
|
|
<div class="title">GPIO - General Purpose IO</div>
|
|
</div>
|
|
</div>
|
|
<!--header-->
|
|
<body>
|
|
<br>
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 class="panel-title"> GPIO Register Index</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<table>
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000000:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGA" target="_self">PADREGA - Pad Configuration Register A</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000004:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGB" target="_self">PADREGB - Pad Configuration Register B</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000008:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGC" target="_self">PADREGC - Pad Configuration Register C</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x0000000C:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGD" target="_self">PADREGD - Pad Configuration Register D</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000010:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGE" target="_self">PADREGE - Pad Configuration Register E</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000014:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGF" target="_self">PADREGF - Pad Configuration Register F</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000018:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGG" target="_self">PADREGG - Pad Configuration Register G</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x0000001C:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGH" target="_self">PADREGH - Pad Configuration Register H</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000020:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGI" target="_self">PADREGI - Pad Configuration Register I</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000024:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGJ" target="_self">PADREGJ - Pad Configuration Register J</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000028:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGK" target="_self">PADREGK - Pad Configuration Register K</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x0000002C:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGL" target="_self">PADREGL - Pad Configuration Register L</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000030:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADREGM" target="_self">PADREGM - Pad Configuration Register M</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000040:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#CFGA" target="_self">CFGA - GPIO Configuration Register A</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000044:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#CFGB" target="_self">CFGB - GPIO Configuration Register B</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000048:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#CFGC" target="_self">CFGC - GPIO Configuration Register C</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x0000004C:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#CFGD" target="_self">CFGD - GPIO Configuration Register D</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000050:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#CFGE" target="_self">CFGE - GPIO Configuration Register E</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000054:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#CFGF" target="_self">CFGF - GPIO Configuration Register F</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000058:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#CFGG" target="_self">CFGG - GPIO Configuration Register G</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000060:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#PADKEY" target="_self">PADKEY - Key Register for all pad configuration registers</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000080:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#RDA" target="_self">RDA - GPIO Input Register A</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000084:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#RDB" target="_self">RDB - GPIO Input Register B</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000088:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#WTA" target="_self">WTA - GPIO Output Register A</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x0000008C:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#WTB" target="_self">WTB - GPIO Output Register B</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000090:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#WTSA" target="_self">WTSA - GPIO Output Register A Set</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000094:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#WTSB" target="_self">WTSB - GPIO Output Register B Set</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000098:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#WTCA" target="_self">WTCA - GPIO Output Register A Clear</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x0000009C:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#WTCB" target="_self">WTCB - GPIO Output Register B Clear</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000A0:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ENA" target="_self">ENA - GPIO Enable Register A</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000A4:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ENB" target="_self">ENB - GPIO Enable Register B</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000A8:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ENSA" target="_self">ENSA - GPIO Enable Register A Set</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000AC:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ENSB" target="_self">ENSB - GPIO Enable Register B Set</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000B4:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ENCA" target="_self">ENCA - GPIO Enable Register A Clear</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000B8:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ENCB" target="_self">ENCB - GPIO Enable Register B Clear</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000BC:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#STMRCAP" target="_self">STMRCAP - STIMER Capture Control</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000C0:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#IOM0IRQ" target="_self">IOM0IRQ - STIMER Capture Control</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000C4:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#IOM1IRQ" target="_self">IOM1IRQ - STIMER Capture Control</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000C8:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#IOM2IRQ" target="_self">IOM2IRQ - STIMER Capture Control</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000CC:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#IOM3IRQ" target="_self">IOM3IRQ - STIMER Capture Control</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000D0:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#IOM4IRQ" target="_self">IOM4IRQ - STIMER Capture Control</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000D4:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#IOM5IRQ" target="_self">IOM5IRQ - STIMER Capture Control</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000D8:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#LOOPBACK" target="_self">LOOPBACK - IOM to IOS Loopback Control</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000DC:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#GPIOOBS" target="_self">GPIOOBS - GPIO Observation Mode Sample register</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000E0:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGA" target="_self">ALTPADCFGA - Alternate Pad Configuration reg0 (Pads 3,2,1,0)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000E4:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGB" target="_self">ALTPADCFGB - Alternate Pad Configuration reg1 (Pads 7,6,5,4)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000E8:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGC" target="_self">ALTPADCFGC - Alternate Pad Configuration reg2 (Pads 11,10,9,8)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000EC:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGD" target="_self">ALTPADCFGD - Alternate Pad Configuration reg3 (Pads 15,14,13,12)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000F0:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGE" target="_self">ALTPADCFGE - Alternate Pad Configuration reg4 (Pads 19,18,17,16)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000F4:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGF" target="_self">ALTPADCFGF - Alternate Pad Configuration reg5 (Pads 23,22,21,20)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000F8:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGG" target="_self">ALTPADCFGG - Alternate Pad Configuration reg6 (Pads 27,26,25,24)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x000000FC:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGH" target="_self">ALTPADCFGH - Alternate Pad Configuration reg7 (Pads 31,30,29,28)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000100:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGI" target="_self">ALTPADCFGI - Alternate Pad Configuration reg8 (Pads 35,34,33,32)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000104:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGJ" target="_self">ALTPADCFGJ - Alternate Pad Configuration reg9 (Pads 39,38,37,36)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000108:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGK" target="_self">ALTPADCFGK - Alternate Pad Configuration reg10 (Pads 43,42,41,40)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x0000010C:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGL" target="_self">ALTPADCFGL - Alternate Pad Configuration reg11 (Pads 47,46,45,44)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000110:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#ALTPADCFGM" target="_self">ALTPADCFGM - Alternate Pad Configuration reg12 (Pads 49,48)</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000200:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#INT0EN" target="_self">INT0EN - GPIO Interrupt Registers 31-0: Enable</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000204:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#INT0STAT" target="_self">INT0STAT - GPIO Interrupt Registers 31-0: Status</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000208:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#INT0CLR" target="_self">INT0CLR - GPIO Interrupt Registers 31-0: Clear</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x0000020C:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#INT0SET" target="_self">INT0SET - GPIO Interrupt Registers 31-0: Set</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000210:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#INT1EN" target="_self">INT1EN - GPIO Interrupt Registers 49-32: Enable</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000214:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#INT1STAT" target="_self">INT1STAT - GPIO Interrupt Registers 49-32: Status</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x00000218:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#INT1CLR" target="_self">INT1CLR - GPIO Interrupt Registers 49-32: Clear</a>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x0000021C:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<a class="el" href="#INT1SET" target="_self">INT1SET - GPIO Interrupt Registers 49-32: Set</a>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGA" class="panel-title">PADREGA - Pad Configuration Register A</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010000</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD3 through PAD0. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD3FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD3STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD3INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD3PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD2FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD2STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD2INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD2PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PAD1RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD1FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD1STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD1INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD1PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PAD0RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD0FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD0STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD0INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD0PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD3FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 3 function select<br><br>
|
|
UA0RTS = 0x0 - Configure as the UART 0 RTS output<br>
|
|
SLnCE = 0x1 - Configure as the IOSLAVE SPI nCE signal<br>
|
|
M1nCE4 = 0x2 - Configure as the SPI channel 4 nCE signal from IOMSTR1<br>
|
|
GPIO3 = 0x3 - Configure as GPIO3<br>
|
|
M0nCE = 0x4 - Configure as the IOSLAVE SPI nCE loopback signal from IOMSTR0<br>
|
|
M1nCE = 0x5 - Configure as the IOSLAVE SPI nCE loopback signal from IOMSTR1<br>
|
|
TRIG1 = 0x6 - Configure as the ADC Trigger 1 signal</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD3STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 3 drive strength.<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD3INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 3 input enable.<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD3PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 3 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:22</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD2FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 2 function select<br><br>
|
|
SLWIR3 = 0x0 - Configure as the IOSLAVE SPI 3-wire MOSI/MISO signal<br>
|
|
SLMOSI = 0x1 - Configure as the IOSLAVE SPI MOSI signal<br>
|
|
CLKOUT = 0x2 - Configure as the CLKOUT signal<br>
|
|
GPIO2 = 0x3 - Configure as GPIO2<br>
|
|
M0MOSI = 0x4 - Configure as the IOSLAVE SPI MOSI loopback signal from IOMSTR0<br>
|
|
M1MOSI = 0x5 - Configure as the IOSLAVE SPI MOSI loopback signal from IOMSTR1<br>
|
|
M0WIR3 = 0x6 - Configure as the IOSLAVE SPI 3-wire MOSI/MISO loopback signal from IOMSTR0<br>
|
|
M1WIR3 = 0x7 - Configure as the IOSLAVE SPI 3-wire MOSI/MISO loopback signal from IOMSTR1</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD2STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 2 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD2INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 2 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD2PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 2 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>PAD1RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 1 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD1FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 1 function select<br><br>
|
|
SLSDA = 0x0 - Configure as the IOSLAVE I2C SDA signal<br>
|
|
SLMISO = 0x1 - Configure as the IOSLAVE SPI MISO signal<br>
|
|
UARTRX = 0x2 - Configure as the UART RX signal<br>
|
|
GPIO1 = 0x3 - Configure as GPIO1<br>
|
|
M0MISO = 0x4 - Configure as the IOSLAVE SPI MISO loopback signal from IOMSTR0<br>
|
|
M1MISO = 0x5 - Configure as the IOSLAVE SPI MISO loopback signal from IOMSTR1<br>
|
|
M0SDA = 0x6 - Configure as the IOSLAVE I2C SDA loopback signal from IOMSTR0<br>
|
|
M1SDA = 0x7 - Configure as the IOSLAVE I2C SDA loopback signal from IOMSTR1</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD1STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 1 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD1INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 1 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD1PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 1 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>PAD0RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 0 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD0FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 0 function select<br><br>
|
|
SLSCL = 0x0 - Configure as the IOSLAVE I2C SCL signal<br>
|
|
SLSCK = 0x1 - Configure as the IOSLAVE SPI SCK signal<br>
|
|
UARTTX = 0x2 - Configure as the UART TX signal<br>
|
|
GPIO0 = 0x3 - Configure as GPIO0<br>
|
|
M0SCK = 0x4 - Configure as the IOSLAVE SPI SCK loopback signal from IOMSTR0<br>
|
|
M1SCK = 0x5 - Configure as the IOSLAVE SPI SCK loopback signal from IOMSTR1<br>
|
|
M0SCL = 0x6 - Configure as the IOSLAVE I2C SCL loopback signal from IOMSTR0<br>
|
|
M1SCL = 0x7 - Configure as the IOSLAVE I2C SCL loopback signal from IOMSTR1</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD0STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 0 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD0INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 0 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD0PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 0 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGB" class="panel-title">PADREGB - Pad Configuration Register B</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010004</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD7 through PAD4. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD7FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD7STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD7INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD7PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PAD6RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD6FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD6STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD6INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD6PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PAD5RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD5FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD5STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD5INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD5PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD4PWRDN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD4FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD4STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD4INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD4PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD7FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 7 function select<br><br>
|
|
M0WIR3 = 0x0 - Configure as the IOMSTR0 SPI 3-wire MOSI/MISO signal<br>
|
|
M0MOSI = 0x1 - Configure as the IOMSTR0 SPI MOSI signal<br>
|
|
CLKOUT = 0x2 - Configure as the CLKOUT signal<br>
|
|
GPIO7 = 0x3 - Configure as GPIO7<br>
|
|
TRIG0 = 0x4 - Configure as the ADC Trigger 0 signal<br>
|
|
SLWIR3 = 0x6 - Configure as the IOMSTR0 SPI 3-wire MOSI/MISO loopback signal from IOSLAVE<br>
|
|
DIS = 0x7 - Pad disabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD7STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 7 drive strentgh<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD7INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 7 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD7PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 7 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:22</td>
|
|
<td>PAD6RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 6 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD6FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 6 function select<br><br>
|
|
M0SDA = 0x0 - Configure as the IOMSTR0 I2C SDA signal<br>
|
|
M0MISO = 0x1 - Configure as the IOMSTR0 SPI MISO signal<br>
|
|
UACTS = 0x2 - Configure as the UART CTS signal<br>
|
|
GPIO6 = 0x3 - Configure as GPIO6<br>
|
|
SLMISO = 0x4 - Configure as the IOMSTR0 SPI MISO loopback signal from IOSLAVE<br>
|
|
SLSDA = 0x6 - Configure as the IOMSTR0 I2C SDA loopback signal from IOSLAVE<br>
|
|
DIS = 0x7 - Pad disabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD6STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 6 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD6INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 6 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD6PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 6 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>PAD5RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 5 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD5FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 5 function select<br><br>
|
|
M0SCL = 0x0 - Configure as the IOMSTR0 I2C SCL signal<br>
|
|
M0SCK = 0x1 - Configure as the IOMSTR0 SPI SCK signal<br>
|
|
UARTS = 0x2 - Configure as the UART RTS signal<br>
|
|
GPIO5 = 0x3 - Configure as GPIO5<br>
|
|
SLSCK = 0x4 - Configure as the IOMSTR0 SPI SCK loopback signal from IOSLAVE<br>
|
|
SLSCL = 0x6 - Configure as the IOMSTR0 I2C SCL loopback signal from IOSLAVE<br>
|
|
DIS = 0x7 - Pad disabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD5STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 5 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD5INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 5 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD5PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 5 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>PAD4PWRDN</td>
|
|
<td>RW</td>
|
|
<td>Pad 4 VSS power switch enable<br><br>
|
|
DIS = 0x0 - Power switch disabled<br>
|
|
EN = 0x1 - Power switch enabled (switch to GND)</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD4FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 4 function select<br><br>
|
|
UA0RTS = 0x0 - Configure as the UART0 RTS output signal<br>
|
|
SLINT = 0x1 - Configure as the IOSLAVE interrupt out signal<br>
|
|
M0nCE5 = 0x2 - Configure as the SPI channel 5 nCE signal from IOMSTR0<br>
|
|
GPIO4 = 0x3 - Configure as GPIO4<br>
|
|
SLINTGP = 0x4 - Configure as the IOSLAVE interrupt loopback signal to GPIO4<br>
|
|
SWO = 0x5 - Configure as the serial wire debug SWO signal<br>
|
|
CLKOUT = 0x6 - Configure as the CLKOUT signal<br>
|
|
DIS = 0x7 - Pad disabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD4STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 4 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD4INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 4 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD4PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 4 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGC" class="panel-title">PADREGC - Pad Configuration Register C</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010008</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD11 through PAD8. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD11FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD11STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD11INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD11PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD10FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD10STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD10INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD10PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PAD9RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD9FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD9STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD9INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD9PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PAD8RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD8FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD8STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD8INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD8PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD11FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 11 function select<br><br>
|
|
ANATST = 0x0 - Configure as the analog test output signal<br>
|
|
M0nCE0 = 0x1 - Configure as the SPI channel 0 nCE signal from IOMSTR0<br>
|
|
CLKOUT = 0x2 - Configure as the CLKOUT signal<br>
|
|
GPIO11 = 0x3 - Configure as GPIO11</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD11STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 11 drive strentgh<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD11INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 11 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD11PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 11 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:22</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD10FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 10 function select<br><br>
|
|
M1WIR3 = 0x0 - Configure as the IOMSTR1 SPI 3-wire MOSI/MISO signal<br>
|
|
M1MOSI = 0x1 - Configure as the IOMSTR1 SPI MOSI signal<br>
|
|
M0nCE6 = 0x2 - Configure as the SPI channel 6 nCE signal from IOMSTR0<br>
|
|
GPIO10 = 0x3 - Configure as GPIO10<br>
|
|
EXTHFA = 0x5 - Configure as the external HFRC A clock signal<br>
|
|
DIS = 0x6 - Pad disabled<br>
|
|
SLWIR3 = 0x7 - Configure as the IOMSTR1 SPI 3-wire MOSI/MISO loopback signal from IOSLAVE</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD10STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 10 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD10INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 10 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD10PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 10 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>PAD9RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 9 pullup resistor selection<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD9FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 9 function select<br><br>
|
|
M1SDA = 0x0 - Configure as the IOMSTR1 I2C SDA signal<br>
|
|
M1MISO = 0x1 - Configure as the IOMSTR1 SPI MISO signal<br>
|
|
M0nCE5 = 0x2 - Configure as the SPI channel 5 nCE signal from IOMSTR0<br>
|
|
GPIO9 = 0x3 - Configure as GPIO9<br>
|
|
SLMISO = 0x5 - Configure as the IOMSTR1 SPI MISO loopback signal from IOSLAVE<br>
|
|
DIS = 0x6 - Pad disabled<br>
|
|
SLSDA = 0x7 - Configure as the IOMSTR1 I2C SDA loopback signal from IOSLAVE</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD9STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 9 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD9INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 9 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD9PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 9 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>PAD8RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 8 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD8FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 8 function select<br><br>
|
|
M1SCL = 0x0 - Configure as the IOMSTR1 I2C SCL signal<br>
|
|
M1SCK = 0x1 - Configure as the IOMSTR1 SPI SCK signal<br>
|
|
M0nCE4 = 0x2 - Configure as the SPI channel 4 nCE signal from IOMSTR0<br>
|
|
GPIO8 = 0x3 - Configure as GPIO8<br>
|
|
SLSCK = 0x5 - Configure as the IOMSTR1 SPI SCK loopback signal from IOSLAVE<br>
|
|
DIS = 0x6 - Pad disabled<br>
|
|
SLSCL = 0x7 - Configure as the IOMSTR1 I2C SCL loopback signal from IOSLAVE</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD8STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 8 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD8INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 8 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD8PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 8 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGD" class="panel-title">PADREGD - Pad Configuration Register D</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x4001000C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD15 through PAD12. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD15FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD15STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD15INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD15PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD14FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD14STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD14INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD14PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD13FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD13STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD13INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD13PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD12FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD12STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD12INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD12PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD15FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 15 function select<br><br>
|
|
ADC3 = 0x0 - Configure as the analog ADC input 3<br>
|
|
M1nCE3 = 0x1 - Configure as the SPI channel 3 nCE signal from IOMSTR1<br>
|
|
UARTRX = 0x2 - Configure as the UART RX signal<br>
|
|
GPIO15 = 0x3 - Configure as GPIO15<br>
|
|
EXTXT = 0x5 - Configure as the external XT clock signal<br>
|
|
DIS = 0x7 - Pad disabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD15STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 15 drive strentgh<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD15INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 15 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD15PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 15 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:22</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD14FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 14 function select<br><br>
|
|
ADC2 = 0x0 - Configure as the analog ADC input 2<br>
|
|
M1nCE2 = 0x1 - Configure as the SPI channel 2 nCE signal from IOMSTR1<br>
|
|
UARTTX = 0x2 - Configure as the UART TX signal<br>
|
|
GPIO14 = 0x3 - Configure as GPIO14<br>
|
|
EXTHFS = 0x5 - Configure as the external HFRC select signal<br>
|
|
DIS = 0x7 - Pad disabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD14STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 14 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD14INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 14 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD14PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 14 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD13FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 13 function select<br><br>
|
|
ADC1 = 0x0 - Configure as the analog ADC input 1<br>
|
|
M1nCE1 = 0x1 - Configure as the SPI channel 1 nCE signal from IOMSTR1<br>
|
|
TCTB0 = 0x2 - Configure as the input/output signal from CTIMER B0<br>
|
|
GPIO13 = 0x3 - Configure as GPIO13<br>
|
|
EXTHFA = 0x5 - Configure as the external HFRC B clock signal<br>
|
|
SWO = 0x6 - Configure as the serial wire debug SWO signal<br>
|
|
DIS = 0x7 - Pad disabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD13STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 13 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD13INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 13 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD13PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 13 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD12FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 12 function select<br><br>
|
|
ADC0 = 0x0 - Configure as the analog ADC input 0<br>
|
|
M1nCE0 = 0x1 - Configure as the SPI channel 0 nCE signal from IOMSTR1<br>
|
|
TCTA0 = 0x2 - Configure as the input/output signal from CTIMER A0<br>
|
|
GPIO12 = 0x3 - Configure as GPIO12</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD12STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 12 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD12INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 12 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD12PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 12 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGE" class="panel-title">PADREGE - Pad Configuration Register E</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010010</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD19 through PAD16. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD19FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD19STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD19INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD19PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD18FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD18STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD18INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD18PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD17FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD17STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD17INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD17PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD16FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD16STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD16INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD16PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD19FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 19 function select<br><br>
|
|
CMPRF = 0x0 - Configure as the analog comparator reference signal<br>
|
|
M0nCE3 = 0x1 - Configure as the SPI channel 3 nCE signal from IOMSTR0<br>
|
|
TCTB1 = 0x2 - Configure as the input/output signal from CTIMER B1<br>
|
|
GPIO19 = 0x3 - Configure as GPIO19</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD19STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 19 drive strentgh<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD19INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 19 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD19PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 19 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:22</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD18FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 18 function select<br><br>
|
|
CMPIN1 = 0x0 - Configure as the analog comparator input 1 signal<br>
|
|
M0nCE2 = 0x1 - Configure as the SPI channel 2 nCE signal from IOMSTR0<br>
|
|
TCTA1 = 0x2 - Configure as the input/output signal from CTIMER A1<br>
|
|
GPIO18 = 0x3 - Configure as GPIO18</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD18STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 18 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD18INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 18 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD18PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 18 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD17FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 17 function select<br><br>
|
|
CMPIN0 = 0x0 - Configure as the analog comparator input 0 signal<br>
|
|
M0nCE4 = 0x1 - Configure as the SPI channel 4 nCE signal from IOMSTR0<br>
|
|
TRIG1 = 0x2 - Configure as the ADC Trigger 1 signal<br>
|
|
GPIO17 = 0x3 - Configure as GPIO17<br>
|
|
EXTLF = 0x5 - Configure as the external LFRC clock signal<br>
|
|
DIS = 0x7 - Pad disabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD17STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 17 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD17INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 17 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD17PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 17 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD16FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 16 function select<br><br>
|
|
ADCREF = 0x0 - Configure as the analog ADC reference input signal<br>
|
|
M0nCE4 = 0x1 - Configure as the SPI channel 4 nCE signal from IOMSTR0<br>
|
|
TRIG0 = 0x2 - Configure as the ADC Trigger 0 signal<br>
|
|
GPIO16 = 0x3 - Configure as GPIO16</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD16STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 16 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD16INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 16 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD16PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 16 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGF" class="panel-title">PADREGF - Pad Configuration Register F</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010014</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD23 through PAD20. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD23FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD23STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD23INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD23PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD22PWRUP
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD22FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD22STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD22INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD22PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD21FNCSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD21STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD21INPEN
|
|
<br>0x1</td>
|
|
|
|
<td align="center" colspan="1">PAD21PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD20FNCSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD20STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD20INPEN
|
|
<br>0x1</td>
|
|
|
|
<td align="center" colspan="1">PAD20PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD23FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 23 function select<br><br>
|
|
UARTRX = 0x0 - Configure as the UART RX signal<br>
|
|
M0nCE0 = 0x1 - Configure as the SPI channel 0 nCE signal from IOMSTR0<br>
|
|
TCTB3 = 0x2 - Configure as the input/output signal from CTIMER B3<br>
|
|
GPIO23 = 0x3 - Configure as GPIO23<br>
|
|
PDM_DATA = 0x4 - Configure as PDM Data input to the PDM module</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD23STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 23 drive strentgh<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD23INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 23 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD23PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 23 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>PAD22PWRUP</td>
|
|
<td>RW</td>
|
|
<td>Pad 22 upper power switch enable<br><br>
|
|
DIS = 0x0 - Power switch disabled<br>
|
|
EN = 0x1 - Power switch enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD22FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 22 function select<br><br>
|
|
UARTTX = 0x0 - Configure as the UART TX signal<br>
|
|
M1nCE7 = 0x1 - Configure as the SPI channel 7 nCE signal from IOMSTR1<br>
|
|
TCTA3 = 0x2 - Configure as the input/output signal from CTIMER A3<br>
|
|
GPIO22 = 0x3 - Configure as GPIO22<br>
|
|
PDM_CLK = 0x4 - Configure as the PDM CLK output</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD22STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 22 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD22INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 22 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD22PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 22 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD21FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 21 function select<br><br>
|
|
SWDIO = 0x0 - Configure as the serial wire debug data signal<br>
|
|
M1nCE6 = 0x1 - Configure as the SPI channel 6 nCE signal from IOMSTR1<br>
|
|
TCTB2 = 0x2 - Configure as the input/output signal from CTIMER B2<br>
|
|
GPIO21 = 0x3 - Configure as GPIO21</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD21STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 21 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD21INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 21 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD21PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 21 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD20FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 20 function select<br><br>
|
|
SWDCK = 0x0 - Configure as the serial wire debug clock signal<br>
|
|
M1nCE5 = 0x1 - Configure as the SPI channel 5 nCE signal from IOMSTR1<br>
|
|
TCTA2 = 0x2 - Configure as the input/output signal from CTIMER A2<br>
|
|
GPIO20 = 0x3 - Configure as GPIO20</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD20STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 20 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD20INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 20 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD20PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 20 pulldown enable<br><br>
|
|
DIS = 0x0 - Pulldown disabled<br>
|
|
EN = 0x1 - Pulldown enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGG" class="panel-title">PADREGG - Pad Configuration Register G</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010018</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD27 through PAD24. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">PAD27RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD27FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD27STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD27INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD27PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD26FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD26STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD26INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD26PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PAD25RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD25FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD25STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD25INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD25PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD24FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD24STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD24INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD24PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>PAD27RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 27 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD27FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 27 function select<br><br>
|
|
EXTHF = 0x0 - Configure as the external HFRC clock signal<br>
|
|
M1nCE4 = 0x1 - Configure as the SPI channel 4 nCE signal from IOMSTR1<br>
|
|
TCTA1 = 0x2 - Configure as the input/output signal from CTIMER A1<br>
|
|
GPIO27 = 0x3 - Configure as GPIO27</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD27STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 27 drive strentgh<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD27INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 27 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD27PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 27 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:22</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD26FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 26 function select<br><br>
|
|
EXTLF = 0x0 - Configure as the external LFRC clock signal<br>
|
|
M0nCE3 = 0x1 - Configure as the SPI channel 3 nCE signal from IOMSTR0<br>
|
|
TCTB0 = 0x2 - Configure as the input/output signal from CTIMER B0<br>
|
|
GPIO26 = 0x3 - Configure as GPIO26</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD26STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 26 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD26INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 26 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD26PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 26 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>PAD25RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 25 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD25FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 25 function select<br><br>
|
|
EXTXT = 0x0 - Configure as the external XT clock signal<br>
|
|
M0nCE2 = 0x1 - Configure as the SPI channel 2 nCE signal from IOMSTR0<br>
|
|
TCTA0 = 0x2 - Configure as the input/output signal from CTIMER A0<br>
|
|
GPIO25 = 0x3 - Configure as GPIO25</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD25STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 25 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD25INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 25 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD25PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 25 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD24FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 24 function select<br><br>
|
|
DIS = 0x0 - Pad disabled<br>
|
|
M0nCE1 = 0x1 - Configure as the SPI channel 1 nCE signal from IOMSTR0<br>
|
|
CLKOUT = 0x2 - Configure as the CLKOUT signal<br>
|
|
GPIO24 = 0x3 - Configure as GPIO24</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD24STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 24 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD24INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 24 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD24PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 24 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGH" class="panel-title">PADREGH - Pad Configuration Register H</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x4001001C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD31 through PAD28. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD31FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD31STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD31INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD31PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD30FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD30STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD30INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD30PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD29FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD29STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD29INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD29PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD28FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD28STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD28INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD28PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD31FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 31 function select<br><br>
|
|
ADC6 = 0x0 - Configure as the analog ADC input 6 signal<br>
|
|
M0nCE4 = 0x1 - Configure as the SPI channel 4 nCE signal from IOMSTR0<br>
|
|
TCTA3 = 0x2 - Configure as the input/output signal from CTIMER A3<br>
|
|
GPIO31 = 0x3 - Configure as GPIO31</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD31STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 31 drive strentgh<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD31INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 31 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD31PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 31 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:22</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD30FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 30 function select<br><br>
|
|
ADC5 = 0x0 - Configure as the analog ADC input 5 signal<br>
|
|
M1nCE7 = 0x1 - Configure as the SPI channel 7 nCE signal from IOMSTR1<br>
|
|
TCTB2 = 0x2 - Configure as the input/output signal from CTIMER B2<br>
|
|
GPIO30 = 0x3 - Configure as GPIO30</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD30STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 30 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD30INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 30 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD30PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 30 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD29FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 29 function select<br><br>
|
|
ADC4 = 0x0 - Configure as the analog ADC input 4 signal<br>
|
|
M1nCE6 = 0x1 - Configure as the SPI channel 6 nCE signal from IOMSTR1<br>
|
|
TCTA2 = 0x2 - Configure as the input/output signal from CTIMER A2<br>
|
|
GPIO29 = 0x3 - Configure as GPIO29<br>
|
|
PDM CLK = 0x7 - Configure as PDM Clock output</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD29STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 29 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD29INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 29 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD29PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 29 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD28FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 28 function select<br><br>
|
|
DIS = 0x0 - Pad disabled<br>
|
|
M1nCE5 = 0x1 - Configure as the SPI channel 5 nCE signal from IOMSTR1<br>
|
|
TCTB1 = 0x2 - Configure as the input/output signal from CTIMER B1<br>
|
|
GPIO28 = 0x3 - Configure as GPIO28</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD28STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 28 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD28INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 28 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD28PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 28 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGI" class="panel-title">PADREGI - Pad Configuration Register I</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010020</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD35 through PAD32. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD35FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD35STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD35INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD35PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD34FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD34STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD34INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD34PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD33FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD33STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD33INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD33PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD32FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD32STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD32INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD32PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD35FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 35 function select<br><br>
|
|
DIS = 0x0 - Pad disabled<br>
|
|
M1nCE0 = 0x1 - Configure as the SPI channel 0 nCE signal from IOMSTR1<br>
|
|
UARTTX = 0x2 - Configure as the UART TX signal<br>
|
|
GPIO35 = 0x3 - Configure as GPIO35</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD35STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 35 drive strentgh<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD35INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 35 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD35PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 35 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:22</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD34FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 34 function select<br><br>
|
|
CMPRF2 = 0x0 - Configure as the analog comparator reference 2 signal<br>
|
|
M0nCE7 = 0x1 - Configure as the SPI channel 7 nCE signal from IOMSTR0<br>
|
|
DIS = 0x2 - Pad disabled<br>
|
|
GPIO34 = 0x3 - Configure as GPIO34</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD34STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 34 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD34INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 34 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD34PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 34 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD33FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 33 function select<br><br>
|
|
CMPRF1 = 0x0 - Configure as the analog comparator reference 1 signal<br>
|
|
M0nCE6 = 0x1 - Configure as the SPI channel 6 nCE signal from IOMSTR0<br>
|
|
DIS = 0x2 - Pad disabled<br>
|
|
GPIO33 = 0x3 - Configure as GPIO33</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD33STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 33 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD33INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 33 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD33PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 33 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD32FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 32 function select<br><br>
|
|
ADC7 = 0x0 - Configure as the analog ADC input 7 signal<br>
|
|
M0nCE5 = 0x1 - Configure as the SPI channel 5 nCE signal from IOMSTR0<br>
|
|
TCTB3 = 0x2 - Configure as the input/output signal from CTIMER B3<br>
|
|
GPIO32 = 0x3 - Configure as GPIO32</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD32STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 32 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD32INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 32 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD32PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 32 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGJ" class="panel-title">PADREGJ - Pad Configuration Register J</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010024</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD39 through PAD36. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">PAD39RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD39FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD39STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD39INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD39PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD38FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD38STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD38INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD38PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD37FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD37STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD37INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD37PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD36FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD36STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD36INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD36PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>PAD39RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 39 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD39FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 39 function select<br><br>
|
|
UART0TX = 0x0 - Configure as the UART0 TX Signal<br>
|
|
UARTTX = 0x1 - Configure as the UART TX signal<br>
|
|
CLKOUT = 0x2 - Configure as the CLKOUT signal<br>
|
|
GPIO39 = 0x3 - Configure as GPIO39</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD39STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 39 drive strentgh<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD39INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 39 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD39PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 39 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:22</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD38FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 38 function select<br><br>
|
|
TRIG3 = 0x0 - Configure as the ADC Trigger 3 signal<br>
|
|
M1nCE3 = 0x1 - Configure as the SPI channel 3 nCE signal from IOMSTR1<br>
|
|
UACTS = 0x2 - Configure as the UART CTS signal<br>
|
|
GPIO38 = 0x3 - Configure as GPIO38</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD38STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 38 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD38INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 38 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD38PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 38 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD37FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 37 function select<br><br>
|
|
TRIG2 = 0x0 - Configure as the ADC Trigger 2 signal<br>
|
|
M1nCE2 = 0x1 - Configure as the SPI channel 2 nCE signal from IOMSTR1<br>
|
|
UARTS = 0x2 - Configure as the UART RTS signal<br>
|
|
GPIO37 = 0x3 - Configure as GPIO37<br>
|
|
PDM_DATA = 0x6 - Configure as PDM DATA input</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD37STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 37 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD37INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 37 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD37PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 37 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD36FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 36 function select<br><br>
|
|
TRIG1 = 0x0 - Configure as the ADC Trigger 1 signal<br>
|
|
M1nCE1 = 0x1 - Configure as the SPI channel 1 nCE signal from IOMSTR1<br>
|
|
UARTRX = 0x2 - Configure as the UART RX signal<br>
|
|
GPIO36 = 0x3 - Configure as GPIO36</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD36STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 36 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD36INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 36 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD36PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 36 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGK" class="panel-title">PADREGK - Pad Configuration Register K</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010028</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD43 through PAD40. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">PAD43RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD43FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD43STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD43INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD43PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PAD42RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD42FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD42STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD42INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD42PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD41PWRUP
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD41FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD41STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD41INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD41PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PAD40RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD40FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD40STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD40INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD40PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>PAD43RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 43 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD43FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 43 function select<br><br>
|
|
M2nCE4 = 0x0 - Configure as the SPI channel 4 nCE signal from IOMSTR2<br>
|
|
M0nCE1 = 0x1 - Configure as the SPI channel 1 nCE signal from IOMSTR0<br>
|
|
TCTB0 = 0x2 - Configure as the input/output signal from CTIMER B0<br>
|
|
GPIO43 = 0x3 - Configure as GPIO43</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD43STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 43 drive strentgh<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD43INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 43 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD43PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 43 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:22</td>
|
|
<td>PAD42RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 42 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD42FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 42 function select<br><br>
|
|
M2nCE2 = 0x0 - Configure as the SPI channel 2 nCE signal from IOMSTR2<br>
|
|
M0nCE0 = 0x1 - Configure as the SPI channel 0 nCE signal from IOMSTR0<br>
|
|
TCTA0 = 0x2 - Configure as the input/output signal from CTIMER A0<br>
|
|
GPIO42 = 0x3 - Configure as GPIO42</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD42STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 42 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD42INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 42 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD42PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 42 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>PAD41PWRUP</td>
|
|
<td>RW</td>
|
|
<td>Pad 41 upper power switch enable<br><br>
|
|
DIS = 0x0 - Power switch disabled<br>
|
|
EN = 0x1 - Power switch enabled (VDD switch)</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD41FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 41 function select<br><br>
|
|
M2nCE1 = 0x0 - Configure as the SPI channel 1 nCE signal from IOMSTR2<br>
|
|
DIS = 0x1 - Pad disabled<br>
|
|
SWO = 0x2 - Configure as the serial wire debug SWO signal<br>
|
|
GPIO41 = 0x3 - Configure as GPIO41</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD41STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 41 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD41INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 41 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD41PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 41 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>PAD40RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 40 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD40FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 40 function select<br><br>
|
|
UART0RX = 0x0 - Configure as the UART0 RX input signal<br>
|
|
UARTRX = 0x1 - Configure as the UART RX signal<br>
|
|
TRIG0 = 0x2 - Configure as the ADC Trigger 0 signal<br>
|
|
GPIO40 = 0x3 - Configure as GPIO40</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD40STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 40 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD40INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 40 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD40PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 40 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGL" class="panel-title">PADREGL - Pad Configuration Register L</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x4001002C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD47 through PAD44. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD47FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD47STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD47INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD47PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD46FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD46STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD46INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD46PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD45FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD45STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD45INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD45PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD44FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD44STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD44INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD44PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:30</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:27</td>
|
|
<td>PAD47FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 47 function select<br><br>
|
|
DIS = 0x0 - Pad disabled<br>
|
|
M0nCE5 = 0x1 - Configure as the SPI channel 5 nCE signal from IOMSTR0<br>
|
|
TCTB2 = 0x2 - Configure as the input/output signal from CTIMER B2<br>
|
|
GPIO47 = 0x3 - Configure as GPIO47</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>PAD47STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 47 drive strentgh<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>PAD47INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 47 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD47PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 47 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:22</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:19</td>
|
|
<td>PAD46FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 46 function select<br><br>
|
|
DIS = 0x0 - Pad disabled<br>
|
|
M0nCE4 = 0x1 - Configure as the SPI channel 4 nCE signal from IOMSTR0<br>
|
|
TCTA2 = 0x2 - Configure as the input/output signal from CTIMER A2<br>
|
|
GPIO46 = 0x3 - Configure as GPIO46</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>PAD46STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 46 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>PAD46INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 46 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD46PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 46 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD45FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 45 function select<br><br>
|
|
DIS = 0x0 - Pad disabled<br>
|
|
M0nCE3 = 0x1 - Configure as the SPI channel 3 nCE signal from IOMSTR0<br>
|
|
TCTB1 = 0x2 - Configure as the input/output signal from CTIMER B1<br>
|
|
GPIO45 = 0x3 - Configure as GPIO45</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD45STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 45 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD45INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 45 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD45PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 45 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD44FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 44 function select<br><br>
|
|
UA1RTS = 0x0 - Configure as the UART1 RTS output signal<br>
|
|
M0nCE2 = 0x1 - Configure as the SPI channel 2 nCE signal from IOMSTR0<br>
|
|
TCTA1 = 0x2 - Configure as the input/output signal from CTIMER A1<br>
|
|
GPIO44 = 0x3 - Configure as GPIO44</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD44STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 44 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD44INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 44 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD44PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 44 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADREGM" class="panel-title">PADREGM - Pad Configuration Register M</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010030</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register controls the pad configuration controls for PAD49 through PAD48. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="16">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PAD49RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD49FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD49STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD49INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD49PULL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PAD48RSEL
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">PAD48FNCSEL
|
|
<br>0x3</td>
|
|
|
|
<td align="center" colspan="1">PAD48STRNG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD48INPEN
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD48PULL
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:16</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:14</td>
|
|
<td>PAD49RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 49 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:11</td>
|
|
<td>PAD49FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 49 function select<br><br>
|
|
DIS = 0x0 - Pad disabled<br>
|
|
M0nCE7 = 0x1 - Configure as the SPI channel 7 nCE signal from IOMSTR0<br>
|
|
TCTB3 = 0x2 - Configure as the input/output signal from CTIMER B3<br>
|
|
GPIO49 = 0x3 - Configure as GPIO49</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>PAD49STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 49 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>PAD49INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 49 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD49PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 49 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:6</td>
|
|
<td>PAD48RSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 48 pullup resistor selection.<br><br>
|
|
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms<br>
|
|
PULL6K = 0x1 - Pullup is ~6 KOhms<br>
|
|
PULL12K = 0x2 - Pullup is ~12 KOhms<br>
|
|
PULL24K = 0x3 - Pullup is ~24 KOhms</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:3</td>
|
|
<td>PAD48FNCSEL</td>
|
|
<td>RW</td>
|
|
<td>Pad 48 function select<br><br>
|
|
DIS = 0x0 - Pad disabled<br>
|
|
M0nCE6 = 0x1 - Configure as the SPI channel 6 nCE signal from IOMSTR0<br>
|
|
TCTA3 = 0x2 - Configure as the input/output signal from CTIMER A3<br>
|
|
GPIO48 = 0x3 - Configure as GPIO48</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>PAD48STRNG</td>
|
|
<td>RW</td>
|
|
<td>Pad 48 drive strength<br><br>
|
|
LOW = 0x0 - Low drive strength<br>
|
|
HIGH = 0x1 - High drive strength</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>PAD48INPEN</td>
|
|
<td>RW</td>
|
|
<td>Pad 48 input enable<br><br>
|
|
DIS = 0x0 - Pad input disabled<br>
|
|
EN = 0x1 - Pad input enabled</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD48PULL</td>
|
|
<td>RW</td>
|
|
<td>Pad 48 pullup enable<br><br>
|
|
DIS = 0x0 - Pullup disabled<br>
|
|
EN = 0x1 - Pullup enabled</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="CFGA" class="panel-title">CFGA - GPIO Configuration Register A</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010040</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO configuration controls for GPIO[7:0]. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">GPIO7INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO7OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO7INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO6INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO6OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO6INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO5INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO5OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO5INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO4INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO4OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO4INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO3INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO3OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO3INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO2INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO2OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO2INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO1INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO1OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO1INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO0INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO0OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO0INCFG
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>GPIO7INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO7 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30:29</td>
|
|
<td>GPIO7OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO7 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>GPIO7INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO7 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27</td>
|
|
<td>GPIO6INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO6 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:25</td>
|
|
<td>GPIO6OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO6 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>GPIO6INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO6 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>GPIO5INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO5 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22:21</td>
|
|
<td>GPIO5OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO5 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>GPIO5INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO5 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19</td>
|
|
<td>GPIO4INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO4 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18:17</td>
|
|
<td>GPIO4OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO4 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO4INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO4 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO3INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO3 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14:13</td>
|
|
<td>GPIO3OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO3 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO3INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO3 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO2INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO2 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10:9</td>
|
|
<td>GPIO2OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO2 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO2INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO2 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO1INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO1 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6:5</td>
|
|
<td>GPIO1OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO1 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO1INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO1 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO0INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO0 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2:1</td>
|
|
<td>GPIO0OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO0 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO0INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO0 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="CFGB" class="panel-title">CFGB - GPIO Configuration Register B</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010044</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO configuration controls for GPIO[15:8]. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">GPIO15INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO15OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO15INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO14INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO14OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO14INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO13INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO13OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO13INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO12INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO12OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO12INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO11INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO11OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO11INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO10INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO10OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO10INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO9INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO9OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO9INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO8INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO8OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO8INCFG
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>GPIO15INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO15 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30:29</td>
|
|
<td>GPIO15OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO15 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>GPIO15INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO15 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27</td>
|
|
<td>GPIO14INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO14 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:25</td>
|
|
<td>GPIO14OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO14 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>GPIO14INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO14 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>GPIO13INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO13 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22:21</td>
|
|
<td>GPIO13OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO13 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>GPIO13INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO13 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19</td>
|
|
<td>GPIO12INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO12 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18:17</td>
|
|
<td>GPIO12OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO12 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO12INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO12 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO11INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO11 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14:13</td>
|
|
<td>GPIO11OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO11 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO11INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO11 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO10INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO10 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10:9</td>
|
|
<td>GPIO10OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO10 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO10INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO10 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO9INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO9 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6:5</td>
|
|
<td>GPIO9OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO9 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO9INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO9 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO8INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO8 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2:1</td>
|
|
<td>GPIO8OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO8 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO8INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO8 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="CFGC" class="panel-title">CFGC - GPIO Configuration Register C</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010048</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO configuration controls for GPIO[23:16]. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">GPIO23INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO23OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO23INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO22INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO22OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO22INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO21INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO21OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO21INCFG
|
|
<br>0x1</td>
|
|
|
|
<td align="center" colspan="1">GPIO20INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO20OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO20INCFG
|
|
<br>0x1</td>
|
|
|
|
<td align="center" colspan="1">GPIO19INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO19OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO19INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO18INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO18OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO18INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO17INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO17OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO17INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO16INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO16OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO16INCFG
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>GPIO23INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO23 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30:29</td>
|
|
<td>GPIO23OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO23 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>GPIO23INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO23 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27</td>
|
|
<td>GPIO22INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO22 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:25</td>
|
|
<td>GPIO22OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO22 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>GPIO22INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO22 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>GPIO21INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO21 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22:21</td>
|
|
<td>GPIO21OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO21 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>GPIO21INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO21 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19</td>
|
|
<td>GPIO20INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO20 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18:17</td>
|
|
<td>GPIO20OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO20 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO20INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO20 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO19INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO19 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14:13</td>
|
|
<td>GPIO19OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO19 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO19INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO19 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO18INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO18 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10:9</td>
|
|
<td>GPIO18OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO18 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO18INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO18 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO17INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO17 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6:5</td>
|
|
<td>GPIO17OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO17 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO17INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO17 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO16INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO16 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2:1</td>
|
|
<td>GPIO16OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO16 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO16INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO16 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="CFGD" class="panel-title">CFGD - GPIO Configuration Register D</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x4001004C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO configuration controls for GPIO[31:24]. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">GPIO31INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO31OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO31INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO30INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO30OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO30INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO29INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO29OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO29INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO28INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO28OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO28INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO27INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO27OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO27INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO26INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO26OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO26INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO25INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO25OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO25INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO24INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO24OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO24INCFG
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>GPIO31INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO31 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30:29</td>
|
|
<td>GPIO31OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO31 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>GPIO31INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO31 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27</td>
|
|
<td>GPIO30INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO30 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:25</td>
|
|
<td>GPIO30OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO30 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>GPIO30INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO30 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>GPIO29INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO29 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22:21</td>
|
|
<td>GPIO29OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO29 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>GPIO29INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO29 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19</td>
|
|
<td>GPIO28INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO28 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18:17</td>
|
|
<td>GPIO28OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO28 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO28INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO28 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO27INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO27 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14:13</td>
|
|
<td>GPIO27OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO27 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO27INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO27 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO26INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO26 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10:9</td>
|
|
<td>GPIO26OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO26 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO26INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO26 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO25INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO25 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6:5</td>
|
|
<td>GPIO25OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO25 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO25INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO25 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO24INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO24 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2:1</td>
|
|
<td>GPIO24OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO24 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO24INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO24 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="CFGE" class="panel-title">CFGE - GPIO Configuration Register E</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010050</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO configuration controls for GPIO[39:32]. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">GPIO39INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO39OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO39INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO38INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO38OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO38INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO37INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO37OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO37INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO36INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO36OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO36INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO35INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO35OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO35INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO34INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO34OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO34INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO33INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO33OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO33INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO32INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO32OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO32INCFG
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>GPIO39INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO39 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30:29</td>
|
|
<td>GPIO39OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO39 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>GPIO39INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO39 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27</td>
|
|
<td>GPIO38INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO38 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:25</td>
|
|
<td>GPIO38OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO38 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>GPIO38INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO38 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>GPIO37INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO37 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22:21</td>
|
|
<td>GPIO37OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO37 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>GPIO37INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO37 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19</td>
|
|
<td>GPIO36INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO36 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18:17</td>
|
|
<td>GPIO36OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO36 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO36INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO36 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO35INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO35 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14:13</td>
|
|
<td>GPIO35OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO35 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO35INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO35 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO34INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO34 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10:9</td>
|
|
<td>GPIO34OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO34 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO34INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO34 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO33INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO33 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6:5</td>
|
|
<td>GPIO33OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO33 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO33INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO33 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO32INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO32 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2:1</td>
|
|
<td>GPIO32OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO32 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO32INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO32 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="CFGF" class="panel-title">CFGF - GPIO Configuration Register F</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010054</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO configuration controls for GPIO[47:40]. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">GPIO47INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO47OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO47INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO46INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO46OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO46INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO45INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO45OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO45INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO44INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO44OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO44INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO43INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO43OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO43INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO42INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO42OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO42INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO41INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO41OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO41INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO40INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO40OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO40INCFG
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>GPIO47INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO47 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30:29</td>
|
|
<td>GPIO47OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO47 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>GPIO47INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO47 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27</td>
|
|
<td>GPIO46INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO46 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:25</td>
|
|
<td>GPIO46OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO46 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>GPIO46INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO46 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>GPIO45INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO45 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22:21</td>
|
|
<td>GPIO45OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO45 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>GPIO45INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO45 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19</td>
|
|
<td>GPIO44INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO44 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18:17</td>
|
|
<td>GPIO44OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO44 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO44INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO44 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO43INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO43 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14:13</td>
|
|
<td>GPIO43OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO43 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO43INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO43 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO42INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO42 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10:9</td>
|
|
<td>GPIO42OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO42 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO42INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO42 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO41INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO41 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6:5</td>
|
|
<td>GPIO41OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO41 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO41INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO41 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO40INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO40 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2:1</td>
|
|
<td>GPIO40OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO40 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO40INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO40 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="CFGG" class="panel-title">CFGG - GPIO Configuration Register G</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010058</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO configuration controls for GPIO[49:48]. Writes to this register must be unlocked by the PADKEY register.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="24">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO49INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO49OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO49INCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO48INTD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">GPIO48OUTCFG
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO48INCFG
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:8</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO49INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO49 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6:5</td>
|
|
<td>GPIO49OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO49 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO49INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO49 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO48INTD</td>
|
|
<td>RW</td>
|
|
<td>GPIO48 interrupt direction.<br><br>
|
|
INTLH = 0x0 - Interrupt on low to high GPIO transition<br>
|
|
INTHL = 0x1 - Interrupt on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2:1</td>
|
|
<td>GPIO48OUTCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO48 output configuration.<br><br>
|
|
DIS = 0x0 - Output disabled<br>
|
|
PUSHPULL = 0x1 - Output is push-pull<br>
|
|
OD = 0x2 - Output is open drain<br>
|
|
TS = 0x3 - Output is tri-state</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO48INCFG</td>
|
|
<td>RW</td>
|
|
<td>GPIO48 input enable.<br><br>
|
|
READ = 0x0 - Read the GPIO pin data<br>
|
|
RDZERO = 0x1 - Readback will always be zero</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="PADKEY" class="panel-title">PADKEY - Key Register for all pad configuration registers</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010060</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Key Register for all pad configuration registers</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="32">PADKEY
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:0</td>
|
|
<td>PADKEY</td>
|
|
<td>RW</td>
|
|
<td>Key register value.<br><br>
|
|
Key = 0x73 - Key</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="RDA" class="panel-title">RDA - GPIO Input Register A</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010080</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Input Register A</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="32">RDA
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:0</td>
|
|
<td>RDA</td>
|
|
<td>RO</td>
|
|
<td>GPIO31-0 read data.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="RDB" class="panel-title">RDB - GPIO Input Register B</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010084</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Input Register B</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="14">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="18">RDB
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:0</td>
|
|
<td>RDB</td>
|
|
<td>RO</td>
|
|
<td>GPIO49-32 read data.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="WTA" class="panel-title">WTA - GPIO Output Register A</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010088</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Output Register A</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="32">WTA
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:0</td>
|
|
<td>WTA</td>
|
|
<td>RW</td>
|
|
<td>GPIO31-0 write data.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="WTB" class="panel-title">WTB - GPIO Output Register B</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x4001008C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Output Register B</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="14">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="18">WTB
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:0</td>
|
|
<td>WTB</td>
|
|
<td>RW</td>
|
|
<td>GPIO49-32 write data.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="WTSA" class="panel-title">WTSA - GPIO Output Register A Set</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010090</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Output Register A Set</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="32">WTSA
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:0</td>
|
|
<td>WTSA</td>
|
|
<td>WO</td>
|
|
<td>Set the GPIO31-0 write data.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="WTSB" class="panel-title">WTSB - GPIO Output Register B Set</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010094</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Output Register B Set</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="14">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="18">WTSB
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:0</td>
|
|
<td>WTSB</td>
|
|
<td>WO</td>
|
|
<td>Set the GPIO49-32 write data.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="WTCA" class="panel-title">WTCA - GPIO Output Register A Clear</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010098</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Output Register A Clear</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="32">WTCA
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:0</td>
|
|
<td>WTCA</td>
|
|
<td>WO</td>
|
|
<td>Clear the GPIO31-0 write data.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="WTCB" class="panel-title">WTCB - GPIO Output Register B Clear</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x4001009C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Output Register B Clear</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="14">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="18">WTCB
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:0</td>
|
|
<td>WTCB</td>
|
|
<td>WO</td>
|
|
<td>Clear the GPIO49-32 write data.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ENA" class="panel-title">ENA - GPIO Enable Register A</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100A0</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Enable Register A</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="32">ENA
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:0</td>
|
|
<td>ENA</td>
|
|
<td>RW</td>
|
|
<td>GPIO31-0 output enables<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ENB" class="panel-title">ENB - GPIO Enable Register B</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100A4</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Enable Register B</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="14">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="18">ENB
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:0</td>
|
|
<td>ENB</td>
|
|
<td>RW</td>
|
|
<td>GPIO49-32 output enables<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ENSA" class="panel-title">ENSA - GPIO Enable Register A Set</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100A8</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Enable Register A Set</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="32">ENSA
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:0</td>
|
|
<td>ENSA</td>
|
|
<td>RW</td>
|
|
<td>Set the GPIO31-0 output enables<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ENSB" class="panel-title">ENSB - GPIO Enable Register B Set</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100AC</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Enable Register B Set</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="14">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="18">ENSB
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:0</td>
|
|
<td>ENSB</td>
|
|
<td>RW</td>
|
|
<td>Set the GPIO49-32 output enables<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ENCA" class="panel-title">ENCA - GPIO Enable Register A Clear</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100B4</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Enable Register A Clear</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="32">ENCA
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:0</td>
|
|
<td>ENCA</td>
|
|
<td>RW</td>
|
|
<td>Clear the GPIO31-0 output enables<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ENCB" class="panel-title">ENCB - GPIO Enable Register B Clear</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100B8</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Enable Register B Clear</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="14">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="18">ENCB
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:0</td>
|
|
<td>ENCB</td>
|
|
<td>RW</td>
|
|
<td>Clear the GPIO49-32 output enables<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="STMRCAP" class="panel-title">STMRCAP - STIMER Capture Control</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100BC</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>STIMER Capture trigger select and enable.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">STPOL3
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">STSEL3
|
|
<br>0x3f</td>
|
|
|
|
<td align="center" colspan="1">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">STPOL2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">STSEL2
|
|
<br>0x3f</td>
|
|
|
|
<td align="center" colspan="1">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">STPOL1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">STSEL1
|
|
<br>0x3f</td>
|
|
|
|
<td align="center" colspan="1">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">STPOL0
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">STSEL0
|
|
<br>0x3f</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30</td>
|
|
<td>STPOL3</td>
|
|
<td>RW</td>
|
|
<td>STIMER Capture 3 Polarity.<br><br>
|
|
CAPLH = 0x0 - Capture on low to high GPIO transition<br>
|
|
CAPHL = 0x1 - Capture on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29:24</td>
|
|
<td>STSEL3</td>
|
|
<td>RW</td>
|
|
<td>STIMER Capture 3 Select.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22</td>
|
|
<td>STPOL2</td>
|
|
<td>RW</td>
|
|
<td>STIMER Capture 2 Polarity.<br><br>
|
|
CAPLH = 0x0 - Capture on low to high GPIO transition<br>
|
|
CAPHL = 0x1 - Capture on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21:16</td>
|
|
<td>STSEL2</td>
|
|
<td>RW</td>
|
|
<td>STIMER Capture 2 Select.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14</td>
|
|
<td>STPOL1</td>
|
|
<td>RW</td>
|
|
<td>STIMER Capture 1 Polarity.<br><br>
|
|
CAPLH = 0x0 - Capture on low to high GPIO transition<br>
|
|
CAPHL = 0x1 - Capture on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13:8</td>
|
|
<td>STSEL1</td>
|
|
<td>RW</td>
|
|
<td>STIMER Capture 1 Select.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6</td>
|
|
<td>STPOL0</td>
|
|
<td>RW</td>
|
|
<td>STIMER Capture 0 Polarity.<br><br>
|
|
CAPLH = 0x0 - Capture on low to high GPIO transition<br>
|
|
CAPHL = 0x1 - Capture on high to low GPIO transition</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:0</td>
|
|
<td>STSEL0</td>
|
|
<td>RW</td>
|
|
<td>STIMER Capture 0 Select.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="IOM0IRQ" class="panel-title">IOM0IRQ - STIMER Capture Control</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100C0</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>IOMSTR0 IRQ select for flow control.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="26">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">IOM0IRQ
|
|
<br>0x3f</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:6</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:0</td>
|
|
<td>IOM0IRQ</td>
|
|
<td>RW</td>
|
|
<td>IOMSTR0 IRQ pad select.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="IOM1IRQ" class="panel-title">IOM1IRQ - STIMER Capture Control</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100C4</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>IOMSTR1 IRQ select for flow control.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="26">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">IOM1IRQ
|
|
<br>0x3f</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:6</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:0</td>
|
|
<td>IOM1IRQ</td>
|
|
<td>RW</td>
|
|
<td>IOMSTR1 IRQ pad select.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="IOM2IRQ" class="panel-title">IOM2IRQ - STIMER Capture Control</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100C8</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>IOMSTR2 IRQ select for flow control.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="26">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">IOM2IRQ
|
|
<br>0x3f</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:6</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:0</td>
|
|
<td>IOM2IRQ</td>
|
|
<td>RW</td>
|
|
<td>IOMSTR2 IRQ pad select.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="IOM3IRQ" class="panel-title">IOM3IRQ - STIMER Capture Control</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100CC</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>IOMSTR3 IRQ select for flow control.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="26">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">IOM3IRQ
|
|
<br>0x3f</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:6</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:0</td>
|
|
<td>IOM3IRQ</td>
|
|
<td>RW</td>
|
|
<td>IOMSTR3 IRQ pad select.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="IOM4IRQ" class="panel-title">IOM4IRQ - STIMER Capture Control</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100D0</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>IOMSTR4 IRQ select for flow control.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="26">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">IOM4IRQ
|
|
<br>0x3f</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:6</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:0</td>
|
|
<td>IOM4IRQ</td>
|
|
<td>RW</td>
|
|
<td>IOMSTR4 IRQ pad select.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="IOM5IRQ" class="panel-title">IOM5IRQ - STIMER Capture Control</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100D4</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>IOMSTR5 IRQ select for flow control.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="26">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">IOM5IRQ
|
|
<br>0x3f</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:6</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5:0</td>
|
|
<td>IOM5IRQ</td>
|
|
<td>RW</td>
|
|
<td>IOMSTR5 IRQ pad select.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="LOOPBACK" class="panel-title">LOOPBACK - IOM to IOS Loopback Control</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100D8</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>IOM to IOS loopback control.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="29">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">LOOPBACK
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:3</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2:0</td>
|
|
<td>LOOPBACK</td>
|
|
<td>RW</td>
|
|
<td>IOM to IOS loopback control.<br><br>
|
|
LOOP0 = 0x0 - Loop IOM0 to IOS<br>
|
|
LOOP1 = 0x1 - Loop IOM1 to IOS<br>
|
|
LOOP2 = 0x2 - Loop IOM02to IOS<br>
|
|
LOOPNONE = 0x3 - No loopback connections</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="GPIOOBS" class="panel-title">GPIOOBS - GPIO Observation Mode Sample register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100DC</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>GPIO Observation mode sample register</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="16">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="16">OBS_DATA
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:16</td>
|
|
<td>RSVD</td>
|
|
<td>R0</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:0</td>
|
|
<td>OBS_DATA</td>
|
|
<td>RW</td>
|
|
<td>Sample of the data output on the GPIO observation port. May have async sampling issues, as the data is not synronized to the read operation. Intended for debug purposes only<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGA" class="panel-title">ALTPADCFGA - Alternate Pad Configuration reg0 (Pads 3,2,1,0)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100E0</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 3, 2, 1, 0</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD3_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD3_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD2_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD2_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD1_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD1_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD0_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD0_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD3_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 3 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD3_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 3 high order drive strength selection. Used in conjunction with PAD3STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD2_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 2 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD2_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 2 high order drive strength selection. Used in conjunction with PAD2STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD1_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 1 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD1_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 1 high order drive strength selection. Used in conjunction with PAD1STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD0_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 0 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD0_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 0 high order drive strength selection. Used in conjunction with PAD0STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGB" class="panel-title">ALTPADCFGB - Alternate Pad Configuration reg1 (Pads 7,6,5,4)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100E4</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 7, 6, 5, 4</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD7_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD7_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD6_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD6_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD5_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD5_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD4_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD4_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD7_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 7 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD7_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 7 high order drive strength selection. Used in conjunction with PAD7STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD6_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 6 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD6_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 6 high order drive strength selection. Used in conjunction with PAD6STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD5_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 5 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD5_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 5 high order drive strength selection. Used in conjunction with PAD5STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD4_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 4 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD4_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 4 high order drive strength selection. Used in conjunction with PAD4STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGC" class="panel-title">ALTPADCFGC - Alternate Pad Configuration reg2 (Pads 11,10,9,8)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100E8</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 11, 10, 9, 8</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD11_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD11_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD10_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD10_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD9_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD9_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD8_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD8_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD11_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 11 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD11_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 11 high order drive strength selection. Used in conjunction with PAD11STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD10_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 10 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD10_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 10 high order drive strength selection. Used in conjunction with PAD10STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD9_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 9 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD9_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 9 high order drive strength selection. Used in conjunction with PAD9STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD8_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 8 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD8_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 8 high order drive strength selection. Used in conjunction with PAD8STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGD" class="panel-title">ALTPADCFGD - Alternate Pad Configuration reg3 (Pads 15,14,13,12)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100EC</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 15, 14, 13, 12</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD15_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD15_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD14_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD14_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD13_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD13_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD12_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD12_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD15_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 15 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD15_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 15 high order drive strength selection. Used in conjunction with PAD15STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD14_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 14 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD14_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 14 high order drive strength selection. Used in conjunction with PAD14STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD13_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 13 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD13_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 13 high order drive strength selection. Used in conjunction with PAD13STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD12_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 12 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD12_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 12 high order drive strength selection. Used in conjunction with PAD12STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGE" class="panel-title">ALTPADCFGE - Alternate Pad Configuration reg4 (Pads 19,18,17,16)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100F0</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 19, 18, 17, 16</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD19_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD19_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD18_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD18_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD17_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD17_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD16_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD16_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD19_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 19 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD19_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 19 high order drive strength selection. Used in conjunction with PAD19STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD18_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 18 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD18_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 18 high order drive strength selection. Used in conjunction with PAD18STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD17_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 17 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD17_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 17 high order drive strength selection. Used in conjunction with PAD17STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD16_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 16 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD16_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 16 high order drive strength selection. Used in conjunction with PAD16STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGF" class="panel-title">ALTPADCFGF - Alternate Pad Configuration reg5 (Pads 23,22,21,20)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100F4</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 23, 22, 21, 20</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD23_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD23_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD22_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD22_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD21_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD21_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD20_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD20_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD23_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 23 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD23_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 23 high order drive strength selection. Used in conjunction with PAD23STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD22_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 22 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD22_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 22 high order drive strength selection. Used in conjunction with PAD22STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD21_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 21 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD21_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 21 high order drive strength selection. Used in conjunction with PAD21STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD20_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 20 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD20_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 20 high order drive strength selection. Used in conjunction with PAD20STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGG" class="panel-title">ALTPADCFGG - Alternate Pad Configuration reg6 (Pads 27,26,25,24)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100F8</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 27, 26, 25, 24</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD27_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD27_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD26_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD26_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD25_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD25_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD24_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD24_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD27_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 27 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD27_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 27 high order drive strength selection. Used in conjunction with PAD27STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD26_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 26 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD26_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 26 high order drive strength selection. Used in conjunction with PAD26STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD25_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 25 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD25_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 25 high order drive strength selection. Used in conjunction with PAD25STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD24_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 24 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD24_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 24 high order drive strength selection. Used in conjunction with PAD24STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGH" class="panel-title">ALTPADCFGH - Alternate Pad Configuration reg7 (Pads 31,30,29,28)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x400100FC</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 31, 30, 29, 28</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD31_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD31_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD30_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD30_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD29_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD29_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD28_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD28_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD31_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 31 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD31_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 31 high order drive strength selection. Used in conjunction with PAD31STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD30_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 30 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD30_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 30 high order drive strength selection. Used in conjunction with PAD30STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD29_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 29 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD29_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 29 high order drive strength selection. Used in conjunction with PAD29STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD28_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 28 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD28_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 28 high order drive strength selection. Used in conjunction with PAD28STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGI" class="panel-title">ALTPADCFGI - Alternate Pad Configuration reg8 (Pads 35,34,33,32)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010100</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 35, 34, 33, 32</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD35_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD35_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD34_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD34_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD33_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD33_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD32_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD32_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD35_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 35 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD35_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 35 high order drive strength selection. Used in conjunction with PAD35STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD34_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 34 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD34_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 34 high order drive strength selection. Used in conjunction with PAD34STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD33_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 33 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD33_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 33 high order drive strength selection. Used in conjunction with PAD33STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD32_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 32 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD32_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 32 high order drive strength selection. Used in conjunction with PAD32STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGJ" class="panel-title">ALTPADCFGJ - Alternate Pad Configuration reg9 (Pads 39,38,37,36)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010104</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 39, 38, 37, 36</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD39_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD39_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD38_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD38_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD37_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD37_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD36_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD36_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD39_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 39 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD39_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 39 high order drive strength selection. Used in conjunction with PAD39STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD38_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 38 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD38_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 38 high order drive strength selection. Used in conjunction with PAD38STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD37_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 37 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD37_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 37 high order drive strength selection. Used in conjunction with PAD37STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD36_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 36 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD36_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 36 high order drive strength selection. Used in conjunction with PAD36STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGK" class="panel-title">ALTPADCFGK - Alternate Pad Configuration reg10 (Pads 43,42,41,40)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010108</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 43, 42, 41, 40</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD43_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD43_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD42_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD42_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD41_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD41_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD40_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD40_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD43_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 43 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD43_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 43 high order drive strength selection. Used in conjunction with PAD43STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD42_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 42 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD42_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 42 high order drive strength selection. Used in conjunction with PAD42STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD41_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 41 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD41_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 41 high order drive strength selection. Used in conjunction with PAD41STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD40_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 40 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD40_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 40 high order drive strength selection. Used in conjunction with PAD40STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGL" class="panel-title">ALTPADCFGL - Alternate Pad Configuration reg11 (Pads 47,46,45,44)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x4001010C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 47, 46, 45, 44</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD47_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD47_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD46_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD46_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD45_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD45_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD44_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD44_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:29</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>PAD47_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 47 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:25</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>PAD47_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 47 high order drive strength selection. Used in conjunction with PAD47STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:21</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>PAD46_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 46 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:17</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>PAD46_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 46 high order drive strength selection. Used in conjunction with PAD46STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD45_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 45 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD45_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 45 high order drive strength selection. Used in conjunction with PAD45STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD44_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 44 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD44_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 44 high order drive strength selection. Used in conjunction with PAD44STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="ALTPADCFGM" class="panel-title">ALTPADCFGM - Alternate Pad Configuration reg12 (Pads 49,48)</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010110</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register has additional configuration control for pads 49, 48</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="19">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD49_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD49_DS1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD48_SR
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PAD48_DS1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:13</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>PAD49_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 49 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:9</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>PAD49_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 49 high order drive strength selection. Used in conjunction with PAD49STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:5</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>PAD48_SR</td>
|
|
<td>RW</td>
|
|
<td>Pad 48 slew rate selection.<br><br>
|
|
SR_EN = 0x1 - Enables Slew rate control on pad</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PAD48_DS1</td>
|
|
<td>RW</td>
|
|
<td>Pad 48 high order drive strength selection. Used in conjunction with PAD48STRNG field to set the pad drive strength.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INT0EN" class="panel-title">INT0EN - GPIO Interrupt Registers 31-0: Enable</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010200</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Set bits in this register to allow this module to generate the corresponding interrupt.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">GPIO31
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO30
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO29
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO28
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO27
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO26
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO25
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO24
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO23
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO22
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO21
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO20
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO19
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO18
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO17
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO16
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO15
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO14
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO13
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO12
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO11
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO10
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO9
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO8
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO7
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO6
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO5
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO4
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO3
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO0
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>GPIO31</td>
|
|
<td>RW</td>
|
|
<td>GPIO31 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30</td>
|
|
<td>GPIO30</td>
|
|
<td>RW</td>
|
|
<td>GPIO30 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29</td>
|
|
<td>GPIO29</td>
|
|
<td>RW</td>
|
|
<td>GPIO29 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>GPIO28</td>
|
|
<td>RW</td>
|
|
<td>GPIO28 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27</td>
|
|
<td>GPIO27</td>
|
|
<td>RW</td>
|
|
<td>GPIO27 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>GPIO26</td>
|
|
<td>RW</td>
|
|
<td>GPIO26 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>GPIO25</td>
|
|
<td>RW</td>
|
|
<td>GPIO25 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>GPIO24</td>
|
|
<td>RW</td>
|
|
<td>GPIO24 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>GPIO23</td>
|
|
<td>RW</td>
|
|
<td>GPIO23 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22</td>
|
|
<td>GPIO22</td>
|
|
<td>RW</td>
|
|
<td>GPIO22 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21</td>
|
|
<td>GPIO21</td>
|
|
<td>RW</td>
|
|
<td>GPIO21 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>GPIO20</td>
|
|
<td>RW</td>
|
|
<td>GPIO20 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19</td>
|
|
<td>GPIO19</td>
|
|
<td>RW</td>
|
|
<td>GPIO19 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>GPIO18</td>
|
|
<td>RW</td>
|
|
<td>GPIO18interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>GPIO17</td>
|
|
<td>RW</td>
|
|
<td>GPIO17 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO16</td>
|
|
<td>RW</td>
|
|
<td>GPIO16 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO15</td>
|
|
<td>RW</td>
|
|
<td>GPIO15 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14</td>
|
|
<td>GPIO14</td>
|
|
<td>RW</td>
|
|
<td>GPIO14 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13</td>
|
|
<td>GPIO13</td>
|
|
<td>RW</td>
|
|
<td>GPIO13 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO12</td>
|
|
<td>RW</td>
|
|
<td>GPIO12 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO11</td>
|
|
<td>RW</td>
|
|
<td>GPIO11 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>GPIO10</td>
|
|
<td>RW</td>
|
|
<td>GPIO10 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>GPIO9</td>
|
|
<td>RW</td>
|
|
<td>GPIO9 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO8</td>
|
|
<td>RW</td>
|
|
<td>GPIO8 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO7</td>
|
|
<td>RW</td>
|
|
<td>GPIO7 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6</td>
|
|
<td>GPIO6</td>
|
|
<td>RW</td>
|
|
<td>GPIO6 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>GPIO5</td>
|
|
<td>RW</td>
|
|
<td>GPIO5 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO4</td>
|
|
<td>RW</td>
|
|
<td>GPIO4 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO3</td>
|
|
<td>RW</td>
|
|
<td>GPIO3 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>GPIO2</td>
|
|
<td>RW</td>
|
|
<td>GPIO2 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>GPIO1</td>
|
|
<td>RW</td>
|
|
<td>GPIO1 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO0</td>
|
|
<td>RW</td>
|
|
<td>GPIO0 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INT0STAT" class="panel-title">INT0STAT - GPIO Interrupt Registers 31-0: Status</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010204</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Read bits from this register to discover the cause of a recent interrupt.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">GPIO31
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO30
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO29
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO28
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO27
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO26
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO25
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO24
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO23
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO22
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO21
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO20
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO19
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO18
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO17
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO16
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO15
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO14
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO13
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO12
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO11
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO10
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO9
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO8
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO7
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO6
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO5
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO4
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO3
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO0
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>GPIO31</td>
|
|
<td>RW</td>
|
|
<td>GPIO31 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30</td>
|
|
<td>GPIO30</td>
|
|
<td>RW</td>
|
|
<td>GPIO30 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29</td>
|
|
<td>GPIO29</td>
|
|
<td>RW</td>
|
|
<td>GPIO29 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>GPIO28</td>
|
|
<td>RW</td>
|
|
<td>GPIO28 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27</td>
|
|
<td>GPIO27</td>
|
|
<td>RW</td>
|
|
<td>GPIO27 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>GPIO26</td>
|
|
<td>RW</td>
|
|
<td>GPIO26 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>GPIO25</td>
|
|
<td>RW</td>
|
|
<td>GPIO25 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>GPIO24</td>
|
|
<td>RW</td>
|
|
<td>GPIO24 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>GPIO23</td>
|
|
<td>RW</td>
|
|
<td>GPIO23 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22</td>
|
|
<td>GPIO22</td>
|
|
<td>RW</td>
|
|
<td>GPIO22 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21</td>
|
|
<td>GPIO21</td>
|
|
<td>RW</td>
|
|
<td>GPIO21 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>GPIO20</td>
|
|
<td>RW</td>
|
|
<td>GPIO20 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19</td>
|
|
<td>GPIO19</td>
|
|
<td>RW</td>
|
|
<td>GPIO19 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>GPIO18</td>
|
|
<td>RW</td>
|
|
<td>GPIO18interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>GPIO17</td>
|
|
<td>RW</td>
|
|
<td>GPIO17 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO16</td>
|
|
<td>RW</td>
|
|
<td>GPIO16 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO15</td>
|
|
<td>RW</td>
|
|
<td>GPIO15 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14</td>
|
|
<td>GPIO14</td>
|
|
<td>RW</td>
|
|
<td>GPIO14 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13</td>
|
|
<td>GPIO13</td>
|
|
<td>RW</td>
|
|
<td>GPIO13 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO12</td>
|
|
<td>RW</td>
|
|
<td>GPIO12 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO11</td>
|
|
<td>RW</td>
|
|
<td>GPIO11 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>GPIO10</td>
|
|
<td>RW</td>
|
|
<td>GPIO10 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>GPIO9</td>
|
|
<td>RW</td>
|
|
<td>GPIO9 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO8</td>
|
|
<td>RW</td>
|
|
<td>GPIO8 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO7</td>
|
|
<td>RW</td>
|
|
<td>GPIO7 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6</td>
|
|
<td>GPIO6</td>
|
|
<td>RW</td>
|
|
<td>GPIO6 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>GPIO5</td>
|
|
<td>RW</td>
|
|
<td>GPIO5 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO4</td>
|
|
<td>RW</td>
|
|
<td>GPIO4 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO3</td>
|
|
<td>RW</td>
|
|
<td>GPIO3 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>GPIO2</td>
|
|
<td>RW</td>
|
|
<td>GPIO2 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>GPIO1</td>
|
|
<td>RW</td>
|
|
<td>GPIO1 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO0</td>
|
|
<td>RW</td>
|
|
<td>GPIO0 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INT0CLR" class="panel-title">INT0CLR - GPIO Interrupt Registers 31-0: Clear</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010208</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Write a 1 to a bit in this register to clear the interrupt status associated with that bit.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">GPIO31
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO30
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO29
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO28
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO27
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO26
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO25
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO24
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO23
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO22
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO21
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO20
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO19
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO18
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO17
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO16
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO15
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO14
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO13
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO12
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO11
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO10
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO9
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO8
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO7
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO6
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO5
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO4
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO3
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO0
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>GPIO31</td>
|
|
<td>RW</td>
|
|
<td>GPIO31 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30</td>
|
|
<td>GPIO30</td>
|
|
<td>RW</td>
|
|
<td>GPIO30 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29</td>
|
|
<td>GPIO29</td>
|
|
<td>RW</td>
|
|
<td>GPIO29 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>GPIO28</td>
|
|
<td>RW</td>
|
|
<td>GPIO28 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27</td>
|
|
<td>GPIO27</td>
|
|
<td>RW</td>
|
|
<td>GPIO27 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>GPIO26</td>
|
|
<td>RW</td>
|
|
<td>GPIO26 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>GPIO25</td>
|
|
<td>RW</td>
|
|
<td>GPIO25 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>GPIO24</td>
|
|
<td>RW</td>
|
|
<td>GPIO24 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>GPIO23</td>
|
|
<td>RW</td>
|
|
<td>GPIO23 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22</td>
|
|
<td>GPIO22</td>
|
|
<td>RW</td>
|
|
<td>GPIO22 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21</td>
|
|
<td>GPIO21</td>
|
|
<td>RW</td>
|
|
<td>GPIO21 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>GPIO20</td>
|
|
<td>RW</td>
|
|
<td>GPIO20 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19</td>
|
|
<td>GPIO19</td>
|
|
<td>RW</td>
|
|
<td>GPIO19 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>GPIO18</td>
|
|
<td>RW</td>
|
|
<td>GPIO18interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>GPIO17</td>
|
|
<td>RW</td>
|
|
<td>GPIO17 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO16</td>
|
|
<td>RW</td>
|
|
<td>GPIO16 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO15</td>
|
|
<td>RW</td>
|
|
<td>GPIO15 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14</td>
|
|
<td>GPIO14</td>
|
|
<td>RW</td>
|
|
<td>GPIO14 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13</td>
|
|
<td>GPIO13</td>
|
|
<td>RW</td>
|
|
<td>GPIO13 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO12</td>
|
|
<td>RW</td>
|
|
<td>GPIO12 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO11</td>
|
|
<td>RW</td>
|
|
<td>GPIO11 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>GPIO10</td>
|
|
<td>RW</td>
|
|
<td>GPIO10 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>GPIO9</td>
|
|
<td>RW</td>
|
|
<td>GPIO9 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO8</td>
|
|
<td>RW</td>
|
|
<td>GPIO8 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO7</td>
|
|
<td>RW</td>
|
|
<td>GPIO7 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6</td>
|
|
<td>GPIO6</td>
|
|
<td>RW</td>
|
|
<td>GPIO6 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>GPIO5</td>
|
|
<td>RW</td>
|
|
<td>GPIO5 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO4</td>
|
|
<td>RW</td>
|
|
<td>GPIO4 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO3</td>
|
|
<td>RW</td>
|
|
<td>GPIO3 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>GPIO2</td>
|
|
<td>RW</td>
|
|
<td>GPIO2 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>GPIO1</td>
|
|
<td>RW</td>
|
|
<td>GPIO1 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO0</td>
|
|
<td>RW</td>
|
|
<td>GPIO0 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INT0SET" class="panel-title">INT0SET - GPIO Interrupt Registers 31-0: Set</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x4001020C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for testing purposes).</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">GPIO31
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO30
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO29
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO28
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO27
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO26
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO25
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO24
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO23
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO22
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO21
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO20
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO19
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO18
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO17
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO16
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO15
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO14
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO13
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO12
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO11
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO10
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO9
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO8
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO7
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO6
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO5
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO4
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO3
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO0
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>GPIO31</td>
|
|
<td>RW</td>
|
|
<td>GPIO31 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30</td>
|
|
<td>GPIO30</td>
|
|
<td>RW</td>
|
|
<td>GPIO30 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>29</td>
|
|
<td>GPIO29</td>
|
|
<td>RW</td>
|
|
<td>GPIO29 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>28</td>
|
|
<td>GPIO28</td>
|
|
<td>RW</td>
|
|
<td>GPIO28 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27</td>
|
|
<td>GPIO27</td>
|
|
<td>RW</td>
|
|
<td>GPIO27 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26</td>
|
|
<td>GPIO26</td>
|
|
<td>RW</td>
|
|
<td>GPIO26 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>25</td>
|
|
<td>GPIO25</td>
|
|
<td>RW</td>
|
|
<td>GPIO25 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>24</td>
|
|
<td>GPIO24</td>
|
|
<td>RW</td>
|
|
<td>GPIO24 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23</td>
|
|
<td>GPIO23</td>
|
|
<td>RW</td>
|
|
<td>GPIO23 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>22</td>
|
|
<td>GPIO22</td>
|
|
<td>RW</td>
|
|
<td>GPIO22 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>21</td>
|
|
<td>GPIO21</td>
|
|
<td>RW</td>
|
|
<td>GPIO21 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>20</td>
|
|
<td>GPIO20</td>
|
|
<td>RW</td>
|
|
<td>GPIO20 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19</td>
|
|
<td>GPIO19</td>
|
|
<td>RW</td>
|
|
<td>GPIO19 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>18</td>
|
|
<td>GPIO18</td>
|
|
<td>RW</td>
|
|
<td>GPIO18interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>GPIO17</td>
|
|
<td>RW</td>
|
|
<td>GPIO17 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO16</td>
|
|
<td>RW</td>
|
|
<td>GPIO16 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO15</td>
|
|
<td>RW</td>
|
|
<td>GPIO15 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14</td>
|
|
<td>GPIO14</td>
|
|
<td>RW</td>
|
|
<td>GPIO14 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13</td>
|
|
<td>GPIO13</td>
|
|
<td>RW</td>
|
|
<td>GPIO13 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO12</td>
|
|
<td>RW</td>
|
|
<td>GPIO12 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO11</td>
|
|
<td>RW</td>
|
|
<td>GPIO11 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>GPIO10</td>
|
|
<td>RW</td>
|
|
<td>GPIO10 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>GPIO9</td>
|
|
<td>RW</td>
|
|
<td>GPIO9 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO8</td>
|
|
<td>RW</td>
|
|
<td>GPIO8 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO7</td>
|
|
<td>RW</td>
|
|
<td>GPIO7 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6</td>
|
|
<td>GPIO6</td>
|
|
<td>RW</td>
|
|
<td>GPIO6 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>GPIO5</td>
|
|
<td>RW</td>
|
|
<td>GPIO5 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO4</td>
|
|
<td>RW</td>
|
|
<td>GPIO4 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO3</td>
|
|
<td>RW</td>
|
|
<td>GPIO3 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>GPIO2</td>
|
|
<td>RW</td>
|
|
<td>GPIO2 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>GPIO1</td>
|
|
<td>RW</td>
|
|
<td>GPIO1 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO0</td>
|
|
<td>RW</td>
|
|
<td>GPIO0 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INT1EN" class="panel-title">INT1EN - GPIO Interrupt Registers 49-32: Enable</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010210</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Set bits in this register to allow this module to generate the corresponding interrupt.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="14">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO49
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO48
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO47
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO46
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO45
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO44
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO43
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO42
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO41
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO40
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO39
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO38
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO37
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO36
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO35
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO34
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO33
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO32
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>GPIO49</td>
|
|
<td>RW</td>
|
|
<td>GPIO49 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO48</td>
|
|
<td>RW</td>
|
|
<td>GPIO48 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO47</td>
|
|
<td>RW</td>
|
|
<td>GPIO47 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14</td>
|
|
<td>GPIO46</td>
|
|
<td>RW</td>
|
|
<td>GPIO46 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13</td>
|
|
<td>GPIO45</td>
|
|
<td>RW</td>
|
|
<td>GPIO45 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO44</td>
|
|
<td>RW</td>
|
|
<td>GPIO44 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO43</td>
|
|
<td>RW</td>
|
|
<td>GPIO43 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>GPIO42</td>
|
|
<td>RW</td>
|
|
<td>GPIO42 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>GPIO41</td>
|
|
<td>RW</td>
|
|
<td>GPIO41 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO40</td>
|
|
<td>RW</td>
|
|
<td>GPIO40 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO39</td>
|
|
<td>RW</td>
|
|
<td>GPIO39 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6</td>
|
|
<td>GPIO38</td>
|
|
<td>RW</td>
|
|
<td>GPIO38 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>GPIO37</td>
|
|
<td>RW</td>
|
|
<td>GPIO37 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO36</td>
|
|
<td>RW</td>
|
|
<td>GPIO36 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO35</td>
|
|
<td>RW</td>
|
|
<td>GPIO35 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>GPIO34</td>
|
|
<td>RW</td>
|
|
<td>GPIO34 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>GPIO33</td>
|
|
<td>RW</td>
|
|
<td>GPIO33 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO32</td>
|
|
<td>RW</td>
|
|
<td>GPIO32 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INT1STAT" class="panel-title">INT1STAT - GPIO Interrupt Registers 49-32: Status</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010214</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Read bits from this register to discover the cause of a recent interrupt.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="14">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO49
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO48
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO47
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO46
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO45
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO44
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO43
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO42
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO41
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO40
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO39
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO38
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO37
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO36
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO35
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO34
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO33
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO32
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>GPIO49</td>
|
|
<td>RW</td>
|
|
<td>GPIO49 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO48</td>
|
|
<td>RW</td>
|
|
<td>GPIO48 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO47</td>
|
|
<td>RW</td>
|
|
<td>GPIO47 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14</td>
|
|
<td>GPIO46</td>
|
|
<td>RW</td>
|
|
<td>GPIO46 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13</td>
|
|
<td>GPIO45</td>
|
|
<td>RW</td>
|
|
<td>GPIO45 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO44</td>
|
|
<td>RW</td>
|
|
<td>GPIO44 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO43</td>
|
|
<td>RW</td>
|
|
<td>GPIO43 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>GPIO42</td>
|
|
<td>RW</td>
|
|
<td>GPIO42 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>GPIO41</td>
|
|
<td>RW</td>
|
|
<td>GPIO41 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO40</td>
|
|
<td>RW</td>
|
|
<td>GPIO40 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO39</td>
|
|
<td>RW</td>
|
|
<td>GPIO39 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6</td>
|
|
<td>GPIO38</td>
|
|
<td>RW</td>
|
|
<td>GPIO38 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>GPIO37</td>
|
|
<td>RW</td>
|
|
<td>GPIO37 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO36</td>
|
|
<td>RW</td>
|
|
<td>GPIO36 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO35</td>
|
|
<td>RW</td>
|
|
<td>GPIO35 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>GPIO34</td>
|
|
<td>RW</td>
|
|
<td>GPIO34 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>GPIO33</td>
|
|
<td>RW</td>
|
|
<td>GPIO33 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO32</td>
|
|
<td>RW</td>
|
|
<td>GPIO32 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INT1CLR" class="panel-title">INT1CLR - GPIO Interrupt Registers 49-32: Clear</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x40010218</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Write a 1 to a bit in this register to clear the interrupt status associated with that bit.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="14">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO49
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO48
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO47
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO46
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO45
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO44
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO43
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO42
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO41
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO40
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO39
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO38
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO37
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO36
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO35
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO34
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO33
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO32
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>GPIO49</td>
|
|
<td>RW</td>
|
|
<td>GPIO49 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO48</td>
|
|
<td>RW</td>
|
|
<td>GPIO48 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO47</td>
|
|
<td>RW</td>
|
|
<td>GPIO47 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14</td>
|
|
<td>GPIO46</td>
|
|
<td>RW</td>
|
|
<td>GPIO46 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13</td>
|
|
<td>GPIO45</td>
|
|
<td>RW</td>
|
|
<td>GPIO45 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO44</td>
|
|
<td>RW</td>
|
|
<td>GPIO44 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO43</td>
|
|
<td>RW</td>
|
|
<td>GPIO43 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>GPIO42</td>
|
|
<td>RW</td>
|
|
<td>GPIO42 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>GPIO41</td>
|
|
<td>RW</td>
|
|
<td>GPIO41 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO40</td>
|
|
<td>RW</td>
|
|
<td>GPIO40 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO39</td>
|
|
<td>RW</td>
|
|
<td>GPIO39 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6</td>
|
|
<td>GPIO38</td>
|
|
<td>RW</td>
|
|
<td>GPIO38 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>GPIO37</td>
|
|
<td>RW</td>
|
|
<td>GPIO37 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO36</td>
|
|
<td>RW</td>
|
|
<td>GPIO36 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO35</td>
|
|
<td>RW</td>
|
|
<td>GPIO35 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>GPIO34</td>
|
|
<td>RW</td>
|
|
<td>GPIO34 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>GPIO33</td>
|
|
<td>RW</td>
|
|
<td>GPIO33 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO32</td>
|
|
<td>RW</td>
|
|
<td>GPIO32 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INT1SET" class="panel-title">INT1SET - GPIO Interrupt Registers 49-32: Set</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x4001021C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for testing purposes).</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="14">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO49
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO48
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO47
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO46
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO45
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO44
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO43
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO42
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO41
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO40
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO39
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO38
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO37
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO36
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO35
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO34
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO33
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">GPIO32
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17</td>
|
|
<td>GPIO49</td>
|
|
<td>RW</td>
|
|
<td>GPIO49 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>16</td>
|
|
<td>GPIO48</td>
|
|
<td>RW</td>
|
|
<td>GPIO48 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15</td>
|
|
<td>GPIO47</td>
|
|
<td>RW</td>
|
|
<td>GPIO47 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>14</td>
|
|
<td>GPIO46</td>
|
|
<td>RW</td>
|
|
<td>GPIO46 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>13</td>
|
|
<td>GPIO45</td>
|
|
<td>RW</td>
|
|
<td>GPIO45 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>12</td>
|
|
<td>GPIO44</td>
|
|
<td>RW</td>
|
|
<td>GPIO44 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11</td>
|
|
<td>GPIO43</td>
|
|
<td>RW</td>
|
|
<td>GPIO43 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>10</td>
|
|
<td>GPIO42</td>
|
|
<td>RW</td>
|
|
<td>GPIO42 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>9</td>
|
|
<td>GPIO41</td>
|
|
<td>RW</td>
|
|
<td>GPIO41 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>8</td>
|
|
<td>GPIO40</td>
|
|
<td>RW</td>
|
|
<td>GPIO40 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7</td>
|
|
<td>GPIO39</td>
|
|
<td>RW</td>
|
|
<td>GPIO39 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>6</td>
|
|
<td>GPIO38</td>
|
|
<td>RW</td>
|
|
<td>GPIO38 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>GPIO37</td>
|
|
<td>RW</td>
|
|
<td>GPIO37 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>GPIO36</td>
|
|
<td>RW</td>
|
|
<td>GPIO36 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>GPIO35</td>
|
|
<td>RW</td>
|
|
<td>GPIO35 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>GPIO34</td>
|
|
<td>RW</td>
|
|
<td>GPIO34 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>GPIO33</td>
|
|
<td>RW</td>
|
|
<td>GPIO33 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>GPIO32</td>
|
|
<td>RW</td>
|
|
<td>GPIO32 interrupt.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
</body>
|
|
|
|
<hr size="1">
|
|
<body>
|
|
<div id="footer" align="right">
|
|
<small>
|
|
AmbiqSuite Register Documentation
|
|
<a href="http://www.ambiqmicro.com">
|
|
<img class="footer" src="../resources/ambiqmicro_logo.png" alt="Ambiq Micro"/></a>   Copyright © 2014  <br />
|
|
This documentation is licensed and distributed under the <a rel="license" href="http://opensource.org/licenses/BSD-3-Clause">BSD 3-Clause License</a>.  <br/>
|
|
</small>
|
|
</div>
|
|
</body>
|
|
</html>
|
|
|