3696 lines
169 KiB
HTML
3696 lines
169 KiB
HTML
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<title>AmbiqSuite User Guide: AmbiqSuite Apollo Device Register Overview</title>
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<td style="padding-left: 0.5em;">
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<div id="projectname">Apollo Register Documentation  <span id="projectnumber">v2.4.2</span></div>
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<!-- window showing the filter options -->
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<div class="header">
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<div class="headertitle">
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<div class="title">ADC - Analog Digital Converter Control</div>
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</div>
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</div>
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<!--header-->
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<body>
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<br>
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<div class="panel panel-default">
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<div class="panel-heading">
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<h3 class="panel-title"> ADC Register Index</h3>
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</div>
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<div class="panel-body">
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<table>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000000:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#CFG" target="_self">CFG - Configuration Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000004:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#STAT" target="_self">STAT - ADC Power Status</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000008:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SWT" target="_self">SWT - Software trigger</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x0000000C:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SL0CFG" target="_self">SL0CFG - Slot 0 Configuration Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000010:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SL1CFG" target="_self">SL1CFG - Slot 1 Configuration Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000014:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SL2CFG" target="_self">SL2CFG - Slot 2 Configuration Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000018:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SL3CFG" target="_self">SL3CFG - Slot 3 Configuration Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x0000001C:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SL4CFG" target="_self">SL4CFG - Slot 4 Configuration Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000020:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SL5CFG" target="_self">SL5CFG - Slot 5 Configuration Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000024:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SL6CFG" target="_self">SL6CFG - Slot 6 Configuration Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000028:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SL7CFG" target="_self">SL7CFG - Slot 7 Configuration Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x0000002C:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#WULIM" target="_self">WULIM - Window Comparator Upper Limits Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000030:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#WLLIM" target="_self">WLLIM - Window Comparator Lower Limits Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000038:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#FIFO" target="_self">FIFO - FIFO Data and Valid Count Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000200:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#INTEN" target="_self">INTEN - ADC Interrupt registers: Enable</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000204:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#INTSTAT" target="_self">INTSTAT - ADC Interrupt registers: Status</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000208:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#INTCLR" target="_self">INTCLR - ADC Interrupt registers: Clear</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x0000020C:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#INTSET" target="_self">INTSET - ADC Interrupt registers: Set</a>
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</td>
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</tr>
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</table>
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</div>
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</div>
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<div class="panel panel-default">
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<div class="panel-heading">
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<h3 id="CFG" class="panel-title">CFG - Configuration Register</h3>
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</div>
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<div class="panel-body">
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<h3>Address:</h3>
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<table style="margin:10px">
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">Instance 0 Address:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x50008000</span>
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</td>
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</tr>
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</table>
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<h3>Description:</h3>
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<p>The ADC Configuration Register contains the software control for selecting the clock frequency used for the SAR conversions, the trigger polarity, the trigger select, the reference voltage select, the low power mode, the operating mode (single scan per trigger vs. repeating mode) and ADC enable.</p>
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<h3>Example Macro Usage:</h3>
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<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
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// All macro-based register writes follow the same basic format. For
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// single-instance modules, you may use the simpler AM_REG macro. For
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// multi-instance macros, you will need to specify the instance number using
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// the AM_REGn macro format.
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//
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// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
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// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
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//
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// For registers that do not have specific enumeration values, you may use this alternate format instead.
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//
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// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
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//
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// For example, the following three lines of code are equivalent methods of
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// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
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//</span>
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AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
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AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
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AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
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<h3>Register Fields:</h3>
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<table style="margin:10px" class="table table-bordered table-condensed">
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<thead>
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<tr>
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<th>31</th>
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<th>30</th>
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<th>29</th>
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<th>28</th>
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<th>27</th>
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<th>26</th>
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<th>25</th>
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<th>24</th>
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<th>23</th>
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<th>22</th>
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<th>21</th>
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<th>20</th>
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<th>19</th>
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<th>18</th>
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<th>17</th>
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<th>16</th>
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<th>15</th>
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<th>14</th>
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<th>13</th>
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<th>12</th>
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<th>11</th>
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<th>10</th>
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<th>9</th>
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<th>8</th>
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<th>7</th>
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<th>6</th>
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<th>5</th>
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<th>4</th>
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<th>3</th>
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<th>2</th>
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<th>1</th>
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<th>0</th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td align="center" colspan="6">RSVD
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<br>0x0</td>
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<td align="center" colspan="2">CLKSEL
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<br>0x0</td>
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<td align="center" colspan="4">RSVD
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<br>0x0</td>
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<td align="center" colspan="1">TRIGPOL
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<br>0x0</td>
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<td align="center" colspan="3">TRIGSEL
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<br>0x0</td>
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<td align="center" colspan="6">RSVD
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<br>0x0</td>
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<td align="center" colspan="2">REFSEL
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<br>0x0</td>
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<td align="center" colspan="3">RSVD
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<br>0x0</td>
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<td align="center" colspan="1">CKMODE
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<br>0x0</td>
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<td align="center" colspan="1">LPMODE
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<br>0x0</td>
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<td align="center" colspan="1">RPTEN
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<br>0x0</td>
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<td align="center" colspan="1">RSVD
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<br>0x0</td>
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<td align="center" colspan="1">ADCEN
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<br>0x0</td>
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</tr>
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</tbody>
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</table>
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<br>
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<table style="margin:10px" class="table table-bordered table-condensed">
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<thead>
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<tr>
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<th>Bits</th>
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<th>Name</th>
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<th>RW</th>
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<th>Description</th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td>31:26</td>
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<td>RSVD</td>
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<td>RO</td>
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<td>RESERVED.<br><br>
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</td>
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</tr>
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<tr>
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<td>25:24</td>
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<td>CLKSEL</td>
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<td>RW</td>
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<td>Select the source and frequency for the ADC clock. All values not enumerated below are undefined.<br><br>
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OFF = 0x0 - Off mode. The HFRC or HFRC_DIV2 clock must be selected for the ADC to function. The ADC controller automatically shuts off the clock in it's low power modes. When setting ADCEN to '0', the CLKSEL should remain set to one of the two clock selects for proper power down sequencing.<br>
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HFRC = 0x1 - HFRC Core Clock divided by (CORESEL+1)<br>
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HFRC_DIV2 = 0x2 - HFRC Core Clock / 2 further divided by (CORESEL+1)</td>
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</tr>
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<tr>
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<td>23:20</td>
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<td>RSVD</td>
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<td>RO</td>
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<td>RESERVED.<br><br>
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</td>
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</tr>
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<tr>
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<td>19</td>
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<td>TRIGPOL</td>
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<td>RW</td>
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<td>This bit selects the ADC trigger polarity for external off chip triggers.<br><br>
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RISING_EDGE = 0x0 - Trigger on rising edge.<br>
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FALLING_EDGE = 0x1 - Trigger on falling edge.</td>
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</tr>
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<tr>
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<td>18:16</td>
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<td>TRIGSEL</td>
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<td>RW</td>
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<td>Select the ADC trigger source.<br><br>
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EXT0 = 0x0 - Off chip External Trigger0 (ADC_ET0)<br>
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EXT1 = 0x1 - Off chip External Trigger1 (ADC_ET1)<br>
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EXT2 = 0x2 - Off chip External Trigger2 (ADC_ET2)<br>
|
|
EXT3 = 0x3 - Off chip External Trigger3 (ADC_ET3)<br>
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VCOMP = 0x4 - Voltage Comparator Output<br>
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SWT = 0x7 - Software Trigger</td>
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</tr>
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<tr>
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<td>15:10</td>
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<td>RSVD</td>
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<td>RO</td>
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<td>RESERVED.<br><br>
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</td>
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</tr>
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<tr>
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<td>9:8</td>
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<td>REFSEL</td>
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<td>RW</td>
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<td>Select the ADC reference voltage.<br><br>
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|
INT2P0 = 0x0 - Internal 2.0V Bandgap Reference Voltage<br>
|
|
INT1P5 = 0x1 - Internal 1.5V Bandgap Reference Voltage<br>
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EXT2P0 = 0x2 - Off Chip 2.0V Reference<br>
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|
EXT1P5 = 0x3 - Off Chip 1.5V Reference</td>
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</tr>
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<tr>
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<td>7:5</td>
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<td>RSVD</td>
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<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>CKMODE</td>
|
|
<td>RW</td>
|
|
<td>Clock mode register<br><br>
|
|
LPCKMODE = 0x0 - Disable the clock between scans for LPMODE0. Set LPCKMODE to 0x1 while configuring the ADC.<br>
|
|
LLCKMODE = 0x1 - Low Latency Clock Mode. When set, HFRC and the adc_clk will remain on while in functioning in LPMODE0.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>LPMODE</td>
|
|
<td>RW</td>
|
|
<td>Select power mode to enter between active scans.<br><br>
|
|
MODE0 = 0x0 - Low Power Mode 0. Leaves the ADC fully powered between scans with minimum latency between a trigger event and sample data collection.<br>
|
|
MODE1 = 0x1 - Low Power Mode 1. Powers down all circuity and clocks associated with the ADC until the next trigger event. Between scans, the reference buffer requires up to 50us of delay from a scan trigger event before the conversion will commence while operating in this mode.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>RPTEN</td>
|
|
<td>RW</td>
|
|
<td>This bit enables Repeating Scan Mode.<br><br>
|
|
SINGLE_SCAN = 0x0 - In Single Scan Mode, the ADC will complete a single scan upon each trigger event.<br>
|
|
REPEATING_SCAN = 0x1 - In Repeating Scan Mode, the ADC will complete it's first scan upon the initial trigger event and all subsequent scans will occur at regular intervals defined by the configuration programmed for the CTTMRA3 internal timer until the timer is disabled or the ADC is disabled. When disabling the ADC (setting ADCEN to '0'), the RPTEN bit should be cleared.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>ADCEN</td>
|
|
<td>RW</td>
|
|
<td>This bit enables the ADC module. While the ADC is enabled, the ADCCFG and SLOT Configuration regsiter settings must remain stable and unchanged.<br><br>
|
|
DIS = 0x0 - Disable the ADC module.<br>
|
|
EN = 0x1 - Enable the ADC module.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="STAT" class="panel-title">STAT - ADC Power Status</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008004</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register indicates the basic power status for the ADC. For detailed power status, see the power control power status register. ADC power mode 0 indicates the ADC is in it's full power state and is ready to process scans. ADC Power mode 1 indicates the ADC enabled and in a low power state.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="31">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">PWDSTAT
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:1</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>PWDSTAT</td>
|
|
<td>RO</td>
|
|
<td>Indicates the power-status of the ADC.<br><br>
|
|
ON = 0x0 - Powered on.<br>
|
|
POWERED_DOWN = 0x1 - ADC Low Power Mode 1.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="SWT" class="panel-title">SWT - Software trigger</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008008</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>This register enables initiating an ADC scan through software.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="24">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="8">SWT
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:8</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:0</td>
|
|
<td>SWT</td>
|
|
<td>RW</td>
|
|
<td>Writing 0x37 to this register generates a software trigger.<br><br>
|
|
GEN_SW_TRIGGER = 0x37 - Writing this value generates a software trigger.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="SL0CFG" class="panel-title">SL0CFG - Slot 0 Configuration Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x5000800C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Slot 0 Configuration Register</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="5">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">ADSEL0
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PRMODE0
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">CHSEL0
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEN0
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SLEN0
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:27</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:24</td>
|
|
<td>ADSEL0</td>
|
|
<td>RW</td>
|
|
<td>Select the number of measurements to average in the accumulate divide module for this slot.<br><br>
|
|
AVG_1_MSRMT = 0x0 - Average in 1 measurement in the accumulate divide module for this slot.<br>
|
|
AVG_2_MSRMTS = 0x1 - Average in 2 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_4_MSRMTS = 0x2 - Average in 4 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_8_MSRMT = 0x3 - Average in 8 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_16_MSRMTS = 0x4 - Average in 16 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_32_MSRMTS = 0x5 - Average in 32 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_64_MSRMTS = 0x6 - Average in 64 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_128_MSRMTS = 0x7 - Average in 128 measurements in the accumulate divide module for this slot.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:16</td>
|
|
<td>PRMODE0</td>
|
|
<td>RW</td>
|
|
<td>Set the Precision Mode For Slot.<br><br>
|
|
P14B = 0x0 - 14-bit precision mode<br>
|
|
P12B = 0x1 - 12-bit precision mode<br>
|
|
P10B = 0x2 - 10-bit precision mode<br>
|
|
P8B = 0x3 - 8-bit precision mode</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:12</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:8</td>
|
|
<td>CHSEL0</td>
|
|
<td>RW</td>
|
|
<td>Select one of the 14 channel inputs for this slot.<br><br>
|
|
SE0 = 0x0 - single ended external GPIO connection to pad16.<br>
|
|
SE1 = 0x1 - single ended external GPIO connection to pad29.<br>
|
|
SE2 = 0x2 - single ended external GPIO connection to pad11.<br>
|
|
SE3 = 0x3 - single ended external GPIO connection to pad31.<br>
|
|
SE4 = 0x4 - single ended external GPIO connection to pad32.<br>
|
|
SE5 = 0x5 - single ended external GPIO connection to pad33.<br>
|
|
SE6 = 0x6 - single ended external GPIO connection to pad34.<br>
|
|
SE7 = 0x7 - single ended external GPIO connection to pad35.<br>
|
|
SE8 = 0x8 - single ended external GPIO connection to pad13.<br>
|
|
SE9 = 0x9 - single ended external GPIO connection to pad12.<br>
|
|
DF0 = 0xA - differential external GPIO connections to pad12(N) and pad13(P).<br>
|
|
DF1 = 0xB - differential external GPIO connections to pad15(N) and pad14(P).<br>
|
|
TEMP = 0xC - internal temperature sensor.<br>
|
|
BATT = 0xD - internal voltage divide-by-3 connection.<br>
|
|
VSS = 0xE - VSS</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:2</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>WCEN0</td>
|
|
<td>RW</td>
|
|
<td>This bit enables the window compare function for slot 0.<br><br>
|
|
WCEN = 0x1 - Enable the window compare for slot 0.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>SLEN0</td>
|
|
<td>RW</td>
|
|
<td>This bit enables slot 0 for ADC conversions.<br><br>
|
|
SLEN = 0x1 - Enable slot 0 for ADC conversions.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="SL1CFG" class="panel-title">SL1CFG - Slot 1 Configuration Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008010</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Slot 1 Configuration Register</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="5">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">ADSEL1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PRMODE1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">CHSEL1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEN1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SLEN1
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:27</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:24</td>
|
|
<td>ADSEL1</td>
|
|
<td>RW</td>
|
|
<td>Select the number of measurements to average in the accumulate divide module for this slot.<br><br>
|
|
AVG_1_MSRMT = 0x0 - Average in 1 measurement in the accumulate divide module for this slot.<br>
|
|
AVG_2_MSRMTS = 0x1 - Average in 2 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_4_MSRMTS = 0x2 - Average in 4 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_8_MSRMT = 0x3 - Average in 8 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_16_MSRMTS = 0x4 - Average in 16 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_32_MSRMTS = 0x5 - Average in 32 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_64_MSRMTS = 0x6 - Average in 64 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_128_MSRMTS = 0x7 - Average in 128 measurements in the accumulate divide module for this slot.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:16</td>
|
|
<td>PRMODE1</td>
|
|
<td>RW</td>
|
|
<td>Set the Precision Mode For Slot.<br><br>
|
|
P14B = 0x0 - 14-bit precision mode<br>
|
|
P12B = 0x1 - 12-bit precision mode<br>
|
|
P10B = 0x2 - 10-bit precision mode<br>
|
|
P8B = 0x3 - 8-bit precision mode</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:12</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:8</td>
|
|
<td>CHSEL1</td>
|
|
<td>RW</td>
|
|
<td>Select one of the 14 channel inputs for this slot.<br><br>
|
|
SE0 = 0x0 - single ended external GPIO connection to pad16.<br>
|
|
SE1 = 0x1 - single ended external GPIO connection to pad29.<br>
|
|
SE2 = 0x2 - single ended external GPIO connection to pad11.<br>
|
|
SE3 = 0x3 - single ended external GPIO connection to pad31.<br>
|
|
SE4 = 0x4 - single ended external GPIO connection to pad32.<br>
|
|
SE5 = 0x5 - single ended external GPIO connection to pad33.<br>
|
|
SE6 = 0x6 - single ended external GPIO connection to pad34.<br>
|
|
SE7 = 0x7 - single ended external GPIO connection to pad35.<br>
|
|
SE8 = 0x8 - single ended external GPIO connection to pad13.<br>
|
|
SE9 = 0x9 - single ended external GPIO connection to pad12.<br>
|
|
DF0 = 0xA - differential external GPIO connections to pad12(N) and pad13(P).<br>
|
|
DF1 = 0xB - differential external GPIO connections to pad15(N) and pad14(P).<br>
|
|
TEMP = 0xC - internal temperature sensor.<br>
|
|
BATT = 0xD - internal voltage divide-by-3 connection.<br>
|
|
VSS = 0xE - VSS</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:2</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>WCEN1</td>
|
|
<td>RW</td>
|
|
<td>This bit enables the window compare function for slot 1.<br><br>
|
|
WCEN = 0x1 - Enable the window compare for slot 1.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>SLEN1</td>
|
|
<td>RW</td>
|
|
<td>This bit enables slot 1 for ADC conversions.<br><br>
|
|
SLEN = 0x1 - Enable slot 1 for ADC conversions.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="SL2CFG" class="panel-title">SL2CFG - Slot 2 Configuration Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008014</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Slot 2 Configuration Register</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="5">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">ADSEL2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PRMODE2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">CHSEL2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEN2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SLEN2
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:27</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:24</td>
|
|
<td>ADSEL2</td>
|
|
<td>RW</td>
|
|
<td>Select the number of measurements to average in the accumulate divide module for this slot.<br><br>
|
|
AVG_1_MSRMT = 0x0 - Average in 1 measurement in the accumulate divide module for this slot.<br>
|
|
AVG_2_MSRMTS = 0x1 - Average in 2 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_4_MSRMTS = 0x2 - Average in 4 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_8_MSRMT = 0x3 - Average in 8 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_16_MSRMTS = 0x4 - Average in 16 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_32_MSRMTS = 0x5 - Average in 32 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_64_MSRMTS = 0x6 - Average in 64 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_128_MSRMTS = 0x7 - Average in 128 measurements in the accumulate divide module for this slot.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:16</td>
|
|
<td>PRMODE2</td>
|
|
<td>RW</td>
|
|
<td>Set the Precision Mode For Slot.<br><br>
|
|
P14B = 0x0 - 14-bit precision mode<br>
|
|
P12B = 0x1 - 12-bit precision mode<br>
|
|
P10B = 0x2 - 10-bit precision mode<br>
|
|
P8B = 0x3 - 8-bit precision mode</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:12</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:8</td>
|
|
<td>CHSEL2</td>
|
|
<td>RW</td>
|
|
<td>Select one of the 14 channel inputs for this slot.<br><br>
|
|
SE0 = 0x0 - single ended external GPIO connection to pad16.<br>
|
|
SE1 = 0x1 - single ended external GPIO connection to pad29.<br>
|
|
SE2 = 0x2 - single ended external GPIO connection to pad11.<br>
|
|
SE3 = 0x3 - single ended external GPIO connection to pad31.<br>
|
|
SE4 = 0x4 - single ended external GPIO connection to pad32.<br>
|
|
SE5 = 0x5 - single ended external GPIO connection to pad33.<br>
|
|
SE6 = 0x6 - single ended external GPIO connection to pad34.<br>
|
|
SE7 = 0x7 - single ended external GPIO connection to pad35.<br>
|
|
SE8 = 0x8 - single ended external GPIO connection to pad13.<br>
|
|
SE9 = 0x9 - single ended external GPIO connection to pad12.<br>
|
|
DF0 = 0xA - differential external GPIO connections to pad12(N) and pad13(P).<br>
|
|
DF1 = 0xB - differential external GPIO connections to pad15(N) and pad14(P).<br>
|
|
TEMP = 0xC - internal temperature sensor.<br>
|
|
BATT = 0xD - internal voltage divide-by-3 connection.<br>
|
|
VSS = 0xE - VSS</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:2</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>WCEN2</td>
|
|
<td>RW</td>
|
|
<td>This bit enables the window compare function for slot 2.<br><br>
|
|
WCEN = 0x1 - Enable the window compare for slot 2.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>SLEN2</td>
|
|
<td>RW</td>
|
|
<td>This bit enables slot 2 for ADC conversions.<br><br>
|
|
SLEN = 0x1 - Enable slot 2 for ADC conversions.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="SL3CFG" class="panel-title">SL3CFG - Slot 3 Configuration Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008018</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Slot 3 Configuration Register</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="5">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">ADSEL3
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PRMODE3
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">CHSEL3
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEN3
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SLEN3
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:27</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:24</td>
|
|
<td>ADSEL3</td>
|
|
<td>RW</td>
|
|
<td>Select the number of measurements to average in the accumulate divide module for this slot.<br><br>
|
|
AVG_1_MSRMT = 0x0 - Average in 1 measurement in the accumulate divide module for this slot.<br>
|
|
AVG_2_MSRMTS = 0x1 - Average in 2 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_4_MSRMTS = 0x2 - Average in 4 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_8_MSRMT = 0x3 - Average in 8 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_16_MSRMTS = 0x4 - Average in 16 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_32_MSRMTS = 0x5 - Average in 32 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_64_MSRMTS = 0x6 - Average in 64 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_128_MSRMTS = 0x7 - Average in 128 measurements in the accumulate divide module for this slot.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:16</td>
|
|
<td>PRMODE3</td>
|
|
<td>RW</td>
|
|
<td>Set the Precision Mode For Slot.<br><br>
|
|
P14B = 0x0 - 14-bit precision mode<br>
|
|
P12B = 0x1 - 12-bit precision mode<br>
|
|
P10B = 0x2 - 10-bit precision mode<br>
|
|
P8B = 0x3 - 8-bit precision mode</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:12</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:8</td>
|
|
<td>CHSEL3</td>
|
|
<td>RW</td>
|
|
<td>Select one of the 14 channel inputs for this slot.<br><br>
|
|
SE0 = 0x0 - single ended external GPIO connection to pad16.<br>
|
|
SE1 = 0x1 - single ended external GPIO connection to pad29.<br>
|
|
SE2 = 0x2 - single ended external GPIO connection to pad11.<br>
|
|
SE3 = 0x3 - single ended external GPIO connection to pad31.<br>
|
|
SE4 = 0x4 - single ended external GPIO connection to pad32.<br>
|
|
SE5 = 0x5 - single ended external GPIO connection to pad33.<br>
|
|
SE6 = 0x6 - single ended external GPIO connection to pad34.<br>
|
|
SE7 = 0x7 - single ended external GPIO connection to pad35.<br>
|
|
SE8 = 0x8 - single ended external GPIO connection to pad13.<br>
|
|
SE9 = 0x9 - single ended external GPIO connection to pad12.<br>
|
|
DF0 = 0xA - differential external GPIO connections to pad12(N) and pad13(P).<br>
|
|
DF1 = 0xB - differential external GPIO connections to pad15(N) and pad14(P).<br>
|
|
TEMP = 0xC - internal temperature sensor.<br>
|
|
BATT = 0xD - internal voltage divide-by-3 connection.<br>
|
|
VSS = 0xE - VSS</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:2</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>WCEN3</td>
|
|
<td>RW</td>
|
|
<td>This bit enables the window compare function for slot 3.<br><br>
|
|
WCEN = 0x1 - Enable the window compare for slot 3.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>SLEN3</td>
|
|
<td>RW</td>
|
|
<td>This bit enables slot 3 for ADC conversions.<br><br>
|
|
SLEN = 0x1 - Enable slot 3 for ADC conversions.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="SL4CFG" class="panel-title">SL4CFG - Slot 4 Configuration Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x5000801C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Slot 4 Configuration Register</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="5">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">ADSEL4
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PRMODE4
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">CHSEL4
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEN4
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SLEN4
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:27</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:24</td>
|
|
<td>ADSEL4</td>
|
|
<td>RW</td>
|
|
<td>Select the number of measurements to average in the accumulate divide module for this slot.<br><br>
|
|
AVG_1_MSRMT = 0x0 - Average in 1 measurement in the accumulate divide module for this slot.<br>
|
|
AVG_2_MSRMTS = 0x1 - Average in 2 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_4_MSRMTS = 0x2 - Average in 4 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_8_MSRMT = 0x3 - Average in 8 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_16_MSRMTS = 0x4 - Average in 16 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_32_MSRMTS = 0x5 - Average in 32 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_64_MSRMTS = 0x6 - Average in 64 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_128_MSRMTS = 0x7 - Average in 128 measurements in the accumulate divide module for this slot.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:16</td>
|
|
<td>PRMODE4</td>
|
|
<td>RW</td>
|
|
<td>Set the Precision Mode For Slot.<br><br>
|
|
P14B = 0x0 - 14-bit precision mode<br>
|
|
P12B = 0x1 - 12-bit precision mode<br>
|
|
P10B = 0x2 - 10-bit precision mode<br>
|
|
P8B = 0x3 - 8-bit precision mode</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:12</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:8</td>
|
|
<td>CHSEL4</td>
|
|
<td>RW</td>
|
|
<td>Select one of the 14 channel inputs for this slot.<br><br>
|
|
SE0 = 0x0 - single ended external GPIO connection to pad16.<br>
|
|
SE1 = 0x1 - single ended external GPIO connection to pad29.<br>
|
|
SE2 = 0x2 - single ended external GPIO connection to pad11.<br>
|
|
SE3 = 0x3 - single ended external GPIO connection to pad31.<br>
|
|
SE4 = 0x4 - single ended external GPIO connection to pad32.<br>
|
|
SE5 = 0x5 - single ended external GPIO connection to pad33.<br>
|
|
SE6 = 0x6 - single ended external GPIO connection to pad34.<br>
|
|
SE7 = 0x7 - single ended external GPIO connection to pad35.<br>
|
|
SE8 = 0x8 - single ended external GPIO connection to pad13.<br>
|
|
SE9 = 0x9 - single ended external GPIO connection to pad12.<br>
|
|
DF0 = 0xA - differential external GPIO connections to pad12(N) and pad13(P).<br>
|
|
DF1 = 0xB - differential external GPIO connections to pad15(N) and pad14(P).<br>
|
|
TEMP = 0xC - internal temperature sensor.<br>
|
|
BATT = 0xD - internal voltage divide-by-3 connection.<br>
|
|
VSS = 0xE - VSS</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:2</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>WCEN4</td>
|
|
<td>RW</td>
|
|
<td>This bit enables the window compare function for slot 4.<br><br>
|
|
WCEN = 0x1 - Enable the window compare for slot 4.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>SLEN4</td>
|
|
<td>RW</td>
|
|
<td>This bit enables slot 4 for ADC conversions.<br><br>
|
|
SLEN = 0x1 - Enable slot 4 for ADC conversions.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="SL5CFG" class="panel-title">SL5CFG - Slot 5 Configuration Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008020</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Slot 5 Configuration Register</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="5">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">ADSEL5
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PRMODE5
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">CHSEL5
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEN5
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SLEN5
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:27</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:24</td>
|
|
<td>ADSEL5</td>
|
|
<td>RW</td>
|
|
<td>Select number of measurements to average in the accumulate divide module for this slot.<br><br>
|
|
AVG_1_MSRMT = 0x0 - Average in 1 measurement in the accumulate divide module for this slot.<br>
|
|
AVG_2_MSRMTS = 0x1 - Average in 2 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_4_MSRMTS = 0x2 - Average in 4 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_8_MSRMT = 0x3 - Average in 8 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_16_MSRMTS = 0x4 - Average in 16 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_32_MSRMTS = 0x5 - Average in 32 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_64_MSRMTS = 0x6 - Average in 64 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_128_MSRMTS = 0x7 - Average in 128 measurements in the accumulate divide module for this slot.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:16</td>
|
|
<td>PRMODE5</td>
|
|
<td>RW</td>
|
|
<td>Set the Precision Mode For Slot.<br><br>
|
|
P14B = 0x0 - 14-bit precision mode<br>
|
|
P12B = 0x1 - 12-bit precision mode<br>
|
|
P10B = 0x2 - 10-bit precision mode<br>
|
|
P8B = 0x3 - 8-bit precision mode</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:12</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:8</td>
|
|
<td>CHSEL5</td>
|
|
<td>RW</td>
|
|
<td>Select one of the 14 channel inputs for this slot.<br><br>
|
|
SE0 = 0x0 - single ended external GPIO connection to pad16.<br>
|
|
SE1 = 0x1 - single ended external GPIO connection to pad29.<br>
|
|
SE2 = 0x2 - single ended external GPIO connection to pad11.<br>
|
|
SE3 = 0x3 - single ended external GPIO connection to pad31.<br>
|
|
SE4 = 0x4 - single ended external GPIO connection to pad32.<br>
|
|
SE5 = 0x5 - single ended external GPIO connection to pad33.<br>
|
|
SE6 = 0x6 - single ended external GPIO connection to pad34.<br>
|
|
SE7 = 0x7 - single ended external GPIO connection to pad35.<br>
|
|
SE8 = 0x8 - single ended external GPIO connection to pad13.<br>
|
|
SE9 = 0x9 - single ended external GPIO connection to pad12.<br>
|
|
DF0 = 0xA - differential external GPIO connections to pad12(N) and pad13(P).<br>
|
|
DF1 = 0xB - differential external GPIO connections to pad15(N) and pad14(P).<br>
|
|
TEMP = 0xC - internal temperature sensor.<br>
|
|
BATT = 0xD - internal voltage divide-by-3 connection.<br>
|
|
VSS = 0xE - VSS</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:2</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>WCEN5</td>
|
|
<td>RW</td>
|
|
<td>This bit enables the window compare function for slot 5.<br><br>
|
|
WCEN = 0x1 - Enable the window compare for slot 5.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>SLEN5</td>
|
|
<td>RW</td>
|
|
<td>This bit enables slot 5 for ADC conversions.<br><br>
|
|
SLEN = 0x1 - Enable slot 5 for ADC conversions.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="SL6CFG" class="panel-title">SL6CFG - Slot 6 Configuration Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008024</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Slot 6 Configuration Register</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="5">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">ADSEL6
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PRMODE6
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">CHSEL6
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEN6
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SLEN6
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:27</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:24</td>
|
|
<td>ADSEL6</td>
|
|
<td>RW</td>
|
|
<td>Select the number of measurements to average in the accumulate divide module for this slot.<br><br>
|
|
AVG_1_MSRMT = 0x0 - Average in 1 measurement in the accumulate divide module for this slot.<br>
|
|
AVG_2_MSRMTS = 0x1 - Average in 2 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_4_MSRMTS = 0x2 - Average in 4 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_8_MSRMT = 0x3 - Average in 8 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_16_MSRMTS = 0x4 - Average in 16 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_32_MSRMTS = 0x5 - Average in 32 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_64_MSRMTS = 0x6 - Average in 64 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_128_MSRMTS = 0x7 - Average in 128 measurements in the accumulate divide module for this slot.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:16</td>
|
|
<td>PRMODE6</td>
|
|
<td>RW</td>
|
|
<td>Set the Precision Mode For Slot.<br><br>
|
|
P14B = 0x0 - 14-bit precision mode<br>
|
|
P12B = 0x1 - 12-bit precision mode<br>
|
|
P10B = 0x2 - 10-bit precision mode<br>
|
|
P8B = 0x3 - 8-bit precision mode</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:12</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:8</td>
|
|
<td>CHSEL6</td>
|
|
<td>RW</td>
|
|
<td>Select one of the 14 channel inputs for this slot.<br><br>
|
|
SE0 = 0x0 - single ended external GPIO connection to pad16.<br>
|
|
SE1 = 0x1 - single ended external GPIO connection to pad29.<br>
|
|
SE2 = 0x2 - single ended external GPIO connection to pad11.<br>
|
|
SE3 = 0x3 - single ended external GPIO connection to pad31.<br>
|
|
SE4 = 0x4 - single ended external GPIO connection to pad32.<br>
|
|
SE5 = 0x5 - single ended external GPIO connection to pad33.<br>
|
|
SE6 = 0x6 - single ended external GPIO connection to pad34.<br>
|
|
SE7 = 0x7 - single ended external GPIO connection to pad35.<br>
|
|
SE8 = 0x8 - single ended external GPIO connection to pad13.<br>
|
|
SE9 = 0x9 - single ended external GPIO connection to pad12.<br>
|
|
DF0 = 0xA - differential external GPIO connections to pad12(N) and pad13(P).<br>
|
|
DF1 = 0xB - differential external GPIO connections to pad15(N) and pad14(P).<br>
|
|
TEMP = 0xC - internal temperature sensor.<br>
|
|
BATT = 0xD - internal voltage divide-by-3 connection.<br>
|
|
VSS = 0xE - VSS</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:2</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>WCEN6</td>
|
|
<td>RW</td>
|
|
<td>This bit enables the window compare function for slot 6.<br><br>
|
|
WCEN = 0x1 - Enable the window compare for slot 6.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>SLEN6</td>
|
|
<td>RW</td>
|
|
<td>This bit enables slot 6 for ADC conversions.<br><br>
|
|
SLEN = 0x1 - Enable slot 6 for ADC conversions.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="SL7CFG" class="panel-title">SL7CFG - Slot 7 Configuration Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008028</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Slot 7 Configuration Register</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="5">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">ADSEL7
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="2">PRMODE7
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="4">CHSEL7
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="6">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEN7
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SLEN7
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:27</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>26:24</td>
|
|
<td>ADSEL7</td>
|
|
<td>RW</td>
|
|
<td>Select the number of measurements to average in the accumulate divide module for this slot.<br><br>
|
|
AVG_1_MSRMT = 0x0 - Average in 1 measurement in the accumulate divide module for this slot.<br>
|
|
AVG_2_MSRMTS = 0x1 - Average in 2 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_4_MSRMTS = 0x2 - Average in 4 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_8_MSRMT = 0x3 - Average in 8 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_16_MSRMTS = 0x4 - Average in 16 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_32_MSRMTS = 0x5 - Average in 32 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_64_MSRMTS = 0x6 - Average in 64 measurements in the accumulate divide module for this slot.<br>
|
|
AVG_128_MSRMTS = 0x7 - Average in 128 measurements in the accumulate divide module for this slot.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>23:18</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>17:16</td>
|
|
<td>PRMODE7</td>
|
|
<td>RW</td>
|
|
<td>Set the Precision Mode For Slot.<br><br>
|
|
P14B = 0x0 - 14-bit precision mode<br>
|
|
P12B = 0x1 - 12-bit precision mode<br>
|
|
P10B = 0x2 - 10-bit precision mode<br>
|
|
P8B = 0x3 - 8-bit precision mode</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>15:12</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>11:8</td>
|
|
<td>CHSEL7</td>
|
|
<td>RW</td>
|
|
<td>Select one of the 14 channel inputs for this slot.<br><br>
|
|
SE0 = 0x0 - single ended external GPIO connection to pad16.<br>
|
|
SE1 = 0x1 - single ended external GPIO connection to pad29.<br>
|
|
SE2 = 0x2 - single ended external GPIO connection to pad11.<br>
|
|
SE3 = 0x3 - single ended external GPIO connection to pad31.<br>
|
|
SE4 = 0x4 - single ended external GPIO connection to pad32.<br>
|
|
SE5 = 0x5 - single ended external GPIO connection to pad33.<br>
|
|
SE6 = 0x6 - single ended external GPIO connection to pad34.<br>
|
|
SE7 = 0x7 - single ended external GPIO connection to pad35.<br>
|
|
SE8 = 0x8 - single ended external GPIO connection to pad13.<br>
|
|
SE9 = 0x9 - single ended external GPIO connection to pad12.<br>
|
|
DF0 = 0xA - differential external GPIO connections to pad12(N) and pad13(P).<br>
|
|
DF1 = 0xB - differential external GPIO connections to pad15(N) and pad14(P).<br>
|
|
TEMP = 0xC - internal temperature sensor.<br>
|
|
BATT = 0xD - internal voltage divide-by-3 connection.<br>
|
|
VSS = 0xE - VSS</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>7:2</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>WCEN7</td>
|
|
<td>RW</td>
|
|
<td>This bit enables the window compare function for slot 7.<br><br>
|
|
WCEN = 0x1 - Enable the window compare for slot 7.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>SLEN7</td>
|
|
<td>RW</td>
|
|
<td>This bit enables slot 7 for ADC conversions.<br><br>
|
|
SLEN = 0x1 - Enable slot 7 for ADC conversions.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="WULIM" class="panel-title">WULIM - Window Comparator Upper Limits Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x5000802C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Window Comparator Upper Limits Register</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="12">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="20">ULIM
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:20</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:0</td>
|
|
<td>ULIM</td>
|
|
<td>RW</td>
|
|
<td>Sets the upper limit for the wondow comparator.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="WLLIM" class="panel-title">WLLIM - Window Comparator Lower Limits Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008030</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Window Comparator Lower Limits Register</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="12">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="20">LLIM
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:20</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:0</td>
|
|
<td>LLIM</td>
|
|
<td>RW</td>
|
|
<td>Sets the lower limit for the wondow comparator.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="FIFO" class="panel-title">FIFO - FIFO Data and Valid Count Register</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008038</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>The ADC FIFO Register contains the slot number and fifo data for the oldest conversion data in the FIFO. The COUNT field indicates the total number of valid entries in the FIFO. A write to this register will pop one of the FIFO entries off the FIFO and decrease the COUNT by 1 if the COUNT is greater than zero.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="1">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="3">SLOTNUM
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="8">COUNT
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="20">DATA
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>30:28</td>
|
|
<td>SLOTNUM</td>
|
|
<td>RO</td>
|
|
<td>Slot number associated with this FIFO data.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>27:20</td>
|
|
<td>COUNT</td>
|
|
<td>RO</td>
|
|
<td>Number of valid entries in the ADC FIFO.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>19:0</td>
|
|
<td>DATA</td>
|
|
<td>RO</td>
|
|
<td>Oldest data in the FIFO.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INTEN" class="panel-title">INTEN - ADC Interrupt registers: Enable</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008200</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Set bits in this register to allow this module to generate the corresponding interrupt.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="26">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCINC
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEXC
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">FIFOOVR2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">FIFOOVR1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SCNCMP
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">CNVCMP
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>WCINC</td>
|
|
<td>RW</td>
|
|
<td>Window comparator voltage incursion interrupt.<br><br>
|
|
WCINCINT = 0x1 - Window comparitor voltage incursion interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>WCEXC</td>
|
|
<td>RW</td>
|
|
<td>Window comparator voltage excursion interrupt.<br><br>
|
|
WCEXCINT = 0x1 - Window comparitor voltage excursion interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>FIFOOVR2</td>
|
|
<td>RW</td>
|
|
<td>FIFO 100% full interrupt.<br><br>
|
|
FIFOFULLINT = 0x1 - FIFO 100% full interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>FIFOOVR1</td>
|
|
<td>RW</td>
|
|
<td>FIFO 75% full interrupt.<br><br>
|
|
FIFO75INT = 0x1 - FIFO 75% full interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>SCNCMP</td>
|
|
<td>RW</td>
|
|
<td>ADC scan complete interrupt.<br><br>
|
|
SCNCMPINT = 0x1 - ADC scan complete interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>CNVCMP</td>
|
|
<td>RW</td>
|
|
<td>ADC conversion complete interrupt.<br><br>
|
|
CNVCMPINT = 0x1 - ADC conversion complete interrupt.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INTSTAT" class="panel-title">INTSTAT - ADC Interrupt registers: Status</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008204</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Read bits from this register to discover the cause of a recent interrupt.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="26">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCINC
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEXC
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">FIFOOVR2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">FIFOOVR1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SCNCMP
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">CNVCMP
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>WCINC</td>
|
|
<td>RW</td>
|
|
<td>Window comparator voltage incursion interrupt.<br><br>
|
|
WCINCINT = 0x1 - Window comparitor voltage incursion interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>WCEXC</td>
|
|
<td>RW</td>
|
|
<td>Window comparator voltage excursion interrupt.<br><br>
|
|
WCEXCINT = 0x1 - Window comparitor voltage excursion interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>FIFOOVR2</td>
|
|
<td>RW</td>
|
|
<td>FIFO 100% full interrupt.<br><br>
|
|
FIFOFULLINT = 0x1 - FIFO 100% full interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>FIFOOVR1</td>
|
|
<td>RW</td>
|
|
<td>FIFO 75% full interrupt.<br><br>
|
|
FIFO75INT = 0x1 - FIFO 75% full interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>SCNCMP</td>
|
|
<td>RW</td>
|
|
<td>ADC scan complete interrupt.<br><br>
|
|
SCNCMPINT = 0x1 - ADC scan complete interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>CNVCMP</td>
|
|
<td>RW</td>
|
|
<td>ADC conversion complete interrupt.<br><br>
|
|
CNVCMPINT = 0x1 - ADC conversion complete interrupt.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INTCLR" class="panel-title">INTCLR - ADC Interrupt registers: Clear</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x50008208</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Write a 1 to a bit in this register to clear the interrupt status associated with that bit.</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="26">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCINC
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEXC
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">FIFOOVR2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">FIFOOVR1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SCNCMP
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">CNVCMP
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>WCINC</td>
|
|
<td>RW</td>
|
|
<td>Window comparator voltage incursion interrupt.<br><br>
|
|
WCINCINT = 0x1 - Window comparitor voltage incursion interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>WCEXC</td>
|
|
<td>RW</td>
|
|
<td>Window comparator voltage excursion interrupt.<br><br>
|
|
WCEXCINT = 0x1 - Window comparitor voltage excursion interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>FIFOOVR2</td>
|
|
<td>RW</td>
|
|
<td>FIFO 100% full interrupt.<br><br>
|
|
FIFOFULLINT = 0x1 - FIFO 100% full interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>FIFOOVR1</td>
|
|
<td>RW</td>
|
|
<td>FIFO 75% full interrupt.<br><br>
|
|
FIFO75INT = 0x1 - FIFO 75% full interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>SCNCMP</td>
|
|
<td>RW</td>
|
|
<td>ADC scan complete interrupt.<br><br>
|
|
SCNCMPINT = 0x1 - ADC scan complete interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>CNVCMP</td>
|
|
<td>RW</td>
|
|
<td>ADC conversion complete interrupt.<br><br>
|
|
CNVCMPINT = 0x1 - ADC conversion complete interrupt.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
<div class="panel panel-default">
|
|
<div class="panel-heading">
|
|
<h3 id="INTSET" class="panel-title">INTSET - ADC Interrupt registers: Set</h3>
|
|
</div>
|
|
<div class="panel-body">
|
|
<h3>Address:</h3>
|
|
<table style="margin:10px">
|
|
<tr id="row_0_0_">
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">Instance 0 Address:</span>
|
|
</td>
|
|
<td class="entry">
|
|
<span style="width:32px;display:inline-block;"> </span>
|
|
<span class="h5">0x5000820C</span>
|
|
</td>
|
|
</tr>
|
|
|
|
</table>
|
|
<h3>Description:</h3>
|
|
<p>Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for testing purposes).</p>
|
|
<h3>Example Macro Usage:</h3>
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
|
// All macro-based register writes follow the same basic format. For
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
|
// multi-instance macros, you will need to specify the instance number using
|
|
// the AM_REGn macro format.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
|
//
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
|
//
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
|
//
|
|
// For example, the following three lines of code are equivalent methods of
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
|
//</span>
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
|
<h3>Register Fields:</h3>
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td align="center" colspan="26">RSVD
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCINC
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">WCEXC
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">FIFOOVR2
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">FIFOOVR1
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">SCNCMP
|
|
<br>0x0</td>
|
|
|
|
<td align="center" colspan="1">CNVCMP
|
|
<br>0x0</td>
|
|
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
|
<thead>
|
|
<tr>
|
|
<th>Bits</th>
|
|
<th>Name</th>
|
|
<th>RW</th>
|
|
<th>Description</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>31:6</td>
|
|
<td>RSVD</td>
|
|
<td>RO</td>
|
|
<td>RESERVED.<br><br>
|
|
</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>5</td>
|
|
<td>WCINC</td>
|
|
<td>RW</td>
|
|
<td>Window comparator voltage incursion interrupt.<br><br>
|
|
WCINCINT = 0x1 - Window comparitor voltage incursion interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>4</td>
|
|
<td>WCEXC</td>
|
|
<td>RW</td>
|
|
<td>Window comparator voltage excursion interrupt.<br><br>
|
|
WCEXCINT = 0x1 - Window comparitor voltage excursion interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>3</td>
|
|
<td>FIFOOVR2</td>
|
|
<td>RW</td>
|
|
<td>FIFO 100% full interrupt.<br><br>
|
|
FIFOFULLINT = 0x1 - FIFO 100% full interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>2</td>
|
|
<td>FIFOOVR1</td>
|
|
<td>RW</td>
|
|
<td>FIFO 75% full interrupt.<br><br>
|
|
FIFO75INT = 0x1 - FIFO 75% full interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>1</td>
|
|
<td>SCNCMP</td>
|
|
<td>RW</td>
|
|
<td>ADC scan complete interrupt.<br><br>
|
|
SCNCMPINT = 0x1 - ADC scan complete interrupt.</td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td>0</td>
|
|
<td>CNVCMP</td>
|
|
<td>RW</td>
|
|
<td>ADC conversion complete interrupt.<br><br>
|
|
CNVCMPINT = 0x1 - ADC conversion complete interrupt.</td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
</div>
|
|
</div>
|
|
|
|
</body>
|
|
|
|
<hr size="1">
|
|
<body>
|
|
<div id="footer" align="right">
|
|
<small>
|
|
AmbiqSuite Register Documentation
|
|
<a href="http://www.ambiqmicro.com">
|
|
<img class="footer" src="../resources/ambiqmicro_logo.png" alt="Ambiq Micro"/></a>   Copyright © 2014  <br />
|
|
This documentation is licensed and distributed under the <a rel="license" href="http://opensource.org/licenses/BSD-3-Clause">BSD 3-Clause License</a>.  <br/>
|
|
</small>
|
|
</div>
|
|
</body>
|
|
</html>
|
|
|