211 lines
8.6 KiB
C
211 lines
8.6 KiB
C
//*****************************************************************************
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//
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//! @file am_bsp_gpio.h
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//!
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//! @brief Functions to aid with configuring the GPIOs.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2020, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// Third party software included in this distribution is subject to the
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// additional license terms as defined in the /docs/licenses directory.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#ifndef AM_BSP_GPIO_H
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#define AM_BSP_GPIO_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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// Miscellaneous pins.
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//
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//*****************************************************************************
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#define AM_BSP_GPIO_BUTTON0 17
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#define AM_BSP_GPIO_BUTTON1 18
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#define AM_BSP_GPIO_BUTTON2 19
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#define AM_BSP_GPIO_IOS_IRQ 2
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#define AM_BSP_GPIO_LED0 34
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#define AM_BSP_GPIO_LED1 33
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#define AM_BSP_GPIO_LED2 28
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#define AM_BSP_GPIO_LED3 26
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#define AM_BSP_GPIO_LED4 25
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//*****************************************************************************
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//
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// BOOTLOADER_UART pins.
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//
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//*****************************************************************************
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#define AM_BSP_GPIO_BOOTLOADER_UART_RX 36
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#define AM_BSP_GPIO_CFG_BOOTLOADER_UART_RX AM_HAL_PIN_36_UARTRX
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#define AM_BSP_GPIO_BOOTLOADER_UART_TX 35
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#define AM_BSP_GPIO_CFG_BOOTLOADER_UART_TX AM_HAL_PIN_35_UARTTX
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//*****************************************************************************
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//
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// CLKOUT pins.
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//
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//*****************************************************************************
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#define AM_BSP_GPIO_CLKOUT_PIN 24
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#define AM_BSP_GPIO_CFG_CLKOUT_PIN AM_HAL_PIN_24_CLKOUT
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//*****************************************************************************
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//
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// COM_UART pins.
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//
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//*****************************************************************************
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#define AM_BSP_GPIO_COM_UART_CTS 38
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#define AM_BSP_GPIO_CFG_COM_UART_CTS AM_HAL_PIN_INPUT
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#define AM_BSP_GPIO_COM_UART_RTS 37
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#define AM_BSP_GPIO_CFG_COM_UART_RTS AM_HAL_PIN_INPUT
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#define AM_BSP_GPIO_COM_UART_RX 36
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#define AM_BSP_GPIO_CFG_COM_UART_RX AM_HAL_PIN_36_UARTRX
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#define AM_BSP_GPIO_COM_UART_TX 35
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#define AM_BSP_GPIO_CFG_COM_UART_TX AM_HAL_PIN_35_UARTTX
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//*****************************************************************************
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//
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// CORE pins.
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//
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//*****************************************************************************
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#define AM_BSP_GPIO_CORE_SWDCK 20
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#define AM_BSP_GPIO_CFG_CORE_SWDCK AM_HAL_PIN_20_SWDCK
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#define AM_BSP_GPIO_CORE_SWDIO 21
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#define AM_BSP_GPIO_CFG_CORE_SWDIO AM_HAL_PIN_21_SWDIO
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//*****************************************************************************
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//
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// DISPLAY pins.
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//
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//*****************************************************************************
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#define AM_BSP_GPIO_DISPLAY_BACKLT 29
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#define AM_BSP_GPIO_CFG_DISPLAY_BACKLT AM_HAL_PIN_OUTPUT
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#define AM_BSP_GPIO_DISPLAY_D_C 31
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#define AM_BSP_GPIO_CFG_DISPLAY_D_C AM_HAL_PIN_OUTPUT
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//*****************************************************************************
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//
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// IOM0 pins.
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//
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//*****************************************************************************
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#define AM_BSP_GPIO_IOM0_CS 11
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#define AM_BSP_GPIO_CFG_IOM0_CS AM_HAL_PIN_11_M0nCE0
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#define AM_BSP_GPIO_IOM0_MISO 6
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#define AM_BSP_GPIO_CFG_IOM0_MISO AM_HAL_PIN_6_M0MISO
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#define AM_BSP_GPIO_IOM0_MOSI 7
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#define AM_BSP_GPIO_CFG_IOM0_MOSI AM_HAL_PIN_7_M0MOSI
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#define AM_BSP_GPIO_IOM0_SCK 5
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#define AM_BSP_GPIO_CFG_IOM0_SCK (AM_HAL_PIN_5_M0SCK | AM_HAL_GPIO_HIGH_DRIVE)
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#define AM_BSP_GPIO_IOM0_SCL 5
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#define AM_BSP_GPIO_CFG_IOM0_SCL (AM_HAL_PIN_5_M0SCL | AM_HAL_GPIO_PULL1_5K)
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#define AM_BSP_GPIO_IOM0_SDA 6
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#define AM_BSP_GPIO_CFG_IOM0_SDA (AM_HAL_PIN_6_M0SDA | AM_HAL_GPIO_PULL1_5K)
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//*****************************************************************************
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//
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// IOM1 pins.
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//
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//*****************************************************************************
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#define AM_BSP_GPIO_IOM1_CS 12
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#define AM_BSP_GPIO_CFG_IOM1_CS AM_HAL_PIN_12_M1nCE0
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#define AM_BSP_GPIO_IOM1_MISO 9
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#define AM_BSP_GPIO_CFG_IOM1_MISO AM_HAL_PIN_9_M1MISO
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#define AM_BSP_GPIO_IOM1_MONODISPLAY_CS 12
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#define AM_BSP_GPIO_CFG_IOM1_MONODISPLAY_CS AM_HAL_PIN_OUTPUT
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#define AM_BSP_GPIO_IOM1_MOSI 10
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#define AM_BSP_GPIO_CFG_IOM1_MOSI AM_HAL_PIN_10_M1MOSI
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#define AM_BSP_GPIO_IOM1_SCK 8
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#define AM_BSP_GPIO_CFG_IOM1_SCK (AM_HAL_PIN_8_M1SCK | AM_HAL_GPIO_HIGH_DRIVE)
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#define AM_BSP_GPIO_IOM1_SCL 8
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#define AM_BSP_GPIO_CFG_IOM1_SCL (AM_HAL_PIN_8_M1SCL | AM_HAL_GPIO_PULL1_5K)
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#define AM_BSP_GPIO_IOM1_SDA 9
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#define AM_BSP_GPIO_CFG_IOM1_SDA (AM_HAL_PIN_9_M1SDA | AM_HAL_GPIO_PULL1_5K)
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//*****************************************************************************
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//
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// IOS pins.
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//
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//*****************************************************************************
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#define AM_BSP_GPIO_IOS_INT 4
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#define AM_BSP_GPIO_CFG_IOS_INT AM_HAL_PIN_4_SLINT
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#define AM_BSP_GPIO_IOS_MISO 1
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#define AM_BSP_GPIO_CFG_IOS_MISO AM_HAL_PIN_1_SLMISO
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#define AM_BSP_GPIO_IOS_MOSI 2
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#define AM_BSP_GPIO_CFG_IOS_MOSI AM_HAL_PIN_2_SLMOSI
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#define AM_BSP_GPIO_IOS_SCK 0
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#define AM_BSP_GPIO_CFG_IOS_SCK AM_HAL_PIN_0_SLSCK
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#define AM_BSP_GPIO_IOS_SCL 0
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#define AM_BSP_GPIO_CFG_IOS_SCL AM_HAL_PIN_0_SLSCL
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#define AM_BSP_GPIO_IOS_SDA 1
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#define AM_BSP_GPIO_CFG_IOS_SDA AM_HAL_PIN_1_SLSDA
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#define AM_BSP_GPIO_IOS_nCE 3
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#define AM_BSP_GPIO_CFG_IOS_nCE AM_HAL_PIN_3_SLnCE
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//*****************************************************************************
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//
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// ITM pins.
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//
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//*****************************************************************************
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#define AM_BSP_GPIO_ITM_SWO 41
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#define AM_BSP_GPIO_CFG_ITM_SWO AM_HAL_PIN_41_SWO
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//*****************************************************************************
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//
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// VCOMP pins.
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//
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//*****************************************************************************
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#define AM_BSP_GPIO_VCOMP_RXO 42
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#define AM_BSP_GPIO_CFG_VCOMP_RXO AM_HAL_PIN_OUTPUT
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//*****************************************************************************
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//
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// Convenience macros for enabling and disabling pins by function.
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//
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//*****************************************************************************
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#define am_bsp_pin_enable(name) \
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am_hal_gpio_pin_config(AM_BSP_GPIO_ ## name, AM_BSP_GPIO_CFG_ ## name);
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#define am_bsp_pin_disable(name) \
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am_hal_gpio_pin_config(AM_BSP_GPIO_ ## name, AM_HAL_PIN_DISABLE);
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#ifdef __cplusplus
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}
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#endif
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#endif // AM_BSP_GPIO_H
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