vos/tools/svl/bootloader/gcc/artemis_module/bin/svl.map
2022-10-23 23:45:43 -07:00

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.text.am_hal_gpio_fast_pinconfig
0x0000000000000000 0x378 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.text.am_hal_gpio_state_read
0x0000000000000000 0x6c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.text.am_hal_gpio_state_write
0x0000000000000000 0x88 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.text.am_hal_gpio_interrupt_status_get
0x0000000000000000 0x40 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.text.am_hal_gpio_interrupt_register
0x0000000000000000 0x20 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.text.am_hal_gpio_interrupt_register_adv
0x0000000000000000 0x30 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.text.am_hal_gpio_interrupt_service
0x0000000000000000 0xc0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.text.ap3_gpio_get_pinconfig_bitmasks
0x0000000000000000 0x78 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.text.ap3_hal_gpio_pinconfig_partial
0x0000000000000000 0x2c4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.bss.gpio_pHandlerCtxt
0x0000000000000000 0xc8 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.bss.gpio_ppfnHandlers
0x0000000000000000 0xc8 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_AM_HAL_GPIO_INPUT
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_AM_HAL_GPIO_INPUT_PULLUP_12
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_AM_HAL_GPIO_INPUT_PULLUP_1_5
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_AM_HAL_GPIO_INPUT_PULLUP_24
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_AM_HAL_GPIO_INPUT_PULLUP_6
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_AM_HAL_GPIO_OUTPUT
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_AM_HAL_GPIO_OUTPUT_12
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_AM_HAL_GPIO_OUTPUT_4
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_AM_HAL_GPIO_OUTPUT_8
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_AM_HAL_GPIO_OUTPUT_WITH_READ
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_AM_HAL_GPIO_TRISTATE
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.text 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_interrupt.o)
.data 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_interrupt.o)
.bss 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_interrupt.o)
.text 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
.data 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
.bss 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
.text.am_hal_pwrctrl_periph_enabled
0x0000000000000000 0x5c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
.text.am_hal_pwrctrl_memory_enable
0x0000000000000000 0x98 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
.text.am_hal_pwrctrl_memory_deepsleep_powerdown
0x0000000000000000 0x28 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
.text.am_hal_pwrctrl_memory_deepsleep_retain
0x0000000000000000 0x2c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
.text.am_hal_pwrctrl_low_power_init
0x0000000000000000 0x16c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
.rodata.am_hal_pwrctrl_memory_control
0x0000000000000000 0x1b0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
.text 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
.data 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
.bss 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
.text.am_hal_reset_configure
0x0000000000000000 0x44 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
.text.am_hal_reset_status_get
0x0000000000000000 0x70 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
.text.am_hal_reset_interrupt_enable
0x0000000000000000 0x28 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
.text.am_hal_reset_interrupt_disable
0x0000000000000000 0x28 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
.text.am_hal_reset_interrupt_clear
0x0000000000000000 0xc ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
.text.am_hal_reset_interrupt_status_get
0x0000000000000000 0x14 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
.rodata.CSWTCH.18
0x0000000000000000 0x10 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
.rodata.CSWTCH.19
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
.text 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.data 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.bss 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text.am_hal_stimer_counter_clear
0x0000000000000000 0x20 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text.am_hal_stimer_compare_delta_set
0x0000000000000000 0xac ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text.am_hal_stimer_compare_get
0x0000000000000000 0x18 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text.am_hal_stimer_capture_start
0x0000000000000000 0x9c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text.am_hal_stimer_capture_stop
0x0000000000000000 0x1c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text.am_hal_stimer_nvram_set
0x0000000000000000 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text.am_hal_stimer_nvram_get
0x0000000000000000 0x18 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text.am_hal_stimer_capture_get
0x0000000000000000 0x18 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text.am_hal_stimer_int_enable_get
0x0000000000000000 0xc ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text.am_hal_stimer_int_set
0x0000000000000000 0xc ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text.am_hal_stimer_int_status_get
0x0000000000000000 0x18 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
.text 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_sysctrl.o)
.data 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_sysctrl.o)
.bss 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_sysctrl.o)
.text.am_hal_sysctrl_fpu_enable
0x0000000000000000 0x10 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_sysctrl.o)
.text.am_hal_sysctrl_fpu_disable
0x0000000000000000 0x10 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_sysctrl.o)
.text.am_hal_sysctrl_fpu_stacking_enable
0x0000000000000000 0x34 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_sysctrl.o)
.text.am_hal_sysctrl_fpu_stacking_disable
0x0000000000000000 0x24 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_sysctrl.o)
.text.am_hal_sysctrl_aircr_reset
0x0000000000000000 0x24 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_sysctrl.o)
.text 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
.data 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
.bss 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
.text.am_hal_uart_deinitialize
0x0000000000000000 0x28 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
.text.am_hal_uart_tx_flush
0x0000000000000000 0x50 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
.text.am_hal_uart_flags_get
0x0000000000000000 0x2c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
.text.am_hal_uart_fifo_read
0x0000000000000000 0x68 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
.text.am_hal_uart_fifo_write
0x0000000000000000 0x5c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
.text.am_hal_uart_interrupt_disable
0x0000000000000000 0x2c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
.text.am_hal_uart_interrupt_enable_get
0x0000000000000000 0x28 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
.text 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_queue.o)
.data 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_queue.o)
.bss 0x0000000000000000 0x0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_queue.o)
Memory Configuration
Name Origin Length Attributes
flash 0x000000000000c000 0x00000000000f0000 xr
sram 0x0000000010000000 0x0000000000060000 xrw
*default* 0x0000000000000000 0xffffffffffffffff
Linker script and memory map
.text 0x000000000000c000 0x3078
0x000000000000c000 . = ALIGN (0x4)
0x000000000000c000 _stext = .
*(.isr_vector)
.isr_vector 0x000000000000c000 0xc0 ../gcc/artemis_module/bin/startup_gcc.o
0x000000000000c000 g_am_pfnVectors
*(.ble_patch)
.ble_patch 0x000000000000c0c0 0x40 ../gcc/artemis_module/bin/startup_gcc.o
0x000000000000c0c0 __Patchable
*(.text)
.text 0x000000000000c100 0x30 /Users/owenlyke/gnu/arm/gcc-arm-none-eabi-9-2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o)
0x000000000000c100 __aeabi_uldivmod
.text 0x000000000000c130 0x2c4 /Users/owenlyke/gnu/arm/gcc-arm-none-eabi-9-2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o)
0x000000000000c130 __udivmoddi4
.text 0x000000000000c3f4 0x4 /Users/owenlyke/gnu/arm/gcc-arm-none-eabi-9-2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o)
0x000000000000c3f4 __aeabi_ldiv0
0x000000000000c3f4 __aeabi_idiv0
*(.text*)
.text.__NVIC_EnableIRQ
0x000000000000c3f8 0x3c ../gcc/artemis_module/bin/main.o
.text.__NVIC_DisableIRQ
0x000000000000c434 0x48 ../gcc/artemis_module/bin/main.o
.text.main 0x000000000000c47c 0x134 ../gcc/artemis_module/bin/main.o
0x000000000000c47c main
.text.setup 0x000000000000c5b0 0x40 ../gcc/artemis_module/bin/main.o
0x000000000000c5b0 setup
.text.unsetup 0x000000000000c5f0 0x2c ../gcc/artemis_module/bin/main.o
0x000000000000c5f0 unsetup
.text.detect_baud_rate
0x000000000000c61c 0x280 ../gcc/artemis_module/bin/main.o
0x000000000000c61c detect_baud_rate
.text.start_uart_bl
0x000000000000c89c 0xd4 ../gcc/artemis_module/bin/main.o
0x000000000000c89c start_uart_bl
.text.enter_bootload
0x000000000000c970 0x14c ../gcc/artemis_module/bin/main.o
0x000000000000c970 enter_bootload
.text.handle_frame_packet
0x000000000000cabc 0xec ../gcc/artemis_module/bin/main.o
0x000000000000cabc handle_frame_packet
.text.app_start
0x000000000000cba8 0x30 ../gcc/artemis_module/bin/main.o
0x000000000000cba8 app_start
.text.debug_printf
0x000000000000cbd8 0x12 ../gcc/artemis_module/bin/main.o
0x000000000000cbd8 debug_printf
*fill* 0x000000000000cbea 0x2
.text.am_uart_isr
0x000000000000cbec 0x70 ../gcc/artemis_module/bin/main.o
0x000000000000cbec am_uart_isr
.text.am_uart1_isr
0x000000000000cc5c 0xe ../gcc/artemis_module/bin/main.o
0x000000000000cc5c am_uart1_isr
*fill* 0x000000000000cc6a 0x2
.text.am_gpio_isr
0x000000000000cc6c 0x48 ../gcc/artemis_module/bin/main.o
0x000000000000cc6c am_gpio_isr
.text.am_stimer_isr
0x000000000000ccb4 0x20 ../gcc/artemis_module/bin/main.o
0x000000000000ccb4 am_stimer_isr
.text.am_util_delay_ms
0x000000000000ccd4 0x3c ../gcc/artemis_module/bin/am_util_delay.o
0x000000000000ccd4 am_util_delay_ms
.text.am_util_delay_us
0x000000000000cd10 0x3c ../gcc/artemis_module/bin/am_util_delay.o
0x000000000000cd10 am_util_delay_us
.text.Reset_Handler
0x000000000000cd4c 0x84 ../gcc/artemis_module/bin/startup_gcc.o
0x000000000000cd4c Reset_Handler
.text.NMI_Handler
0x000000000000cdd0 0x6 ../gcc/artemis_module/bin/startup_gcc.o
0x000000000000cdd0 NMI_Handler
.text.HardFault_Handler
0x000000000000cdd6 0x6 ../gcc/artemis_module/bin/startup_gcc.o
0x000000000000cdd6 HardFault_Handler
0x000000000000cdd6 UsageFault_Handler
0x000000000000cdd6 MemManage_Handler
0x000000000000cdd6 BusFault_Handler
.text.am_default_isr
0x000000000000cddc 0x6 ../gcc/artemis_module/bin/startup_gcc.o
0x000000000000cddc am_default_isr
0x000000000000cddc am_iomaster4_isr
0x000000000000cddc SysTick_Handler
0x000000000000cddc PendSV_Handler
0x000000000000cddc am_rtc_isr
0x000000000000cddc am_stimer_cmpr3_isr
0x000000000000cddc am_adc_isr
0x000000000000cddc am_iomaster3_isr
0x000000000000cddc am_clkgen_isr
0x000000000000cddc am_software0_isr
0x000000000000cddc am_stimer_cmpr5_isr
0x000000000000cddc am_iomaster5_isr
0x000000000000cddc am_pdm0_isr
0x000000000000cddc am_ctimer_isr
0x000000000000cddc am_ioslave_acc_isr
0x000000000000cddc am_mspi0_isr
0x000000000000cddc am_stimer_cmpr6_isr
0x000000000000cddc am_iomaster1_isr
0x000000000000cddc am_brownout_isr
0x000000000000cddc am_vcomp_isr
0x000000000000cddc am_stimer_cmpr1_isr
0x000000000000cddc am_iomaster2_isr
0x000000000000cddc SVC_Handler
0x000000000000cddc am_stimer_cmpr2_isr
0x000000000000cddc am_ioslave_ios_isr
0x000000000000cddc am_stimer_cmpr7_isr
0x000000000000cddc am_scard_isr
0x000000000000cddc am_watchdog_isr
0x000000000000cddc am_stimer_cmpr0_isr
0x000000000000cddc am_iomaster0_isr
0x000000000000cddc am_ble_isr
0x000000000000cddc am_stimer_cmpr4_isr
0x000000000000cddc DebugMon_Handler
*fill* 0x000000000000cde2 0x2
.text.svl_packet_link_read_fn
0x000000000000cde4 0x2c ../gcc/artemis_module/bin/svl_packet.o
0x000000000000cde4 svl_packet_link_read_fn
.text.svl_packet_link_write_fn
0x000000000000ce10 0x2c ../gcc/artemis_module/bin/svl_packet.o
0x000000000000ce10 svl_packet_link_write_fn
.text.svl_packet_link_avail_fn
0x000000000000ce3c 0x2c ../gcc/artemis_module/bin/svl_packet.o
0x000000000000ce3c svl_packet_link_avail_fn
.text.svl_packet_link_millis_fn
0x000000000000ce68 0x20 ../gcc/artemis_module/bin/svl_packet.o
0x000000000000ce68 svl_packet_link_millis_fn
.text.svl_packet_send
0x000000000000ce88 0x1f0 ../gcc/artemis_module/bin/svl_packet.o
0x000000000000ce88 svl_packet_send
.text.svl_packet_wait
0x000000000000d078 0x1b4 ../gcc/artemis_module/bin/svl_packet.o
0x000000000000d078 svl_packet_wait
.text.svl_packet_get_uint16_t
0x000000000000d22c 0x70 ../gcc/artemis_module/bin/svl_packet.o
0x000000000000d22c svl_packet_get_uint16_t
.text.svl_packet_wait_bytes
0x000000000000d29c 0x8c ../gcc/artemis_module/bin/svl_packet.o
0x000000000000d29c svl_packet_wait_bytes
.text.art_svl_ringbuf_init
0x000000000000d328 0x42 ../gcc/artemis_module/bin/svl_ringbuf.o
0x000000000000d328 art_svl_ringbuf_init
.text.art_svl_ringbuf_available
0x000000000000d36a 0x54 ../gcc/artemis_module/bin/svl_ringbuf.o
0x000000000000d36a art_svl_ringbuf_available
.text.art_svl_ringbuf_bytes_free
0x000000000000d3be 0x58 ../gcc/artemis_module/bin/svl_ringbuf.o
0x000000000000d3be art_svl_ringbuf_bytes_free
.text.art_svl_ringbuf_write
0x000000000000d416 0x5e ../gcc/artemis_module/bin/svl_ringbuf.o
0x000000000000d416 art_svl_ringbuf_write
.text.art_svl_ringbuf_read
0x000000000000d474 0x5e ../gcc/artemis_module/bin/svl_ringbuf.o
0x000000000000d474 art_svl_ringbuf_read
.text.svl_uart_read
0x000000000000d4d2 0x3c ../gcc/artemis_module/bin/svl_uart.o
0x000000000000d4d2 svl_uart_read
.text.svl_uart_write
0x000000000000d50e 0x3e ../gcc/artemis_module/bin/svl_uart.o
0x000000000000d50e svl_uart_write
.text.svl_uart_write_byte
0x000000000000d54c 0x22 ../gcc/artemis_module/bin/svl_uart.o
0x000000000000d54c svl_uart_write_byte
*fill* 0x000000000000d56e 0x2
.text._fill_ticks
0x000000000000d570 0x58 ../gcc/artemis_module/bin/svl_utils.o
0x000000000000d570 _fill_ticks
.text.millis 0x000000000000d5c8 0x28 ../gcc/artemis_module/bin/svl_utils.o
0x000000000000d5c8 millis
.text.enable_burst_mode
0x000000000000d5f0 0x34 ../gcc/artemis_module/bin/svl_utils.o
0x000000000000d5f0 enable_burst_mode
.text.disable_burst_mode
0x000000000000d624 0x2c ../gcc/artemis_module/bin/svl_utils.o
0x000000000000d624 disable_burst_mode
.text.ap3_gpio_enable_interrupts
0x000000000000d650 0xc8 ../gcc/artemis_module/bin/svl_utils.o
0x000000000000d650 ap3_gpio_enable_interrupts
.text.memset 0x000000000000d718 0xa0 /Users/owenlyke/gnu/arm/gcc-arm-none-eabi-9-2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(lib_a-memset.o)
0x000000000000d718 memset
.text.am_hal_burst_mode_initialize
0x000000000000d7b8 0x84 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_burst.o)
0x000000000000d7b8 am_hal_burst_mode_initialize
.text.am_hal_burst_mode_enable
0x000000000000d83c 0x60 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_burst.o)
0x000000000000d83c am_hal_burst_mode_enable
.text.am_hal_burst_mode_disable
0x000000000000d89c 0x58 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_burst.o)
0x000000000000d89c am_hal_burst_mode_disable
.text.am_hal_cachectrl_config
0x000000000000d8f4 0x48 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_cachectrl.o)
0x000000000000d8f4 am_hal_cachectrl_config
.text.am_hal_cachectrl_enable
0x000000000000d93c 0x14 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_cachectrl.o)
0x000000000000d93c am_hal_cachectrl_enable
.text.am_hal_clkgen_control
0x000000000000d950 0x138 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_clkgen.o)
0x000000000000d950 am_hal_clkgen_control
.text.am_hal_clkgen_status_get
0x000000000000da88 0x3c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_clkgen.o)
0x000000000000da88 am_hal_clkgen_status_get
.text.am_hal_flash_page_erase
0x000000000000dac4 0x8 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_flash.o)
0x000000000000dac4 am_hal_flash_page_erase
.text.am_hal_flash_program_main
0x000000000000dacc 0x5c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_flash.o)
0x000000000000dacc am_hal_flash_program_main
.text.am_hal_flash_delay
0x000000000000db28 0x20 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_flash.o)
0x000000000000db28 am_hal_flash_delay
.text.am_hal_flash_delay_status_check
0x000000000000db48 0x74 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_flash.o)
0x000000000000db48 am_hal_flash_delay_status_check
.text.am_hal_flash_store_ui32
0x000000000000dbbc 0xc ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_flash.o)
0x000000000000dbbc am_hal_flash_store_ui32
.text.am_hal_gpio_pinconfig
0x000000000000dbc8 0x280 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
0x000000000000dbc8 am_hal_gpio_pinconfig
.text.am_hal_gpio_interrupt_enable
0x000000000000de48 0x48 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
0x000000000000de48 am_hal_gpio_interrupt_enable
.text.am_hal_gpio_interrupt_disable
0x000000000000de90 0x4c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
0x000000000000de90 am_hal_gpio_interrupt_disable
.text.am_hal_gpio_interrupt_clear
0x000000000000dedc 0x3c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
0x000000000000dedc am_hal_gpio_interrupt_clear
.text.am_hal_interrupt_master_enable
0x000000000000df18 0x8 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_interrupt.o)
0x000000000000df18 am_hal_interrupt_master_enable
.text.am_hal_interrupt_master_disable
0x000000000000df20 0x8 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_interrupt.o)
0x000000000000df20 am_hal_interrupt_master_disable
.text.am_hal_interrupt_master_set
0x000000000000df28 0x8 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_interrupt.o)
0x000000000000df28 am_hal_interrupt_master_set
.text.am_hal_pwrctrl_periph_enable
0x000000000000df30 0x54 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
0x000000000000df30 am_hal_pwrctrl_periph_enable
.text.am_hal_pwrctrl_periph_disable
0x000000000000df84 0x58 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
0x000000000000df84 am_hal_pwrctrl_periph_disable
.text.am_hal_pwrctrl_blebuck_trim
0x000000000000dfdc 0x50 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
0x000000000000dfdc am_hal_pwrctrl_blebuck_trim
.text.am_hal_reset_control
0x000000000000e02c 0x40 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
0x000000000000e02c am_hal_reset_control
.text.am_hal_stimer_config
0x000000000000e06c 0x14 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
0x000000000000e06c am_hal_stimer_config
.text.am_hal_stimer_counter_get
0x000000000000e080 0xc ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
0x000000000000e080 am_hal_stimer_counter_get
.text.am_hal_stimer_int_enable
0x000000000000e08c 0x14 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
0x000000000000e08c am_hal_stimer_int_enable
.text.am_hal_stimer_int_disable
0x000000000000e0a0 0x14 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
0x000000000000e0a0 am_hal_stimer_int_disable
.text.am_hal_stimer_int_clear
0x000000000000e0b4 0xc ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_stimer.o)
0x000000000000e0b4 am_hal_stimer_int_clear
.text.am_hal_sysctrl_sleep
0x000000000000e0c0 0x70 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_sysctrl.o)
0x000000000000e0c0 am_hal_sysctrl_sleep
.text.am_hal_uart_initialize
0x000000000000e130 0x50 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
0x000000000000e130 am_hal_uart_initialize
.text.am_hal_uart_power_control
0x000000000000e180 0xf0 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
0x000000000000e180 am_hal_uart_power_control
.text.am_hal_uart_configure
0x000000000000e270 0x1fc ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
0x000000000000e270 am_hal_uart_configure
.text.am_hal_uart_transfer
0x000000000000e46c 0x414 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
0x000000000000e46c am_hal_uart_transfer
.text.am_hal_uart_interrupt_service
0x000000000000e880 0x12c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
0x000000000000e880 am_hal_uart_interrupt_service
.text.am_hal_uart_interrupt_enable
0x000000000000e9ac 0x28 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
0x000000000000e9ac am_hal_uart_interrupt_enable
.text.am_hal_uart_interrupt_clear
0x000000000000e9d4 0x24 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
0x000000000000e9d4 am_hal_uart_interrupt_clear
.text.am_hal_uart_interrupt_status_get
0x000000000000e9f8 0x38 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
0x000000000000e9f8 am_hal_uart_interrupt_status_get
.text.am_hal_queue_init
0x000000000000ea30 0x18 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_queue.o)
0x000000000000ea30 am_hal_queue_init
.text.am_hal_queue_item_add
0x000000000000ea48 0x7c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_queue.o)
0x000000000000ea48 am_hal_queue_item_add
.text.am_hal_queue_item_get
0x000000000000eac4 0x7c ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_queue.o)
0x000000000000eac4 am_hal_queue_item_get
0x000000000000eb40 __init_array_start = .
*(.init_array*)
0x000000000000eb40 __init_array_end = .
0x000000000000eb40 . = ALIGN (0x4)
*(.rodata)
.rodata 0x000000000000eb40 0x301 ../gcc/artemis_module/bin/main.o
*(.rodata*)
*fill* 0x000000000000ee41 0x3
.rodata.am_hal_cachectrl_defaults
0x000000000000ee44 0x3 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_cachectrl.o)
0x000000000000ee44 am_hal_cachectrl_defaults
*fill* 0x000000000000ee47 0x1
.rodata.g_AM_HAL_GPIO_DISABLE
0x000000000000ee48 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
0x000000000000ee48 g_AM_HAL_GPIO_DISABLE
.rodata.g_AM_HAL_GPIO_INPUT_PULLUP
0x000000000000ee4c 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
0x000000000000ee4c g_AM_HAL_GPIO_INPUT_PULLUP
.rodata.g_ui8Bit76Capabilities
0x000000000000ee50 0x32 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
*fill* 0x000000000000ee82 0x2
.rodata.g_ui8Inpen
0x000000000000ee84 0x32 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
*fill* 0x000000000000eeb6 0x2
.rodata.g_ui8NCEtable
0x000000000000eeb8 0xc8 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
.rodata.g_ui8nCEpins
0x000000000000ef80 0x32 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_gpio.o)
*fill* 0x000000000000efb2 0x2
.rodata.am_hal_pwrctrl_peripheral_control
0x000000000000efb4 0xb4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_pwrctrl.o)
0x000000000000efb4 am_hal_pwrctrl_peripheral_control
.rodata.CSWTCH.20
0x000000000000f068 0x10 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
0x000000000000f078 . = ALIGN (0x4)
0x000000000000f078 _etext = .
.glue_7 0x000000000000f078 0x0
.glue_7 0x000000000000f078 0x0 linker stubs
.glue_7t 0x000000000000f078 0x0
.glue_7t 0x000000000000f078 0x0 linker stubs
.vfp11_veneer 0x000000000000f078 0x0
.vfp11_veneer 0x000000000000f078 0x0 linker stubs
.v4_bx 0x000000000000f078 0x0
.v4_bx 0x000000000000f078 0x0 linker stubs
.iplt 0x000000000000f078 0x0
.iplt 0x000000000000f078 0x0 ../gcc/artemis_module/bin/main.o
.rel.dyn 0x000000000000f078 0x0
.rel.iplt 0x000000000000f078 0x0 ../gcc/artemis_module/bin/main.o
.ARM.exidx 0x000000000000f078 0x8
.ARM.exidx 0x000000000000f078 0x8 /Users/owenlyke/gnu/arm/gcc-arm-none-eabi-9-2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o)
.data 0x0000000010000000 0x20c load address 0x000000000000f080
0x0000000010000000 . = ALIGN (0x4)
0x0000000010000000 _sdata = .
*(.data)
*(.data*)
.data.CRC_Table
0x0000000010000000 0x200 ../gcc/artemis_module/bin/svl_packet.o
0x0000000010000000 CRC_Table
.data.SRAM_write_ui32
0x0000000010000200 0xc ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_flash.o)
0x0000000010000200 SRAM_write_ui32
0x000000001000020c . = ALIGN (0x4)
0x000000001000020c _edata = .
0x000000000000f080 _init_data = LOADADDR (.data)
.igot.plt 0x000000001000020c 0x0 load address 0x000000000000f28c
.igot.plt 0x000000001000020c 0x0 ../gcc/artemis_module/bin/main.o
.bss 0x0000000010000210 0x930 load address 0x000000000000f28c
0x0000000010000210 . = ALIGN (0x4)
0x0000000010000210 _sbss = .
*(.bss)
*(.bss*)
.bss.bl_rx_ringbuf
0x0000000010000210 0x10 ../gcc/artemis_module/bin/main.o
0x0000000010000210 bl_rx_ringbuf
.bss.hUART_bl 0x0000000010000220 0x4 ../gcc/artemis_module/bin/main.o
0x0000000010000220 hUART_bl
.bss.bl_baud_ticks_index
0x0000000010000224 0x1 ../gcc/artemis_module/bin/main.o
0x0000000010000224 bl_baud_ticks_index
*fill* 0x0000000010000225 0x3
.bss.bl_baud_ticks
0x0000000010000228 0x14 ../gcc/artemis_module/bin/main.o
0x0000000010000228 bl_baud_ticks
.bss.frame_buffer.22414
0x000000001000023c 0x800 ../gcc/artemis_module/bin/main.o
.bss.read_param
0x0000000010000a3c 0x4 ../gcc/artemis_module/bin/svl_packet.o
0x0000000010000a3c read_param
.bss.write_param
0x0000000010000a40 0x4 ../gcc/artemis_module/bin/svl_packet.o
0x0000000010000a40 write_param
.bss.avail_param
0x0000000010000a44 0x4 ../gcc/artemis_module/bin/svl_packet.o
0x0000000010000a44 avail_param
.bss.read_fn 0x0000000010000a48 0x4 ../gcc/artemis_module/bin/svl_packet.o
0x0000000010000a48 read_fn
.bss.write_fn 0x0000000010000a4c 0x4 ../gcc/artemis_module/bin/svl_packet.o
0x0000000010000a4c write_fn
.bss.avail_fn 0x0000000010000a50 0x4 ../gcc/artemis_module/bin/svl_packet.o
0x0000000010000a50 avail_fn
.bss.millis_fn
0x0000000010000a54 0x4 ../gcc/artemis_module/bin/svl_packet.o
0x0000000010000a54 millis_fn
.bss.ap3_stimer_overflows
0x0000000010000a58 0x4 ../gcc/artemis_module/bin/svl_utils.o
0x0000000010000a58 ap3_stimer_overflows
*fill* 0x0000000010000a5c 0x4
.bss.ticks 0x0000000010000a60 0x8 ../gcc/artemis_module/bin/svl_utils.o
0x0000000010000a60 ticks
.bss.g_am_hal_burst_mode_available
0x0000000010000a68 0x1 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_burst.o)
0x0000000010000a68 g_am_hal_burst_mode_available
*fill* 0x0000000010000a69 0x3
.bss.gAmHalResetStatus
0x0000000010000a6c 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_reset.o)
0x0000000010000a6c gAmHalResetStatus
.bss.g_ui32BusWriteFlush
0x0000000010000a70 0x4 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_sysctrl.o)
*(COMMON)
COMMON 0x0000000010000a74 0x2 ../gcc/artemis_module/bin/svl_packet.o
0x0000000010000a74 CRCL
0x0000000010000a75 CRCH
*fill* 0x0000000010000a76 0x2
COMMON 0x0000000010000a78 0xc8 ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a(am_hal_uart.o)
0x0000000010000a78 g_am_hal_uart_states
0x0000000010000b40 . = ALIGN (0x4)
0x0000000010000b40 _ebss = .
.heap 0x0000000010000b40 0x0 load address 0x000000000000f28c
0x0000000010000b40 . = ALIGN (0x4)
0x0000000010000b40 __end__ = .
[!provide] PROVIDE (end = .)
0x0000000010000b40 _sheap = .
.dmz 0x0000000010000b40 0x5f4b8
0x000000001005fff8 . = ((ORIGIN (sram) + LENGTH (sram)) - 0x8)
*fill* 0x0000000010000b40 0x5f4b8
0x000000001005fff8 . = ALIGN (0x8)
.stack 0x000000001005fff8 0x0
0x000000001005fff8 . = ALIGN (0x8)
0x000000001005fff8 _sstack = .
LOAD ../gcc/artemis_module/bin/main.o
LOAD ../gcc/artemis_module/bin/am_util_delay.o
LOAD ../gcc/artemis_module/bin/am_util_stdio.o
LOAD ../gcc/artemis_module/bin/startup_gcc.o
LOAD ../gcc/artemis_module/bin/svl_packet.o
LOAD ../gcc/artemis_module/bin/svl_ringbuf.o
LOAD ../gcc/artemis_module/bin/svl_uart.o
LOAD ../gcc/artemis_module/bin/svl_utils.o
START GROUP
LOAD /Users/owenlyke/gnu/arm/gcc-arm-none-eabi-9-2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a
LOAD /Users/owenlyke/gnu/arm/gcc-arm-none-eabi-9-2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a
LOAD /Users/owenlyke/gnu/arm/gcc-arm-none-eabi-9-2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/thumb/v7e-m+fp/hard/libgcc.a
LOAD ../../../../artemis_dev_platform/AmbiqSuiteSDK/boards_sfe/artemis_module/bsp/gcc/bin/libam_bsp.a
LOAD ../../../../artemis_dev_platform/AmbiqSuiteSDK/mcu/apollo3/hal/gcc/bin/libam_hal.a
END GROUP
START GROUP
LOAD /Users/owenlyke/gnu/arm/gcc-arm-none-eabi-9-2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/thumb/v7e-m+fp/hard/libgcc.a
LOAD /Users/owenlyke/gnu/arm/gcc-arm-none-eabi-9-2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a
END GROUP
OUTPUT(../gcc/artemis_module/bin/svl.axf elf32-littlearm)
.debug_info 0x0000000000000000 0xe4bc
.debug_info 0x0000000000000000 0x6314 ../gcc/artemis_module/bin/main.o
.debug_info 0x0000000000006314 0x8ce ../gcc/artemis_module/bin/am_util_delay.o
.debug_info 0x0000000000006be2 0x1c1 ../gcc/artemis_module/bin/startup_gcc.o
.debug_info 0x0000000000006da3 0x1073 ../gcc/artemis_module/bin/svl_packet.o
.debug_info 0x0000000000007e16 0xafb ../gcc/artemis_module/bin/svl_ringbuf.o
.debug_info 0x0000000000008911 0xccd ../gcc/artemis_module/bin/svl_uart.o
.debug_info 0x00000000000095de 0x4ede ../gcc/artemis_module/bin/svl_utils.o
.debug_abbrev 0x0000000000000000 0x10c3
.debug_abbrev 0x0000000000000000 0x415 ../gcc/artemis_module/bin/main.o
.debug_abbrev 0x0000000000000415 0x1d8 ../gcc/artemis_module/bin/am_util_delay.o
.debug_abbrev 0x00000000000005ed 0xfe ../gcc/artemis_module/bin/startup_gcc.o
.debug_abbrev 0x00000000000006eb 0x2fd ../gcc/artemis_module/bin/svl_packet.o
.debug_abbrev 0x00000000000009e8 0x234 ../gcc/artemis_module/bin/svl_ringbuf.o
.debug_abbrev 0x0000000000000c1c 0x1f4 ../gcc/artemis_module/bin/svl_uart.o
.debug_abbrev 0x0000000000000e10 0x2b3 ../gcc/artemis_module/bin/svl_utils.o
.debug_aranges 0x0000000000000000 0x208
.debug_aranges
0x0000000000000000 0x90 ../gcc/artemis_module/bin/main.o
.debug_aranges
0x0000000000000090 0x30 ../gcc/artemis_module/bin/am_util_delay.o
.debug_aranges
0x00000000000000c0 0x38 ../gcc/artemis_module/bin/startup_gcc.o
.debug_aranges
0x00000000000000f8 0x58 ../gcc/artemis_module/bin/svl_packet.o
.debug_aranges
0x0000000000000150 0x40 ../gcc/artemis_module/bin/svl_ringbuf.o
.debug_aranges
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