220 lines
6.3 KiB
C
220 lines
6.3 KiB
C
//*****************************************************************************
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//
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// am_hal_mcuctrl.h
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//! @file
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//!
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//! @brief Functions for accessing and configuring the MCUCTRL.
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//!
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//! @addtogroup mcuctrl1 MCU Control (MCUCTRL)
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//! @ingroup apollo1hal
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2020, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// Third party software included in this distribution is subject to the
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// additional license terms as defined in the /docs/licenses directory.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#ifndef AM_HAL_MCUCTRL_H
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#define AM_HAL_MCUCTRL_H
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//*****************************************************************************
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//
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// Apollo Number Decode.
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//
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//*****************************************************************************
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extern const uint32_t am_hal_mcuctrl_flash_size[];
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extern const uint32_t am_hal_mcuctrl_sram_size[];
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//*****************************************************************************
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//
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// FLASH Bank Power defines.
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//
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//*****************************************************************************
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#define AM_HAL_MCUCTRL_FLASH_POWER_DOWN_NONE 0x0
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#define AM_HAL_MCUCTRL_FLASH_POWER_DOWN_0 0x1
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#define AM_HAL_MCUCTRL_FLASH_POWER_DOWN_1 0x2
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#define AM_HAL_MCUCTRL_FLASH_POWER_DOWN_ALL 0x3
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//*****************************************************************************
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//
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// SRAM Bank Power defines.
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//
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//*****************************************************************************
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#define AM_HAL_MCUCTRL_SRAM_POWER_DOWN_NONE 0x0
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#define AM_HAL_MCUCTRL_SRAM_POWER_DOWN_0 0x1
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#define AM_HAL_MCUCTRL_SRAM_POWER_DOWN_1 0x2
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#define AM_HAL_MCUCTRL_SRAM_POWER_DOWN_2 0x4
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#define AM_HAL_MCUCTRL_SRAM_POWER_DOWN_3 0x8
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#define AM_HAL_MCUCTRL_SRAM_POWER_DOWN_4 0x10
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#define AM_HAL_MCUCTRL_SRAM_POWER_DOWN_5 0x20
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#define AM_HAL_MCUCTRL_SRAM_POWER_DOWN_6 0x40
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#define AM_HAL_MCUCTRL_SRAM_POWER_DOWN_7 0x80
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#define AM_HAL_MCUCTRL_SRAM_POWER_DOWN_ALL 0xFF
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//*****************************************************************************
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//
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//! MCUCTRL device structure
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//
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//*****************************************************************************
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typedef struct
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{
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//
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//! Device part number. (BCD format)
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//
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uint32_t ui32ChipPN;
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//
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//! Unique Chip ID 0.
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//
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uint32_t ui32ChipID0;
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//
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//! Unique Chip ID 1.
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//
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uint32_t ui32ChipID1;
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//
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//! Chip Revision.
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//
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uint32_t ui32ChipRev;
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//
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//! Vendor ID.
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//
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uint32_t ui32VendorID;
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//
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//! Qualified chip.
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//
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uint32_t ui32Qualified;
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//
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//! Flash Size.
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//
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uint32_t ui32FlashSize;
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//
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//! SRAM Size.
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//
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uint32_t ui32SRAMSize;
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//
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// JEDEC chip info
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//
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uint32_t ui32JedecPN;
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uint32_t ui32JedecJEPID;
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uint32_t ui32JedecCHIPREV;
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uint32_t ui32JedecCID;
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}
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am_hal_mcuctrl_device_t;
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//*****************************************************************************
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//
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//! MCUCTRL fault structure
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//
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//*****************************************************************************
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typedef struct
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{
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//
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//! ICODE bus fault occurred.
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//
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bool bICODE;
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//
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//! ICODE bus fault address.
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//
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uint32_t ui32ICODE;
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//
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//! DCODE bus fault occurred.
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//
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bool bDCODE;
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//
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//! DCODE bus fault address.
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//
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uint32_t ui32DCODE;
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//
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//! SYS bus fault occurred.
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//
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bool bSYS;
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//
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//! SYS bus fault address.
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//
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uint32_t ui32SYS;
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}
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am_hal_mcuctrl_fault_t;
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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// External function definitions
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//
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//*****************************************************************************
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extern void am_hal_mcuctrl_device_info_get(am_hal_mcuctrl_device_t *psDevice);
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extern void am_hal_mcuctrl_fault_capture_enable(void);
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extern void am_hal_mcuctrl_fault_capture_disable(void);
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extern void am_hal_mcuctrl_fault_status(am_hal_mcuctrl_fault_t *psFault);
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extern void am_hal_mcuctrl_flash_power_set(uint32_t ui32FlashPower);
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extern void am_hal_mcuctrl_sram_power_set(uint32_t ui32SRAMPower,
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uint32_t ui32SRAMPowerDeepSleep);
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extern void am_hal_mcuctrl_bandgap_enable(void);
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extern void am_hal_mcuctrl_bandgap_disable(void);
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extern void am_hal_mcuctrl_bucks_enable(void);
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extern void am_hal_mcuctrl_bucks_disable(void);
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#ifdef __cplusplus
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}
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#endif
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#endif // AM_HAL_MCUCTRL_H
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//*****************************************************************************
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//
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// End Doxygen group.
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//! @}
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//
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//*****************************************************************************
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