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2022-10-23 23:45:43 -07:00
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards_sfe/artemis_module/bsp/am_bsp.c
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards_sfe/artemis_module/bsp/am_bsp.h
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//*****************************************************************************
//
// am_bsp.h
//! @file
//!
//! @brief Functions to aid with configuring the GPIOs.
//!
//! @addtogroup BSP Board Support Package (BSP)
//! @addtogroup apollo3_fpga_bsp BSP for the Apollo3 Hotshot FPGA
//! @ingroup BSP
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2019, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision v2.0.0 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_BSP_H
#define AM_BSP_H
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
#include "am_bsp_pins.h"
//
// Make individual includes to not require full port before usage.
//#include "am_devices.h"
//
#include "am_devices_led.h"
#include "am_devices_button.h"
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Begin User Modifiable Area
//
//*****************************************************************************
//*****************************************************************************
//
// LED definitions.
//
//*****************************************************************************
#undef AM_BSP_NUM_LEDS
#ifdef AM_BSP_NUM_LEDS
extern am_devices_led_t am_bsp_psLEDs[AM_BSP_NUM_LEDS];
#endif // AM_BSP_NUM_LEDS
//*****************************************************************************
//
// UART definitions.
//
//*****************************************************************************
//
// Apollo3 has two UART instances.
// AM_BSP_UART_PRINT_INST should correspond to COM_UART.
//
#define AM_BSP_UART_IOS_INST 0
#define AM_BSP_UART_PRINT_INST 0
#define AM_BSP_UART_BOOTLOADER_INST 0
//*****************************************************************************
//
// End User Modifiable Area
//
//*****************************************************************************
//*****************************************************************************
//
// Print interface type
//
//*****************************************************************************
#define AM_BSP_PRINT_INFC_NONE 0
#define AM_BSP_PRINT_INFC_SWO 1
#define AM_BSP_PRINT_INFC_UART0 2
#define AM_BSP_PRINT_INFC_BUFFERED_UART0 3
//*****************************************************************************
//
//! Structure containing UART configuration information while it is powered down.
//
//*****************************************************************************
typedef struct
{
bool bSaved;
uint32_t ui32TxPinNum;
uint32_t ui32TxPinCfg;
}
am_bsp_uart_pwrsave_t;
//*****************************************************************************
//
// External data definitions.
//
//*****************************************************************************
extern am_bsp_uart_pwrsave_t am_bsp_uart_pwrsave[AM_REG_UART_NUM_MODULES];
//*****************************************************************************
//
// External function definitions.
//
//*****************************************************************************
extern void am_bsp_low_power_init(void);
extern void am_bsp_iom_pins_enable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
extern void am_bsp_iom_pins_disable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
extern void am_bsp_mspi_pins_enable(am_hal_mspi_device_e eMSPIDevice);
extern void am_bsp_mspi_pins_disable(am_hal_mspi_device_e eMSPIDevice);
extern void am_bsp_ios_pins_enable(uint32_t ui32Module, uint32_t ui32IOSMode); // SparkFun Edge does not expose IO Slave Clock signal, so hiding these functions
extern void am_bsp_ios_pins_disable(uint32_t ui32Module, uint32_t ui32IOSMode);
extern void am_bsp_debug_printf_enable(void);
extern void am_bsp_debug_printf_disable(void);
#ifdef AM_BSP_GPIO_ITM_SWO
extern void am_bsp_itm_printf_enable(void);
#else
extern void am_bsp_itm_printf_enable(uint32_t ui32Pin, am_hal_gpio_pincfg_t sPincfg);
#endif
extern void am_bsp_itm_string_print(char *pcString);
extern void am_bsp_itm_printf_disable(void);
extern void am_bsp_uart_string_print(char *pcString);
extern void am_bsp_uart_printf_enable(void);
extern void am_bsp_uart_printf_enable_custom(const am_hal_uart_config_t* p_config);
extern void am_bsp_uart_printf_disable(void);
extern void am_bsp_buffered_uart_printf_enable(void);
extern void am_bsp_buffered_uart_service(void);
extern uint32_t am_bsp_com_uart_transfer(const am_hal_uart_transfer_t *psTransfer);
#ifdef __cplusplus
}
#endif
#endif // AM_BSP_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
ambiq-hal-sys/ambiq-sparkfun-sdk/boards_sfe/artemis_module/bsp/am_bsp_pins.c
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//*****************************************************************************
//
// am_bsp_pins.c
//! @file
//!
//! @brief BSP pin configuration definitions.
//!
//! @addtogroup BSP Board Support Package (BSP)
//! @addtogroup apollo3_evb_bsp BSP for the Apollo3 Engineering Board
//! @ingroup BSP
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2019, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include "am_bsp.h"
//*****************************************************************************
//
// COM_UART_TX pin: This pin is the COM_UART transmit pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX =
{
.uFuncSel = AM_HAL_PIN_48_UART0TX,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
};
//*****************************************************************************
//
// COM_UART_RX pin: This pin is the COM_UART receive pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX =
{
.uFuncSel = AM_HAL_PIN_49_UART0RX
};
//*****************************************************************************
//
// IOM0_CS pin: I/O Master 0 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS =
{
.uFuncSel = AM_HAL_PIN_11_NCE11,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 0,
.uNCE = 0,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM0_CS3 pin: I/O Master 0 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3 =
{
.uFuncSel = AM_HAL_PIN_15_NCE15,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 0,
.uNCE = 3,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM0_MISO pin: I/O Master 0 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO =
{
.uFuncSel = AM_HAL_PIN_6_M0MISO,
.uIOMnum = 0
};
//*****************************************************************************
//
// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI =
{
.uFuncSel = AM_HAL_PIN_7_M0MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 0
};
//*****************************************************************************
//
// IOM0_SCK pin: I/O Master 0 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK =
{
.uFuncSel = AM_HAL_PIN_5_M0SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 0
};
//*****************************************************************************
//
// IOM0_SCL pin: I/O Master 0 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL =
{
.uFuncSel = AM_HAL_PIN_5_M0SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 0
};
//*****************************************************************************
//
// IOM0_SDA pin: I/O Master 0 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA =
{
.uFuncSel = AM_HAL_PIN_6_M0SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 0
};
//*****************************************************************************
//
// IOM1_CS pin: I/O Master 1 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS =
{
.uFuncSel = AM_HAL_PIN_14_NCE14,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 1,
.uNCE = 2,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM1_MISO pin: I/O Master 1 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO =
{
.uFuncSel = AM_HAL_PIN_9_M1MISO,
.uIOMnum = 1
};
//*****************************************************************************
//
// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI =
{
.uFuncSel = AM_HAL_PIN_10_M1MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 1
};
//*****************************************************************************
//
// IOM1_SCK pin: I/O Master 1 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK =
{
.uFuncSel = AM_HAL_PIN_8_M1SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 1
};
//*****************************************************************************
//
// IOM1_SCL pin: I/O Master 1 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL =
{
.uFuncSel = AM_HAL_PIN_8_M1SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 1
};
//*****************************************************************************
//
// IOM1_SDA pin: I/O Master 1 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA =
{
.uFuncSel = AM_HAL_PIN_9_M1SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 1
};
//*****************************************************************************
//
// IOM2_CS pin: I/O Master 2 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS =
{
.uFuncSel = AM_HAL_PIN_15_NCE15,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 2,
.uNCE = 3,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM2_MISO pin: I/O Master 2 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO =
{
.uFuncSel = AM_HAL_PIN_25_M2MISO,
.uIOMnum = 2
};
//*****************************************************************************
//
// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI =
{
.uFuncSel = AM_HAL_PIN_28_M2MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 2
};
//*****************************************************************************
//
// IOM2_SCK pin: I/O Master 2 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK =
{
.uFuncSel = AM_HAL_PIN_27_M2SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 2
};
//*****************************************************************************
//
// IOM2_SCL pin: I/O Master 2 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL =
{
.uFuncSel = AM_HAL_PIN_27_M2SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 2
};
//*****************************************************************************
//
// IOM2_SDA pin: I/O Master 2 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA =
{
.uFuncSel = AM_HAL_PIN_25_M2SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 2
};
//*****************************************************************************
//
// IOM3_CS pin: I/O Master 3 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS =
{
.uFuncSel = AM_HAL_PIN_12_NCE12,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 3,
.uNCE = 0,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM3_MISO pin: I/O Master 3 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO =
{
.uFuncSel = AM_HAL_PIN_43_M3MISO,
.uIOMnum = 3
};
//*****************************************************************************
//
// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI =
{
.uFuncSel = AM_HAL_PIN_38_M3MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 3
};
//*****************************************************************************
//
// IOM3_SCK pin: I/O Master 3 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK =
{
.uFuncSel = AM_HAL_PIN_42_M3SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 3
};
//*****************************************************************************
//
// IOM3_SCL pin: I/O Master 3 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL =
{
.uFuncSel = AM_HAL_PIN_42_M3SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 3
};
//*****************************************************************************
//
// IOM3_SDA pin: I/O Master 3 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA =
{
.uFuncSel = AM_HAL_PIN_43_M3SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 3
};
//*****************************************************************************
//
// IOM4_CS pin: I/O Master 4 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS =
{
.uFuncSel = AM_HAL_PIN_13_NCE13,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 4,
.uNCE = 1,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM4_MISO pin: I/O Master 4 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO =
{
.uFuncSel = AM_HAL_PIN_40_M4MISO,
.uIOMnum = 4
};
//*****************************************************************************
//
// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI =
{
.uFuncSel = AM_HAL_PIN_44_M4MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 4
};
//*****************************************************************************
//
// IOM4_SCK pin: I/O Master 4 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK =
{
.uFuncSel = AM_HAL_PIN_39_M4SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 4
};
//*****************************************************************************
//
// IOM4_SCL pin: I/O Master 4 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL =
{
.uFuncSel = AM_HAL_PIN_39_M4SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 4
};
//*****************************************************************************
//
// IOM4_SDA pin: I/O Master 4 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA =
{
.uFuncSel = AM_HAL_PIN_40_M4SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 4
};
//*****************************************************************************
//
// IOM5_CS pin: I/O Master 5 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS =
{
.uFuncSel = AM_HAL_PIN_16_NCE16,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 5,
.uNCE = 0,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM5_MISO pin: I/O Master 5 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO =
{
.uFuncSel = AM_HAL_PIN_49_M5MISO,
.uIOMnum = 5
};
//*****************************************************************************
//
// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI =
{
.uFuncSel = AM_HAL_PIN_47_M5MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 5
};
//*****************************************************************************
//
// IOM5_SCK pin: I/O Master 5 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK =
{
.uFuncSel = AM_HAL_PIN_48_M5SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 5
};
//*****************************************************************************
//
// IOM5_SCL pin: I/O Master 5 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL =
{
.uFuncSel = AM_HAL_PIN_48_M5SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 5
};
//*****************************************************************************
//
// IOM5_SDA pin: I/O Master 5 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA =
{
.uFuncSel = AM_HAL_PIN_49_M5SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 5
};
//*****************************************************************************
//
// MSPI_CE0 pin: MSPI chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0 =
{
.uFuncSel = AM_HAL_PIN_19_NCE19,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6,
.uNCE = 0,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// MSPI_CE1 pin: MSPI chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1 =
{
.uFuncSel = AM_HAL_PIN_41_NCE41,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6,
.uNCE = 1,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// MSPI_D0 pin: MSPI data 0.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0 =
{
.uFuncSel = AM_HAL_PIN_22_MSPI0,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D1 pin: MSPI data 1.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1 =
{
.uFuncSel = AM_HAL_PIN_26_MSPI1,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D2 pin: MSPI data 2.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2 =
{
.uFuncSel = AM_HAL_PIN_4_MSPI2,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D3 pin: MSPI data 3.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3 =
{
.uFuncSel = AM_HAL_PIN_23_MSPI13,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D4 pin: MSPI data 4.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4 =
{
.uFuncSel = AM_HAL_PIN_0_MSPI4,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D5 pin: MSPI data 5.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5 =
{
.uFuncSel = AM_HAL_PIN_1_MSPI5,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D6 pin: MSPI data 6.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6 =
{
.uFuncSel = AM_HAL_PIN_2_MSPI6,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D7 pin: MSPI data 7.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7 =
{
.uFuncSel = AM_HAL_PIN_3_MSPI7,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_SCK pin: MSPI clock.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK =
{
.uFuncSel = AM_HAL_PIN_24_MSPI8,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// IOS_CE pin: I/O Slave chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE =
{
.uFuncSel = AM_HAL_PIN_3_SLnCE,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE,
.uNCE = 0,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOS_MISO pin: I/O Slave SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO =
{
.uFuncSel = AM_HAL_PIN_2_SLMISO,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA
};
//*****************************************************************************
//
// IOS_MOSI pin: I/O Slave SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI =
{
.uFuncSel = AM_HAL_PIN_1_SLMOSI,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
};
//*****************************************************************************
//
// IOS_SCK pin: I/O Slave SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK =
{
.uFuncSel = AM_HAL_PIN_0_SLSCK,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
};
//*****************************************************************************
//
// IOS_SCL pin: I/O Slave I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL =
{
.uFuncSel = AM_HAL_PIN_0_SLSCL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
};
//*****************************************************************************
//
// IOS_SDA pin: I/O Slave I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA =
{
.uFuncSel = AM_HAL_PIN_1_SLSDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN
};
//*****************************************************************************
//
// SWDCK pin: Cortex Serial Wire DCK.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK =
{
.uFuncSel = AM_HAL_PIN_20_SWDCK
};
//*****************************************************************************
//
// SWDIO pin: Cortex Serial Wire DIO.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO =
{
.uFuncSel = AM_HAL_PIN_21_SWDIO
};
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
ambiq-hal-sys/ambiq-sparkfun-sdk/boards_sfe/artemis_module/bsp/am_bsp_pins.h
+551
View File
@@ -0,0 +1,551 @@
//*****************************************************************************
//
// am_bsp_pins.h
//! @file
//!
//! @brief BSP pin configuration definitions.
//!
//! @addtogroup BSP Board Support Package (BSP)
//! @addtogroup apollo3_bsp BSP for the Apollo3 EVB.
//! @ingroup BSP
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2019, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_BSP_PINS_H
#define AM_BSP_PINS_H
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// COM_UART_TX pin: This pin is the COM_UART transmit pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_COM_UART_TX 48
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX;
//*****************************************************************************
//
// COM_UART_RX pin: This pin is the COM_UART receive pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_COM_UART_RX 49
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX;
//*****************************************************************************
//
// IOM0_CS pin: I/O Master 0 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_CS 11
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS;
#define AM_BSP_GPIO_IOM0_CS_CHNL 0
//*****************************************************************************
//
// IOM0_CS3 pin: I/O Master 0 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_CS3 15
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3;
#define AM_BSP_GPIO_IOM0_CS3_CHNL 3
//*****************************************************************************
//
// IOM0_MISO pin: I/O Master 0 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_MISO 6
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO;
//*****************************************************************************
//
// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_MOSI 7
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI;
//*****************************************************************************
//
// IOM0_SCK pin: I/O Master 0 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SCK 5
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK;
//*****************************************************************************
//
// IOM0_SCL pin: I/O Master 0 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SCL 5
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL;
//*****************************************************************************
//
// IOM0_SDA pin: I/O Master 0 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SDA 6
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA;
//*****************************************************************************
//
// IOM1_CS pin: I/O Master 1 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_CS 14
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS;
#define AM_BSP_GPIO_IOM1_CS_CHNL 2
//*****************************************************************************
//
// IOM1_MISO pin: I/O Master 1 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_MISO 9
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO;
//*****************************************************************************
//
// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_MOSI 10
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI;
//*****************************************************************************
//
// IOM1_SCK pin: I/O Master 1 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SCK 8
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK;
//*****************************************************************************
//
// IOM1_SCL pin: I/O Master 1 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SCL 8
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL;
//*****************************************************************************
//
// IOM1_SDA pin: I/O Master 1 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SDA 9
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA;
//*****************************************************************************
//
// IOM2_CS pin: I/O Master 2 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_CS 15
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS;
#define AM_BSP_GPIO_IOM2_CS_CHNL 3
//*****************************************************************************
//
// IOM2_MISO pin: I/O Master 2 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_MISO 25
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO;
//*****************************************************************************
//
// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_MOSI 28
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI;
//*****************************************************************************
//
// IOM2_SCK pin: I/O Master 2 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SCK 27
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK;
//*****************************************************************************
//
// IOM2_SCL pin: I/O Master 2 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SCL 27
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL;
//*****************************************************************************
//
// IOM2_SDA pin: I/O Master 2 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SDA 25
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA;
//*****************************************************************************
//
// IOM3_CS pin: I/O Master 3 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_CS 12
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS;
#define AM_BSP_GPIO_IOM3_CS_CHNL 0
//*****************************************************************************
//
// IOM3_MISO pin: I/O Master 3 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_MISO 43
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO;
//*****************************************************************************
//
// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_MOSI 38
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI;
//*****************************************************************************
//
// IOM3_SCK pin: I/O Master 3 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SCK 42
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK;
//*****************************************************************************
//
// IOM3_SCL pin: I/O Master 3 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SCL 42
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL;
//*****************************************************************************
//
// IOM3_SDA pin: I/O Master 3 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SDA 43
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA;
//*****************************************************************************
//
// IOM4_CS pin: I/O Master 4 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_CS 13
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS;
#define AM_BSP_GPIO_IOM4_CS_CHNL 1
//*****************************************************************************
//
// IOM4_MISO pin: I/O Master 4 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_MISO 40
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO;
//*****************************************************************************
//
// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_MOSI 44
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI;
//*****************************************************************************
//
// IOM4_SCK pin: I/O Master 4 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SCK 39
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK;
//*****************************************************************************
//
// IOM4_SCL pin: I/O Master 4 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SCL 39
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL;
//*****************************************************************************
//
// IOM4_SDA pin: I/O Master 4 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SDA 40
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA;
//*****************************************************************************
//
// IOM5_CS pin: I/O Master 5 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_CS 16
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS;
#define AM_BSP_GPIO_IOM5_CS_CHNL 0
//*****************************************************************************
//
// IOM5_MISO pin: I/O Master 5 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_MISO 49
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO;
//*****************************************************************************
//
// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_MOSI 47
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI;
//*****************************************************************************
//
// IOM5_SCK pin: I/O Master 5 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SCK 48
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK;
//*****************************************************************************
//
// IOM5_SCL pin: I/O Master 5 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SCL 48
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL;
//*****************************************************************************
//
// IOM5_SDA pin: I/O Master 5 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SDA 49
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA;
//*****************************************************************************
//
// MSPI_CE0 pin: MSPI chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_CE0 19
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0;
#define AM_BSP_GPIO_MSPI_CE0_CHNL 0
//*****************************************************************************
//
// MSPI_CE1 pin: MSPI chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_CE1 41
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1;
#define AM_BSP_GPIO_MSPI_CE1_CHNL 1
//*****************************************************************************
//
// MSPI_D0 pin: MSPI data 0.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D0 22
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0;
//*****************************************************************************
//
// MSPI_D1 pin: MSPI data 1.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D1 26
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1;
//*****************************************************************************
//
// MSPI_D2 pin: MSPI data 2.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D2 4
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2;
//*****************************************************************************
//
// MSPI_D3 pin: MSPI data 3.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D3 23
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3;
//*****************************************************************************
//
// MSPI_D4 pin: MSPI data 4.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D4 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4;
//*****************************************************************************
//
// MSPI_D5 pin: MSPI data 5.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D5 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5;
//*****************************************************************************
//
// MSPI_D6 pin: MSPI data 6.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D6 2
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6;
//*****************************************************************************
//
// MSPI_D7 pin: MSPI data 7.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D7 3
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7;
//*****************************************************************************
//
// MSPI_SCK pin: MSPI clock.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_SCK 24
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK;
//*****************************************************************************
//
// IOS_CE pin: I/O Slave chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_CE 3
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE;
#define AM_BSP_GPIO_IOS_CE_CHNL 0
//*****************************************************************************
//
// IOS_MISO pin: I/O Slave SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_MISO 2
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO;
//*****************************************************************************
//
// IOS_MOSI pin: I/O Slave SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_MOSI 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI;
//*****************************************************************************
//
// IOS_SCK pin: I/O Slave SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SCK 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK;
//*****************************************************************************
//
// IOS_SCL pin: I/O Slave I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SCL 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL;
//*****************************************************************************
//
// IOS_SDA pin: I/O Slave I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SDA 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA;
//*****************************************************************************
//
// SWDCK pin: Cortex Serial Wire DCK.
//
//*****************************************************************************
#define AM_BSP_GPIO_SWDCK 20
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK;
//*****************************************************************************
//
// SWDIO pin: Cortex Serial Wire DIO.
//
//*****************************************************************************
#define AM_BSP_GPIO_SWDIO 21
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO;
#ifdef __cplusplus
}
#endif
#endif // AM_BSP_PINS_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
ambiq-hal-sys/ambiq-sparkfun-sdk/boards_sfe/artemis_module/bsp/bsp_pins.src
+635
View File
@@ -0,0 +1,635 @@
# ******************************************************************************
# *
# Copyright (c) 2018 Ambiq Micro. *
# *
#*******************************************************************************
# *
# File: bsp_pins.src *
# *
# Title: SparkFun Edge2 Board Pin Definitions *
# *
# Date: 06/14/2019 *
# *
#*******************************************************************************
# *
# This file contains descriptors for the various BSP pin definitions. *
# After completing the pin descriptors, the file is processed by a *
# Python script to generate the appropriate C and header file. *
# *
# NOTEs: *
# - This file should contain NO TAB characters, only spaces. *
# - Indentation is required, but the amount of indentation is not critical, *
# only the consistency of indentation. *
# - Comment lines always begin with a '#' sign. *
# - Letter case of keywords (left side of equal) is not important. *
# Letter case of the value (right side of equal) is not important when *
# processing standard values (e.g. "lo2hi"). However, letter case is *
# maintained when used for creating defines. *
# *
# Keywords: *
# All of the following keywords should begin in column 4. *
# name The name to be used for the pin. This name will be used as a *
# base for generating defines. Each pin name must be unique. *
# desc Optional: A description, if provided, will appear in the *
# generated header file. *
# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. *
# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. *
# pinnum The pin number for the pin being defined (0-49). *
# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. *
# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).*
# One of: disable, pushpull, opendrain, tristate. *
# Also acceptable is a value 0-3, or a macro. *
# GPinput Only used if the pin is being defined as GPIO (funcsel=3). *
# One of: true, false. *
# GPRdZero One of readpin, zero (or true or false). *
# intdir One of: none, lo2hi, hi2lo, either. *
# Note - does not enable any interrupt. Only configures the *
# direction for when it is enabled. *
# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. *
# 1_5K - 24K: valid on I2C pins. *
# weak: Valid for pullups on all other (non-I2C) pins. *
# pulldown: Valid for pin 20 only. *
# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). *
# PowerSw One of: VDD or VSS. *
# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). *
# *
# The following 3 parameters are used when the pin is being defined as a *
# chip enable, i.e. for SPI or MSPI. *
# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. *
# Also acceptable is a macro (e.g. one defined in am_bsp.h). *
# CEnum A value from 0-3. *
# If a value 0-3, a macro is created of the form: *
# #define AM_BSP_<name>_CHNL <CEnum> *
# Also acceptable is a macro (e.g. one defined in am_bsp.h), *
# in this case no other macro is created. *
# CEpol Chip enable polarity, active low or active high. *
# One of: LOW (default) or HIGH. *
# *
# ******************************************************************************
# *****************************************************************************
# COM UART pins (UART0).
# *****************************************************************************
pin
name = COM_UART_TX
desc = This pin is the COM_UART transmit pin.
pinnum = 48
func_sel = AM_HAL_PIN_48_UART0TX
drvstrength = 2
pin
name = COM_UART_RX
desc = This pin is the COM_UART receive pin.
pinnum = 49
func_sel = AM_HAL_PIN_49_UART0RX
# *****************************************************************************
# IOM0 pins.
# *****************************************************************************
pin
name = IOM0_CS
desc = I/O Master 0 chip select.
pinnum = 11
func_sel = AM_HAL_PIN_11_NCE11
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 0
CEnum = 0
CEpol = low
pin
name = IOM0_CS3
desc = I/O Master 0 chip select.
pinnum = 15
func_sel = AM_HAL_PIN_15_NCE15
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 0
CEnum = 3
CEpol = low
pin
name = IOM0_MISO
desc = I/O Master 0 SPI MISO signal.
pinnum = 6
func_sel = AM_HAL_PIN_6_M0MISO
IOMnum = 0
pin
name = IOM0_MOSI
desc = I/O Master 0 SPI MOSI signal.
pinnum = 7
func_sel = AM_HAL_PIN_7_M0MOSI
drvstrength = 12
IOMnum = 0
pin
name = IOM0_SCK
desc = I/O Master 0 SPI SCK signal.
pinnum = 5
func_sel = AM_HAL_PIN_5_M0SCK
drvstrength = 12
IOMnum = 0
pin
name = IOM0_SCL
desc = I/O Master 0 I2C clock signal.
pinnum = 5
func_sel = AM_HAL_PIN_5_M0SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 0
pin
name = IOM0_SDA
desc = I/O Master 0 I2C data signal.
pinnum = 6
func_sel = AM_HAL_PIN_6_M0SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 0
# *****************************************************************************
# IOM1 pins.
# *****************************************************************************
pin
name = IOM1_CS
desc = I/O Master 1 chip select.
pinnum = 14
func_sel = AM_HAL_PIN_14_NCE14
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 1
CEnum = 2
CEpol = low
pin
name = IOM1_MISO
desc = I/O Master 1 SPI MISO signal.
pinnum = 9
func_sel = AM_HAL_PIN_9_M1MISO
IOMnum = 1
pin
name = IOM1_MOSI
desc = I/O Master 1 SPI MOSI signal.
pinnum = 10
func_sel = AM_HAL_PIN_10_M1MOSI
drvstrength = 12
IOMnum = 1
pin
name = IOM1_SCK
desc = I/O Master 1 SPI SCK signal.
pinnum = 8
func_sel = AM_HAL_PIN_8_M1SCK
drvstrength = 12
IOMnum = 1
pin
name = IOM1_SCL
desc = I/O Master 1 I2C clock signal.
pinnum = 8
func_sel = AM_HAL_PIN_8_M1SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 1
pin
name = IOM1_SDA
desc = I/O Master 1 I2C data signal.
pinnum = 9
func_sel = AM_HAL_PIN_9_M1SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 1
# *****************************************************************************
# IOM2 pins.
# *****************************************************************************
pin
name = IOM2_CS
desc = I/O Master 2 chip select.
pinnum = 15
func_sel = AM_HAL_PIN_15_NCE15
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 2
CEnum = 3
CEpol = low
pin
name = IOM2_MISO
desc = I/O Master 2 SPI MISO signal.
pinnum = 25
func_sel = AM_HAL_PIN_25_M2MISO
IOMnum = 2
pin
name = IOM2_MOSI
desc = I/O Master 2 SPI MOSI signal.
pinnum = 28
func_sel = AM_HAL_PIN_28_M2MOSI
drvstrength = 12
IOMnum = 2
pin
name = IOM2_SCK
desc = I/O Master 2 SPI SCK signal.
pinnum = 27
func_sel = AM_HAL_PIN_27_M2SCK
drvstrength = 12
IOMnum = 2
pin
name = IOM2_SCL
desc = I/O Master 2 I2C clock signal.
pinnum = 27
func_sel = AM_HAL_PIN_27_M2SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 2
pin
name = IOM2_SDA
desc = I/O Master 2 I2C data signal.
pinnum = 25
func_sel = AM_HAL_PIN_25_M2SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 2
# *****************************************************************************
# IOM3 pins.
# *****************************************************************************
pin
name = IOM3_CS
desc = I/O Master 3 chip select.
pinnum = 12
func_sel = AM_HAL_PIN_12_NCE12
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 3
CEnum = 0
CEpol = low
pin
name = IOM3_MISO
desc = I/O Master 3 SPI MISO signal.
pinnum = 43
func_sel = AM_HAL_PIN_43_M3MISO
IOMnum = 3
pin
name = IOM3_MOSI
desc = I/O Master 3 SPI MOSI signal.
pinnum = 38
func_sel = AM_HAL_PIN_38_M3MOSI
drvstrength = 12
IOMnum = 3
pin
name = IOM3_SCK
desc = I/O Master 3 SPI SCK signal.
pinnum = 42
func_sel = AM_HAL_PIN_42_M3SCK
drvstrength = 12
IOMnum = 3
pin
name = IOM3_SCL
desc = I/O Master 3 I2C clock signal.
pinnum = 42
func_sel = AM_HAL_PIN_42_M3SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 3
pin
name = IOM3_SDA
desc = I/O Master 3 I2C data signal.
pinnum = 43
func_sel = AM_HAL_PIN_43_M3SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 3
# *****************************************************************************
# IOM4 pins.
# *****************************************************************************
pin
name = IOM4_CS
desc = I/O Master 4 chip select.
pinnum = 13
func_sel = AM_HAL_PIN_13_NCE13
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 4
CEnum = 1
CEpol = low
pin
name = IOM4_MISO
desc = I/O Master 4 SPI MISO signal.
pinnum = 40
func_sel = AM_HAL_PIN_40_M4MISO
IOMnum = 4
pin
name = IOM4_MOSI
desc = I/O Master 4 SPI MOSI signal.
pinnum = 44
func_sel = AM_HAL_PIN_44_M4MOSI
drvstrength = 12
IOMnum = 4
pin
name = IOM4_SCK
desc = I/O Master 4 SPI SCK signal.
pinnum = 39
func_sel = AM_HAL_PIN_39_M4SCK
drvstrength = 12
IOMnum = 4
pin
name = IOM4_SCL
desc = I/O Master 4 I2C clock signal.
pinnum = 39
func_sel = AM_HAL_PIN_39_M4SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 4
pin
name = IOM4_SDA
desc = I/O Master 4 I2C data signal.
pinnum = 40
func_sel = AM_HAL_PIN_40_M4SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 4
# *****************************************************************************
# IOM5 pins.
# *****************************************************************************
pin
name = IOM5_CS
desc = I/O Master 5 chip select.
pinnum = 16
func_sel = AM_HAL_PIN_16_NCE16
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 5
CEnum = 0
CEpol = low
pin
name = IOM5_MISO
desc = I/O Master 5 SPI MISO signal.
pinnum = 49
func_sel = AM_HAL_PIN_49_M5MISO
IOMnum = 5
pin
name = IOM5_MOSI
desc = I/O Master 5 SPI MOSI signal.
pinnum = 47
func_sel = AM_HAL_PIN_47_M5MOSI
drvstrength = 12
IOMnum = 5
pin
name = IOM5_SCK
desc = I/O Master 5 SPI SCK signal.
pinnum = 48
func_sel = AM_HAL_PIN_48_M5SCK
drvstrength = 12
IOMnum = 5
pin
name = IOM5_SCL
desc = I/O Master 5 I2C clock signal.
pinnum = 48
func_sel = AM_HAL_PIN_48_M5SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 5
pin
name = IOM5_SDA
desc = I/O Master 5 I2C data signal.
pinnum = 49
func_sel = AM_HAL_PIN_49_M5SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 5
# *****************************************************************************
# MSPI pins.
# *****************************************************************************
pin
name = MSPI_CE0
desc = MSPI chip select.
pinnum = 19
func_sel = AM_HAL_PIN_19_NCE19
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 6
CEnum = 0
CEpol = low
pin
name = MSPI_CE1
desc = MSPI chip select.
pinnum = 41
func_sel = AM_HAL_PIN_41_NCE41
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 6
CEnum = 1
CEpol = low
pin
name = MSPI_D0
desc = MSPI data 0.
pinnum = 22
func_sel = AM_HAL_PIN_22_MSPI0
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D1
desc = MSPI data 1.
pinnum = 26
func_sel = AM_HAL_PIN_26_MSPI1
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D2
desc = MSPI data 2.
pinnum = 4
func_sel = AM_HAL_PIN_4_MSPI2
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D3
desc = MSPI data 3.
pinnum = 23
func_sel = AM_HAL_PIN_23_MSPI13
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D4
desc = MSPI data 4.
pinnum = 0
func_sel = AM_HAL_PIN_0_MSPI4
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D5
desc = MSPI data 5.
pinnum = 1
func_sel = AM_HAL_PIN_1_MSPI5
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D6
desc = MSPI data 6.
pinnum = 2
func_sel = AM_HAL_PIN_2_MSPI6
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D7
desc = MSPI data 7.
pinnum = 3
func_sel = AM_HAL_PIN_3_MSPI7
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_SCK
desc = MSPI clock.
pinnum = 24
func_sel = AM_HAL_PIN_24_MSPI8
drvstrength = 12
intdir = lo2hi
IOMnum = 6
# *****************************************************************************
# IOS pins.
# *****************************************************************************
pin
name = IOS_CE
desc = I/O Slave chip select.
pinnum = 3
func_sel = AM_HAL_PIN_3_SLnCE
GPinput = true
CEnum = 0
CEpol = low
pin
name = IOS_MISO
desc = I/O Slave SPI MISO signal.
pinnum = 2
func_sel = AM_HAL_PIN_2_SLMISO
drvstrength = 12
pin
name = IOS_MOSI
desc = I/O Slave SPI MOSI signal.
pinnum = 1
func_sel = AM_HAL_PIN_1_SLMOSI
GPinput = true
pin
name = IOS_SCK
desc = I/O Slave SPI SCK signal.
pinnum = 0
func_sel = AM_HAL_PIN_0_SLSCK
GPinput = true
pin
name = IOS_SCL
desc = I/O Slave I2C clock signal.
pinnum = 0
func_sel = AM_HAL_PIN_0_SLSCL
GPinput = true
pin
name = IOS_SDA
desc = I/O Slave I2C data signal.
pinnum = 1
func_sel = AM_HAL_PIN_1_SLSDAWIR3
GPOutcfg = opendrain
pullup = 1_5K
# # *****************************************************************************
# # ITM pins.
# # *****************************************************************************
# pin
# name = ITM_SWO
# desc = ITM Serial Wire Output.
# pinnum = 41
# func_sel = AM_HAL_PIN_41_SWO
# drvstrength = 2
# *****************************************************************************
# CORE pins.
# *****************************************************************************
pin
name = SWDCK
desc = Cortex Serial Wire DCK.
pinnum = 20
func_sel = AM_HAL_PIN_20_SWDCK
pin
name = SWDIO
desc = Cortex Serial Wire DIO.
pinnum = 21
func_sel = AM_HAL_PIN_21_SWDIO
ambiq-hal-sys/ambiq-sparkfun-sdk/boards_sfe/artemis_module/bsp/gcc/Makefile
+151
View File
@@ -0,0 +1,151 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2019, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
#
#******************************************************************************
# Pull in exported paths
SDKPATH?=../../../..
BOARDPATH?=../..
TARGET := libam_bsp
COMPILERNAME := gcc
PROJECT := libam_bsp_gcc
CONFIG := bin
SHELL:=/bin/bash
#### Setup ####
TOOLCHAIN ?= arm-none-eabi
PART = apollo3
CPU = cortex-m4
FPU = fpv4-sp-d16
# Default to FPU hardware calling convention. However, some customers and/or
# applications may need the software calling convention.
#FABI = softfp
FABI = hard
#### Required Executables ####
CC = $(TOOLCHAIN)-gcc
GCC = $(TOOLCHAIN)-gcc
CPP = $(TOOLCHAIN)-cpp
LD = $(TOOLCHAIN)-ld
CP = $(TOOLCHAIN)-objcopy
OD = $(TOOLCHAIN)-objdump
RD = $(TOOLCHAIN)-readelf
AR = $(TOOLCHAIN)-ar
SIZE = $(TOOLCHAIN)-size
RM = $(shell which rm 2>/dev/null)
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
K := $(foreach exec,$(EXECUTABLES),\
$(if $(shell which $($(exec)) 2>/dev/null),,\
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
ifneq ($(strip $(value K)),)
all clean:
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
DEFINES = -DAM_PACKAGE_BGA
DEFINES+= -DAM_PART_APOLLO3
INCLUDES = -I$(SDKPATH)/utils
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
INCLUDES+= -I$(SDKPATH)/devices
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
VPATH = ..
SRC = am_bsp.c
SRC += am_bsp_pins.c
CSRC = $(filter %.c,$(SRC))
ASRC = $(filter %.s,$(SRC))
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
CFLAGS+= -ffunction-sections -fdata-sections
CFLAGS+= -MMD -MP -std=c99 -Wall
# Libraries O3 for production, examples O0 for debug.
CFLAGS+= -O3
CFLAGS+= $(DEFINES)
CFLAGS+= $(INCLUDES)
CFLAGS+=
# Additional user specified CFLAGS
CFLAGS+=$(EXTRA_CFLAGS)
ODFLAGS = -S
#### Rules ####
all: directories $(CONFIG)/$(TARGET).a
directories:
@mkdir -p $(CONFIG)
$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS)
@echo " Compiling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS)
@echo " Assembling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/$(TARGET).a: $(OBJS)
@echo " Library $(COMPILERNAME) $@" ;\
$(AR) rsvc $@ $(OBJS)
clean:
@echo "Cleaning..." ;\
$(RM) -f $(OBJS) $(DEPS) \
$(CONFIG)/$(TARGET).a
$(CONFIG)/%.d: ;
# Automatically include any generated dependencies
-include $(DEPS)
endif
.PHONY: all clean directories