initial commit
This commit is contained in:
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# Auto detect text files and perform LF normalization
|
||||
* text=auto
|
||||
@@ -0,0 +1,50 @@
|
||||
# VS Code
|
||||
*.vscode*
|
||||
|
||||
# Python
|
||||
__pycache__
|
||||
*.pyc
|
||||
|
||||
# Objects / Deps / Archives
|
||||
*.o
|
||||
*.d
|
||||
*.a
|
||||
!artemis/bsp/gcc/bin/libam_bsp.a
|
||||
!artemis_dk/bsp/gcc/bin/libam_bsp.a
|
||||
!artemis_thing_plus/bsp/gcc/bin/libam_bsp.a
|
||||
!artmbed/bsp/gcc/bin/libam_bsp.a
|
||||
!edge/bsp/gcc/bin/libam_bsp.a
|
||||
!edge2/bsp/gcc/bin/libam_bsp.a
|
||||
!redboard_artemis/bsp/gcc/bin/libam_bsp.a
|
||||
!redboard_artemis_atp/bsp/gcc/bin/libam_bsp.a
|
||||
!redboard_artemis_nano/bsp/gcc/bin/libam_bsp.a
|
||||
|
||||
# Binaries
|
||||
*.bin
|
||||
!edge/examples/tensorflow_micro_speech/gcc/bin/micro_speech.bin
|
||||
!edge/examples/tensorflow_micro_speech_test/gcc/bin/micro_speech_test.bin
|
||||
!edge/examples/tensorflow_person_detection/gcc/bin/person_detection.bin
|
||||
!edge2/examples/tensorflow_micro_speech/gcc/bin/micro_speech.bin
|
||||
!edge2/examples/tensorflow_micro_speech_test/gcc/bin/micro_speech_test.bin
|
||||
!redboard_artemis/examples/tensorflow_micro_speech/gcc/bin/micro_speech.bin
|
||||
!artemis_dk/examples/tensorflow_micro_speech/gcc/bin/micro_speech.bin
|
||||
|
||||
# Other Build Residuals
|
||||
*.map
|
||||
*.lst
|
||||
*.axf
|
||||
|
||||
# MacOSX
|
||||
*.DS_Store
|
||||
|
||||
# Interface Firmware
|
||||
!artemis_dk/intfc/kl26z_artemis_dk_if.axf
|
||||
!artemis_dk/intfc/kl26z_artemis_dk_if.bin
|
||||
!artemis_dk/intfc/kl26z_artemis_dk_if.hex
|
||||
!artemis_dk/intfc/kl26z_artemis_dk_if_crc.bin
|
||||
!artemis_dk/intfc/kl26z_artemis_dk_if_crc.hex
|
||||
!artemis_dk/intfc/kl26z_bl.axf
|
||||
!artemis_dk/intfc/kl26z_bl.bin
|
||||
!artemis_dk/intfc/kl26z_bl.hex
|
||||
!artemis_dk/intfc/kl26z_bl_crc.bin
|
||||
!artemis_dk/intfc/kl26z_bl_crc.hex
|
||||
@@ -0,0 +1,9 @@
|
||||
[submodule "common/tools_sfe/scripts/utility/sh-realpath"]
|
||||
path = common/tools_sfe/scripts/utility/sh-realpath
|
||||
url = https://github.com/mkropat/sh-realpath
|
||||
[submodule "common/tools_sfe/asb"]
|
||||
path = common/tools_sfe/asb
|
||||
url = https://github.com/sparkfun/Apollo3_Uploader_ASB
|
||||
[submodule "common/tools_sfe/svl"]
|
||||
path = common/tools_sfe/svl
|
||||
url = https://github.com/sparkfun/Apollo3_Uploader_SVL
|
||||
@@ -0,0 +1,60 @@
|
||||
Welcome!
|
||||
========
|
||||
This is the location to get the latest Board Support Packages (BSPs) for SparkFun Apollo3 (Artemis) based boards to be used in the AmbiqSuite SDK.
|
||||
|
||||
Prerequisites
|
||||
=============
|
||||
* AmbiqSuiteSDK - contains source code to support the Apollo3 microcontroller (easy mode: [clone/fork our mirror here](https://github.com/sparkfun/AmbiqSuiteSDK))
|
||||
* arm-none-eabi-gcc toolchain accessible at your cmmand line (recommend version [8-2018-q4-major](https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm/downloads#panel2a) or lower)
|
||||
* make
|
||||
* python3 (only needed for bootloading)
|
||||
|
||||
Installation / Usage
|
||||
====================
|
||||
Usage of these BSPs is quite flexible, however the easiest way to use them is to clone into your AmbiqSuite SDK directly. For example:
|
||||
|
||||
``` bash
|
||||
cd $AM_SDK_ROOT # Enter the root of your AmbiqSuite SDK
|
||||
git clone https://github.com/sparkfun/SparkFun_Apollo3_AmbiqSuite_BSPs boards_sfe # Clone this repo into a directory called 'boards_sfe'
|
||||
|
||||
# Assuming you have your ARMCC (arm-none-eabi-xxx) toolchain installed you can then build examples
|
||||
BOARD=redboard_artemis_atp # or: edge, artemis_thing_plus, artemis_redboard_nano, artemis_redboard_atp etc...
|
||||
EXAMPLE=hello_world_uart # or: ble_freertos_tag, blinky, tensorflow_micro_speech or other applicable example for board
|
||||
cd boards_sfe/common/examples/$EXAMPLE/gcc
|
||||
make BOARD=$BOARD
|
||||
make BOARD=$BOARD clean
|
||||
make BOARD=$BOARD bootload # eqivalent to bootload_svl
|
||||
make BOARD=$BOARD bootload_svl # builds and bootloads with SparkFun Variable Loader - you must have this bootloader flashed onto your board
|
||||
make BOARD=$BOARD bootload_asb # builds and bootloads with Ambiq Secure Bootloader - should work with all boards. If not try changing the baud rate or manually setting the board into bootload mode
|
||||
```
|
||||
|
||||
Advanced Usage
|
||||
================
|
||||
|
||||
## Make Line Options
|
||||
A basic build can be acheived with a simple command like ```make BOARD=redboard_artemis bootload``` however this usage assumes a lot of things. You can override the default values for these options:
|
||||
|
||||
Name | Default Value | Description
|
||||
--- | --- | ---
|
||||
```BOARD``` | | Optional short syntax to select board bsps that exist in the root directory of this repo
|
||||
```BOARDPATH``` | | Directly specify the path to the board directory that contains desired bsp files. Will be ignored if ```BOARD``` is provided
|
||||
```COM_PORT``` | COM4 | USB serial port that will be used in bootload steps. Can be Windows or \*nix style (COMX or /dev/xxx)
|
||||
```PYTHON3``` | python3 | Command used to invoke Python3.x on the command line
|
||||
```ASB_UPLOAD_BAUD``` | 115200 | Baud rate used for the Ambiq Secure Bootloader
|
||||
```SVL_UPLOAD_BAUD``` | 921600 | Baud rate used for the SparkFun Variable Loader (configurable to common values 921600, 460800, 230400, 115200, and 57600)
|
||||
```SDKPATH``` | ../../../../.. | Path used to locate the root of the AmbiqSuiteSDK (change this if installing BSPs in a non-standard location)
|
||||
```COMMONPATH``` | ../../../../common | Path used to locate the common directory of this repo (change if compiling a project from a non-standard location (aka not from ```~/common/examples/{example}/gcc```))
|
||||
```PROJECTPATH``` | .. | Path to project directory - the template makefile will automatically add ```$(PROJECTPATH)/src``` to the directories to search for included headers and source files
|
||||
|
||||
|
||||
## Using Custom BSPs
|
||||
When compiling pretty much any example the SDK relies on the BSP (Board Support Package) definitions to specialize to that board and its capabilities. In the basic examples above we use ```BOARD=$NAME_OF_BOARD_DIR``` to specify a SparkFun board. When the ```BOARD``` variable is set the Makefile will automatically configure the path used to find the BSP directory as ```../../../../$NAME_OF_BOARD_DIR```. This path, relative to the build directory ```~/common/examples/{example}/gcc``` finds the board directory in the root of the BSP repo.
|
||||
|
||||
What if you want to use a custom BSP for your own board? Firstly, you can generate BSP files by following the [bsp_pinconfig README](https://github.com/sparkfun/SparkFun_Apollo3_AmbiqSuite_BSPs/blob/master/common/bsp_pinconfig/README.md). You should put your BSP files in a directory called ```bsp``` and enclose that in a directory named after your board. Once you have done that there are two options.
|
||||
|
||||
1. Instead of using ```BOARD=``` you can directly specify the path to the board directory on the make lines like this: ```make BOARDPATH=../some/relative/or/absolute/path/to/your/board/directory bootload```
|
||||
1. You can hijack the system so that your board works with the shortcut ```BOARD=```. Do this by placing your board directory next to the SparkFun boards in your copy of the repo.
|
||||
|
||||
How to Generate BSP Files
|
||||
=========================
|
||||
See the [bsp_pinconfig README](https://github.com/sparkfun/SparkFun_Apollo3_AmbiqSuite_BSPs/tree/master/common/bsp_pinconfig/README.md)
|
||||
@@ -0,0 +1,5 @@
|
||||
# Artemis DK Interface Firmware
|
||||
In addition to the typical BSP files this directory also includes a copy of recent interface firmware for the Artemis Dev Kit. This firmware is what runs on the onboard KL26Z interface MCU.
|
||||
|
||||
* ```intfc/kl26z_bl*.*``` : this is the bootloader for the KL26Z MCU - it must be programmed onto the board using a debug probe such as a SEGGER J-Link (offset 0x00000000). It is active when there is no secondary image or the board was powered on with the reset button held down. The USB mass storage drive will appear as "MAINTENANCE" and will allow you to drag + drop a secondary image onto the KL26Z
|
||||
* ```intfc/kl26z_artemis_dk_if*.*``` : this is the secondary image on the KL26Z MCU that will allow it to reprogram the Artemis module. When the KL26Z is in "MAINTENANCE" mode this image can be programmed by drag + drop. It may also be programmed directly using a debug probe (offset 0x00000000, still requires ```intfc/kl26z_bl*.*``` to be flashed to function). The USB mass storage drive will appear as "ARTEMIS" and will allow you to drag + drop executable images onto the Artemis module
|
||||
File diff suppressed because it is too large
Load Diff
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|
||||
//*****************************************************************************
|
||||
//
|
||||
// am_bsp.h
|
||||
//! @file
|
||||
//!
|
||||
//! @brief Functions to aid with configuring the GPIOs.
|
||||
//!
|
||||
//! @addtogroup BSP Board Support Package (BSP)
|
||||
//! @addtogroup apollo3_fpga_bsp BSP for the Apollo3 Hotshot FPGA
|
||||
//! @ingroup BSP
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision v2.0.0 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef AM_BSP_H
|
||||
#define AM_BSP_H
|
||||
|
||||
// artmbed hardware version: v01 (there will need to be changes when migrating to v02 or v10)
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp_pins.h"
|
||||
|
||||
//
|
||||
// Make individual includes to not require full port before usage.
|
||||
//#include "am_devices.h"
|
||||
//
|
||||
#include "am_devices_led.h"
|
||||
#include "am_devices_button.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Begin User Modifiable Area
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Camera
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_CAMERA_HM01B0_MCLK_PIN 18
|
||||
#define AM_BSP_CAMERA_HM01B0_I2C_IOM 1
|
||||
#define AM_BSP_CAMERA_HM01B0_I2C_SDA_PIN AM_BSP_GPIO_IOM1_SDA
|
||||
#define AM_BSP_CAMERA_HM01B0_I2C_SCL_PIN AM_BSP_GPIO_IOM1_SCL
|
||||
#define g_AM_BSP_CAMERA_HM01B0_I2C_SDA g_AM_BSP_GPIO_IOM1_SDA
|
||||
#define g_AM_BSP_CAMERA_HM01B0_I2C_SCL g_AM_BSP_GPIO_IOM1_SCL
|
||||
#define AM_BSP_CAMERA_HM01B0_MCLK_GEN_MOD 1
|
||||
#define AM_BSP_CAMERA_HM01B0_MCLK_GEN_SEG AM_HAL_CTIMER_TIMERA
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// PDM Microphone
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_PDM_CHANNEL AM_HAL_PDM_CHANNEL_RIGHT
|
||||
#define AM_BSP_PDM_DATA_PIN AM_BSP_GPIO_MIC_DATA
|
||||
#define AM_BSP_PDM_CLOCK_PIN AM_BSP_GPIO_MIC_CLK
|
||||
#define g_AM_BSP_PDM_DATA g_AM_BSP_GPIO_MIC_DATA
|
||||
#define g_AM_BSP_PDM_CLOCK g_AM_BSP_GPIO_MIC_CLK
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Accelerometer.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_ACCELEROMETER_I2C_IOM 1
|
||||
#define AM_BSP_ACCELEROMETER_I2C_ADDRESS 0x19
|
||||
#define AM_BSP_ACCELEROMETER_I2C_SDA_PIN AM_BSP_GPIO_IOM1_SDA
|
||||
#define AM_BSP_ACCELEROMETER_I2C_SCL_PIN AM_BSP_GPIO_IOM1_SCL
|
||||
#define g_AM_BSP_ACCELEROMETER_I2C_SDA g_AM_BSP_GPIO_IOM1_SDA
|
||||
#define g_AM_BSP_ACCELEROMETER_I2C_SCL g_AM_BSP_GPIO_IOM1_SCL
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Primary SPI Pins
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_PRIM_SPI_IOM 4
|
||||
#define AM_BSP_PRIM_SPI_CLK_PIN AM_BSP_GPIO_IOM4_SCK
|
||||
#define AM_BSP_PRIM_SPI_SDO_PIN AM_BSP_GPIO_IOM4_MOSI
|
||||
#define AM_BSP_PRIM_SPI_SDI_PIN AM_BSP_GPIO_IOM4_MISO
|
||||
#define g_AM_BSP_PRIM_SPI_CLK g_AM_BSP_GPIO_IOM4_SCK
|
||||
#define g_AM_BSP_PRIM_SPI_SDO g_AM_BSP_GPIO_IOM4_SDO
|
||||
#define g_AM_BSP_PRIM_SPI_SDI g_AM_BSP_GPIO_IOM4_SDI
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Primary UART Pins
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_PRIM_UART_TX_PIN AM_BSP_GPIO_COM_UART_TX
|
||||
#define AM_BSP_PRIM_UART_RX_PIN AM_BSP_GPIO_COM_UART_RX
|
||||
#define g_AM_BSP_PRIM_UART_TX g_AM_BSP_GPIO_COM_UART_TX
|
||||
#define g_AM_BSP_PRIM_UART_RX g_AM_BSP_GPIO_COM_UART_RX
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Qwiic Connector.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_QWIIC_I2C_IOM 1
|
||||
#define AM_BSP_QWIIC_I2C_SDA_PIN AM_BSP_GPIO_IOM1_SDA
|
||||
#define AM_BSP_QWIIC_I2C_SCL_PIN AM_BSP_GPIO_IOM1_SCL
|
||||
#define g_AM_BSP_QWIIC_I2C_SDA g_AM_BSP_GPIO_IOM1_SDA
|
||||
#define g_AM_BSP_QWIIC_I2C_SCL g_AM_BSP_GPIO_IOM1_SCL
|
||||
|
||||
|
||||
// //*****************************************************************************
|
||||
// //
|
||||
// // Button definitions.
|
||||
// //
|
||||
// //*****************************************************************************
|
||||
// #define AM_BSP_NUM_BUTTONS 0
|
||||
// extern am_devices_button_t am_bsp_psButtons[AM_BSP_NUM_BUTTONS];
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// LED definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_NUM_LEDS 1
|
||||
extern am_devices_led_t am_bsp_psLEDs[AM_BSP_NUM_LEDS];
|
||||
|
||||
// LED Device Array Indices
|
||||
#define AM_BSP_LED0 0
|
||||
#define AM_BSP_LED_BLUE AM_BSP_LED0
|
||||
|
||||
// Corresponding GPIO Numbers
|
||||
#define AM_BSP_GPIO_LED0 AM_BSP_GPIO_LED_BLUE
|
||||
#define AM_BSP_GPIO_LED23 AM_BSP_GPIO_LED_BLUE
|
||||
#define AM_BSP_GPIO_LED_STAT AM_BSP_GPIO_LED_BLUE
|
||||
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// PWM_LED peripheral assignments.
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The ARTMBED LED0 is pad 23
|
||||
//
|
||||
#define AM_BSP_PIN_PWM_LED AM_BSP_GPIO_LED0
|
||||
#define AM_BSP_PWM_LED_TIMER 3
|
||||
#define AM_BSP_PWM_LED_TIMER_SEG AM_HAL_CTIMER_TIMERB
|
||||
#define AM_BSP_PWM_LED_TIMER_INT AM_HAL_CTIMER_INT_TIMERB3C0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Apollo3 has two UART instances.
|
||||
// AM_BSP_UART_PRINT_INST should correspond to COM_UART.
|
||||
//
|
||||
#define AM_BSP_UART_IOS_INST 0
|
||||
#define AM_BSP_UART_PRINT_INST 0
|
||||
#define AM_BSP_UART_BOOTLOADER_INST 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End User Modifiable Area
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Print interface type
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_PRINT_INFC_NONE 0
|
||||
#define AM_BSP_PRINT_INFC_SWO 1
|
||||
#define AM_BSP_PRINT_INFC_UART0 2
|
||||
#define AM_BSP_PRINT_INFC_BUFFERED_UART0 3
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Structure containing UART configuration information while it is powered down.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
bool bSaved;
|
||||
uint32_t ui32TxPinNum;
|
||||
uint32_t ui32TxPinCfg;
|
||||
}
|
||||
am_bsp_uart_pwrsave_t;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External data definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern am_bsp_uart_pwrsave_t am_bsp_uart_pwrsave[AM_REG_UART_NUM_MODULES];
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External function definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void am_bsp_low_power_init(void);
|
||||
extern void am_bsp_iom_pins_enable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
|
||||
extern void am_bsp_iom_pins_disable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
|
||||
extern void am_bsp_mspi_pins_enable(am_hal_mspi_device_e eMSPIDevice);
|
||||
extern void am_bsp_mspi_pins_disable(am_hal_mspi_device_e eMSPIDevice);
|
||||
|
||||
extern void am_bsp_ios_pins_enable(uint32_t ui32Module, uint32_t ui32IOSMode); // SparkFun Edge does not expose IO Slave Clock signal, so hiding these functions
|
||||
extern void am_bsp_ios_pins_disable(uint32_t ui32Module, uint32_t ui32IOSMode);
|
||||
|
||||
extern void am_bsp_debug_printf_enable(void);
|
||||
extern void am_bsp_debug_printf_disable(void);
|
||||
|
||||
#ifdef AM_BSP_GPIO_ITM_SWO
|
||||
extern void am_bsp_itm_printf_enable(void);
|
||||
#else
|
||||
extern void am_bsp_itm_printf_enable(uint32_t ui32Pin, am_hal_gpio_pincfg_t sPincfg);
|
||||
#endif
|
||||
extern void am_bsp_itm_string_print(char *pcString);
|
||||
extern void am_bsp_itm_printf_disable(void);
|
||||
|
||||
extern void am_bsp_uart_string_print(char *pcString);
|
||||
extern void am_bsp_uart_printf_enable(void);
|
||||
extern void am_bsp_uart_printf_enable_custom(const am_hal_uart_config_t* p_config);
|
||||
extern void am_bsp_uart_printf_disable(void);
|
||||
|
||||
extern void am_bsp_buffered_uart_printf_enable(void);
|
||||
extern void am_bsp_buffered_uart_service(void);
|
||||
|
||||
extern uint32_t am_bsp_com_uart_transfer(const am_hal_uart_transfer_t *psTransfer);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // AM_BSP_H
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,687 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// am_bsp_pins.h
|
||||
//! @file
|
||||
//!
|
||||
//! @brief BSP pin configuration definitions.
|
||||
//!
|
||||
//! @addtogroup BSP Board Support Package (BSP)
|
||||
//! @addtogroup apollo3_bsp BSP for the Apollo3 EVB.
|
||||
//! @ingroup BSP
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef AM_BSP_PINS_H
|
||||
#define AM_BSP_PINS_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_D0 pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_D0 0
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D0;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_D1 pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_D1 1
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D1;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_D2 pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_D2 2
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D2;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_D3 pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_D3 3
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D3;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_D4 pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_D4 4
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D4;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_D5 pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_D5 5
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D5;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_D6 pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_D6 6
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D6;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_D7 pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_D7 7
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D7;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_VSYNC pin: Also called FVLD on the HM01B0 module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_VSYNC 15
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_VSYNC;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_HSYNC pin: Also called LVLD on the HM01B0 module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_HSYNC 17
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_HSYNC;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_PCLK pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_PCLK 19
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_PCLK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_TRIG pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_TRIG 14
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_TRIG;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// CAMERA_HM01B0_INT pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_CAMERA_HM01B0_INT 10
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_INT;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MIC_DATA pin: Data line for PDM microphones.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MIC_DATA 11
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MIC_CLK pin: Clock line for PDM microphones.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MIC_CLK 12
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// LED_BLUE pin: The BLUE LED labeled STAT.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_LED_BLUE 23
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// COM_UART_TX pin: This pin is the COM_UART transmit pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_COM_UART_TX 48
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// COM_UART_RX pin: This pin is the COM_UART receive pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_COM_UART_RX 49
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_CS pin: I/O Master 0 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_CS 11
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS;
|
||||
#define AM_BSP_GPIO_IOM0_CS_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_CS3 pin: I/O Master 0 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_CS3 15
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3;
|
||||
#define AM_BSP_GPIO_IOM0_CS3_CHNL 3
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_MISO pin: I/O Master 0 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_MISO 6
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_MOSI 7
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SCK pin: I/O Master 0 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_SCK 5
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SCL pin: I/O Master 0 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_SCL 5
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SDA pin: I/O Master 0 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_SDA 6
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_CS pin: I/O Master 1 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_CS 14
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS;
|
||||
#define AM_BSP_GPIO_IOM1_CS_CHNL 2
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_MISO pin: I/O Master 1 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_MISO 9
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_MOSI 10
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SCK pin: I/O Master 1 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_SCK 8
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SCL pin: I/O Master 1 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_SCL 8
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SDA pin: I/O Master 1 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_SDA 9
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_CS pin: I/O Master 2 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_CS 15
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS;
|
||||
#define AM_BSP_GPIO_IOM2_CS_CHNL 3
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_MISO pin: I/O Master 2 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_MISO 25
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_MOSI 28
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SCK pin: I/O Master 2 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_SCK 27
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SCL pin: I/O Master 2 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_SCL 27
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SDA pin: I/O Master 2 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_SDA 25
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_CS pin: I/O Master 3 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_CS 12
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS;
|
||||
#define AM_BSP_GPIO_IOM3_CS_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_MISO pin: I/O Master 3 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_MISO 43
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_MOSI 38
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SCK pin: I/O Master 3 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_SCK 42
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SCL pin: I/O Master 3 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_SCL 42
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SDA pin: I/O Master 3 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_SDA 43
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_CS pin: I/O Master 4 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_CS 13
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS;
|
||||
#define AM_BSP_GPIO_IOM4_CS_CHNL 1
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_MISO pin: I/O Master 4 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_MISO 40
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_MOSI 44
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SCK pin: I/O Master 4 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_SCK 39
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SCL pin: I/O Master 4 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_SCL 39
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SDA pin: I/O Master 4 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_SDA 40
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_CS pin: I/O Master 5 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_CS 16
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS;
|
||||
#define AM_BSP_GPIO_IOM5_CS_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_MISO pin: I/O Master 5 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_MISO 49
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_MOSI 47
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SCK pin: I/O Master 5 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_SCK 48
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SCL pin: I/O Master 5 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_SCL 48
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SDA pin: I/O Master 5 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_SDA 49
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_CE0 pin: MSPI chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_CE0 19
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0;
|
||||
#define AM_BSP_GPIO_MSPI_CE0_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_CE1 pin: MSPI chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_CE1 41
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1;
|
||||
#define AM_BSP_GPIO_MSPI_CE1_CHNL 1
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D0 pin: MSPI data 0.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D0 22
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D1 pin: MSPI data 1.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D1 26
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D2 pin: MSPI data 2.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D2 4
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D3 pin: MSPI data 3.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D3 23
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D4 pin: MSPI data 4.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D4 0
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D5 pin: MSPI data 5.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D5 1
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D6 pin: MSPI data 6.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D6 2
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D7 pin: MSPI data 7.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D7 3
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_SCK pin: MSPI clock.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_SCK 24
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_CE pin: I/O Slave chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_CE 3
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE;
|
||||
#define AM_BSP_GPIO_IOS_CE_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_MISO pin: I/O Slave SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_MISO 2
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_MOSI pin: I/O Slave SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_MOSI 1
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SCK pin: I/O Slave SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_SCK 0
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SCL pin: I/O Slave I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_SCL 0
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SDA pin: I/O Slave I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_SDA 1
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// ITM_SWO pin: ITM Serial Wire Output.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_ITM_SWO 22
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_ITM_SWO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SWDCK pin: Cortex Serial Wire DCK.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_SWDCK 20
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SWDIO pin: Cortex Serial Wire DIO.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_SWDIO 21
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // AM_BSP_PINS_H
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,767 @@
|
||||
# ******************************************************************************
|
||||
# *
|
||||
# Copyright (c) 2018 Ambiq Micro. *
|
||||
# *
|
||||
#*******************************************************************************
|
||||
# *
|
||||
# File: bsp_pins.src *
|
||||
# *
|
||||
# Title: SparkFun Edge2 Board Pin Definitions *
|
||||
# *
|
||||
# Date: 06/14/2019 *
|
||||
# *
|
||||
#*******************************************************************************
|
||||
# *
|
||||
# This file contains descriptors for the various BSP pin definitions. *
|
||||
# After completing the pin descriptors, the file is processed by a *
|
||||
# Python script to generate the appropriate C and header file. *
|
||||
# *
|
||||
# NOTEs: *
|
||||
# - This file should contain NO TAB characters, only spaces. *
|
||||
# - Indentation is required, but the amount of indentation is not critical, *
|
||||
# only the consistency of indentation. *
|
||||
# - Comment lines always begin with a '#' sign. *
|
||||
# - Letter case of keywords (left side of equal) is not important. *
|
||||
# Letter case of the value (right side of equal) is not important when *
|
||||
# processing standard values (e.g. "lo2hi"). However, letter case is *
|
||||
# maintained when used for creating defines. *
|
||||
# *
|
||||
# Keywords: *
|
||||
# All of the following keywords should begin in column 4. *
|
||||
# name The name to be used for the pin. This name will be used as a *
|
||||
# base for generating defines. Each pin name must be unique. *
|
||||
# desc Optional: A description, if provided, will appear in the *
|
||||
# generated header file. *
|
||||
# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. *
|
||||
# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. *
|
||||
# pinnum The pin number for the pin being defined (0-49). *
|
||||
# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. *
|
||||
# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).*
|
||||
# One of: disable, pushpull, opendrain, tristate. *
|
||||
# Also acceptable is a value 0-3, or a macro. *
|
||||
# GPinput Only used if the pin is being defined as GPIO (funcsel=3). *
|
||||
# One of: true, false. *
|
||||
# GPRdZero One of readpin, zero (or true or false). *
|
||||
# intdir One of: none, lo2hi, hi2lo, either. *
|
||||
# Note - does not enable any interrupt. Only configures the *
|
||||
# direction for when it is enabled. *
|
||||
# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. *
|
||||
# 1_5K - 24K: valid on I2C pins. *
|
||||
# weak: Valid for pullups on all other (non-I2C) pins. *
|
||||
# pulldown: Valid for pin 20 only. *
|
||||
# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). *
|
||||
# PowerSw One of: VDD or VSS. *
|
||||
# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). *
|
||||
# *
|
||||
# The following 3 parameters are used when the pin is being defined as a *
|
||||
# chip enable, i.e. for SPI or MSPI. *
|
||||
# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. *
|
||||
# Also acceptable is a macro (e.g. one defined in am_bsp.h). *
|
||||
# CEnum A value from 0-3. *
|
||||
# If a value 0-3, a macro is created of the form: *
|
||||
# #define AM_BSP_<name>_CHNL <CEnum> *
|
||||
# Also acceptable is a macro (e.g. one defined in am_bsp.h), *
|
||||
# in this case no other macro is created. *
|
||||
# CEpol Chip enable polarity, active low or active high. *
|
||||
# One of: LOW (default) or HIGH. *
|
||||
# *
|
||||
# ******************************************************************************
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# Camera Pins
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = CAMERA_HM01B0_D0
|
||||
pinnum = 0
|
||||
func_sel = AM_HAL_PIN_0_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_D1
|
||||
pinnum = 1
|
||||
func_sel = AM_HAL_PIN_1_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_D2
|
||||
pinnum = 2
|
||||
func_sel = AM_HAL_PIN_2_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_D3
|
||||
pinnum = 3
|
||||
func_sel = AM_HAL_PIN_3_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_D4
|
||||
pinnum = 4
|
||||
func_sel = AM_HAL_PIN_4_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_D5
|
||||
pinnum = 5
|
||||
func_sel = AM_HAL_PIN_5_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_D6
|
||||
pinnum = 6
|
||||
func_sel = AM_HAL_PIN_6_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_D7
|
||||
pinnum = 7
|
||||
func_sel = AM_HAL_PIN_7_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
# pin
|
||||
# name = CAMERA_HM01B0_MCLCK
|
||||
# pinnum = 18
|
||||
# func_sel =
|
||||
# # this pin needs only the pad # to be defined b/c it is configured by "am_hal_ctimer_output_configure"
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_VSYNC
|
||||
desc = Also called FVLD on the HM01B0 module
|
||||
pinnum = 15
|
||||
func_sel = AM_HAL_PIN_15_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_HSYNC
|
||||
desc = Also called LVLD on the HM01B0 module
|
||||
pinnum = 17
|
||||
func_sel = AM_HAL_PIN_17_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_PCLK
|
||||
pinnum = 19
|
||||
func_sel = AM_HAL_PIN_19_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_TRIG
|
||||
pinnum = 14
|
||||
func_sel = AM_HAL_PIN_14_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = CAMERA_HM01B0_INT
|
||||
pinnum = 10
|
||||
func_sel = AM_HAL_PIN_10_GPIO
|
||||
drvstrength = 2
|
||||
GPinput = true
|
||||
# todo: add interrupt capability for this pin according to polarity of HM01B0 module
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# PDM Microphone Lines
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = MIC_DATA
|
||||
desc = Data line for PDM microphones
|
||||
pinnum = 11
|
||||
func_sel = AM_HAL_PIN_11_PDMDATA
|
||||
|
||||
pin
|
||||
name = MIC_CLK
|
||||
desc = Clock line for PDM microphones
|
||||
pinnum = 12
|
||||
func_sel = AM_HAL_PIN_12_PDMCLK
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# LEDs and buttons
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = LED_BLUE
|
||||
desc = The BLUE LED labeled STAT
|
||||
pinnum = 23
|
||||
func_sel = AM_HAL_PIN_23_GPIO
|
||||
drvstrength = 12
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# COM UART pins (UART0).
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = COM_UART_TX
|
||||
desc = This pin is the COM_UART transmit pin.
|
||||
pinnum = 48
|
||||
func_sel = AM_HAL_PIN_48_UART0TX
|
||||
drvstrength = 2
|
||||
|
||||
pin
|
||||
name = COM_UART_RX
|
||||
desc = This pin is the COM_UART receive pin.
|
||||
pinnum = 49
|
||||
func_sel = AM_HAL_PIN_49_UART0RX
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM0 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM0_CS
|
||||
desc = I/O Master 0 chip select.
|
||||
pinnum = 11
|
||||
func_sel = AM_HAL_PIN_11_NCE11
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 0
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM0_CS3
|
||||
desc = I/O Master 0 chip select.
|
||||
pinnum = 15
|
||||
func_sel = AM_HAL_PIN_15_NCE15
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 0
|
||||
CEnum = 3
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM0_MISO
|
||||
desc = I/O Master 0 SPI MISO signal.
|
||||
pinnum = 6
|
||||
func_sel = AM_HAL_PIN_6_M0MISO
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_MOSI
|
||||
desc = I/O Master 0 SPI MOSI signal.
|
||||
pinnum = 7
|
||||
func_sel = AM_HAL_PIN_7_M0MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_SCK
|
||||
desc = I/O Master 0 SPI SCK signal.
|
||||
pinnum = 5
|
||||
func_sel = AM_HAL_PIN_5_M0SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_SCL
|
||||
desc = I/O Master 0 I2C clock signal.
|
||||
pinnum = 5
|
||||
func_sel = AM_HAL_PIN_5_M0SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_SDA
|
||||
desc = I/O Master 0 I2C data signal.
|
||||
pinnum = 6
|
||||
func_sel = AM_HAL_PIN_6_M0SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 0
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM1 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM1_CS
|
||||
desc = I/O Master 1 chip select.
|
||||
pinnum = 14
|
||||
func_sel = AM_HAL_PIN_14_NCE14
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 1
|
||||
CEnum = 2
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM1_MISO
|
||||
desc = I/O Master 1 SPI MISO signal.
|
||||
pinnum = 9
|
||||
func_sel = AM_HAL_PIN_9_M1MISO
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_MOSI
|
||||
desc = I/O Master 1 SPI MOSI signal.
|
||||
pinnum = 10
|
||||
func_sel = AM_HAL_PIN_10_M1MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_SCK
|
||||
desc = I/O Master 1 SPI SCK signal.
|
||||
pinnum = 8
|
||||
func_sel = AM_HAL_PIN_8_M1SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_SCL
|
||||
desc = I/O Master 1 I2C clock signal.
|
||||
pinnum = 8
|
||||
func_sel = AM_HAL_PIN_8_M1SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_SDA
|
||||
desc = I/O Master 1 I2C data signal.
|
||||
pinnum = 9
|
||||
func_sel = AM_HAL_PIN_9_M1SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 1
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM2 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM2_CS
|
||||
desc = I/O Master 2 chip select.
|
||||
pinnum = 15
|
||||
func_sel = AM_HAL_PIN_15_NCE15
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 2
|
||||
CEnum = 3
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM2_MISO
|
||||
desc = I/O Master 2 SPI MISO signal.
|
||||
pinnum = 25
|
||||
func_sel = AM_HAL_PIN_25_M2MISO
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_MOSI
|
||||
desc = I/O Master 2 SPI MOSI signal.
|
||||
pinnum = 28
|
||||
func_sel = AM_HAL_PIN_28_M2MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_SCK
|
||||
desc = I/O Master 2 SPI SCK signal.
|
||||
pinnum = 27
|
||||
func_sel = AM_HAL_PIN_27_M2SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_SCL
|
||||
desc = I/O Master 2 I2C clock signal.
|
||||
pinnum = 27
|
||||
func_sel = AM_HAL_PIN_27_M2SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_SDA
|
||||
desc = I/O Master 2 I2C data signal.
|
||||
pinnum = 25
|
||||
func_sel = AM_HAL_PIN_25_M2SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 2
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM3 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM3_CS
|
||||
desc = I/O Master 3 chip select.
|
||||
pinnum = 12
|
||||
func_sel = AM_HAL_PIN_12_NCE12
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 3
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM3_MISO
|
||||
desc = I/O Master 3 SPI MISO signal.
|
||||
pinnum = 43
|
||||
func_sel = AM_HAL_PIN_43_M3MISO
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_MOSI
|
||||
desc = I/O Master 3 SPI MOSI signal.
|
||||
pinnum = 38
|
||||
func_sel = AM_HAL_PIN_38_M3MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_SCK
|
||||
desc = I/O Master 3 SPI SCK signal.
|
||||
pinnum = 42
|
||||
func_sel = AM_HAL_PIN_42_M3SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_SCL
|
||||
desc = I/O Master 3 I2C clock signal.
|
||||
pinnum = 42
|
||||
func_sel = AM_HAL_PIN_42_M3SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_SDA
|
||||
desc = I/O Master 3 I2C data signal.
|
||||
pinnum = 43
|
||||
func_sel = AM_HAL_PIN_43_M3SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 3
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM4 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM4_CS
|
||||
desc = I/O Master 4 chip select.
|
||||
pinnum = 13
|
||||
func_sel = AM_HAL_PIN_13_NCE13
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 4
|
||||
CEnum = 1
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM4_MISO
|
||||
desc = I/O Master 4 SPI MISO signal.
|
||||
pinnum = 40
|
||||
func_sel = AM_HAL_PIN_40_M4MISO
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_MOSI
|
||||
desc = I/O Master 4 SPI MOSI signal.
|
||||
pinnum = 44
|
||||
func_sel = AM_HAL_PIN_44_M4MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_SCK
|
||||
desc = I/O Master 4 SPI SCK signal.
|
||||
pinnum = 39
|
||||
func_sel = AM_HAL_PIN_39_M4SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_SCL
|
||||
desc = I/O Master 4 I2C clock signal.
|
||||
pinnum = 39
|
||||
func_sel = AM_HAL_PIN_39_M4SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_SDA
|
||||
desc = I/O Master 4 I2C data signal.
|
||||
pinnum = 40
|
||||
func_sel = AM_HAL_PIN_40_M4SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 4
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM5 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM5_CS
|
||||
desc = I/O Master 5 chip select.
|
||||
pinnum = 16
|
||||
func_sel = AM_HAL_PIN_16_NCE16
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 5
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM5_MISO
|
||||
desc = I/O Master 5 SPI MISO signal.
|
||||
pinnum = 49
|
||||
func_sel = AM_HAL_PIN_49_M5MISO
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_MOSI
|
||||
desc = I/O Master 5 SPI MOSI signal.
|
||||
pinnum = 47
|
||||
func_sel = AM_HAL_PIN_47_M5MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_SCK
|
||||
desc = I/O Master 5 SPI SCK signal.
|
||||
pinnum = 48
|
||||
func_sel = AM_HAL_PIN_48_M5SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_SCL
|
||||
desc = I/O Master 5 I2C clock signal.
|
||||
pinnum = 48
|
||||
func_sel = AM_HAL_PIN_48_M5SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_SDA
|
||||
desc = I/O Master 5 I2C data signal.
|
||||
pinnum = 49
|
||||
func_sel = AM_HAL_PIN_49_M5SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 5
|
||||
|
||||
# *****************************************************************************
|
||||
# MSPI pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = MSPI_CE0
|
||||
desc = MSPI chip select.
|
||||
pinnum = 19
|
||||
func_sel = AM_HAL_PIN_19_NCE19
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 6
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = MSPI_CE1
|
||||
desc = MSPI chip select.
|
||||
pinnum = 41
|
||||
func_sel = AM_HAL_PIN_41_NCE41
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 6
|
||||
CEnum = 1
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = MSPI_D0
|
||||
desc = MSPI data 0.
|
||||
pinnum = 22
|
||||
func_sel = AM_HAL_PIN_22_MSPI0
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D1
|
||||
desc = MSPI data 1.
|
||||
pinnum = 26
|
||||
func_sel = AM_HAL_PIN_26_MSPI1
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D2
|
||||
desc = MSPI data 2.
|
||||
pinnum = 4
|
||||
func_sel = AM_HAL_PIN_4_MSPI2
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D3
|
||||
desc = MSPI data 3.
|
||||
pinnum = 23
|
||||
func_sel = AM_HAL_PIN_23_MSPI13
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D4
|
||||
desc = MSPI data 4.
|
||||
pinnum = 0
|
||||
func_sel = AM_HAL_PIN_0_MSPI4
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D5
|
||||
desc = MSPI data 5.
|
||||
pinnum = 1
|
||||
func_sel = AM_HAL_PIN_1_MSPI5
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D6
|
||||
desc = MSPI data 6.
|
||||
pinnum = 2
|
||||
func_sel = AM_HAL_PIN_2_MSPI6
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D7
|
||||
desc = MSPI data 7.
|
||||
pinnum = 3
|
||||
func_sel = AM_HAL_PIN_3_MSPI7
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_SCK
|
||||
desc = MSPI clock.
|
||||
pinnum = 24
|
||||
func_sel = AM_HAL_PIN_24_MSPI8
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
# *****************************************************************************
|
||||
# IOS pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOS_CE
|
||||
desc = I/O Slave chip select.
|
||||
pinnum = 3
|
||||
func_sel = AM_HAL_PIN_3_SLnCE
|
||||
GPinput = true
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOS_MISO
|
||||
desc = I/O Slave SPI MISO signal.
|
||||
pinnum = 2
|
||||
func_sel = AM_HAL_PIN_2_SLMISO
|
||||
drvstrength = 12
|
||||
|
||||
pin
|
||||
name = IOS_MOSI
|
||||
desc = I/O Slave SPI MOSI signal.
|
||||
pinnum = 1
|
||||
func_sel = AM_HAL_PIN_1_SLMOSI
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = IOS_SCK
|
||||
desc = I/O Slave SPI SCK signal.
|
||||
pinnum = 0
|
||||
func_sel = AM_HAL_PIN_0_SLSCK
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = IOS_SCL
|
||||
desc = I/O Slave I2C clock signal.
|
||||
pinnum = 0
|
||||
func_sel = AM_HAL_PIN_0_SLSCL
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = IOS_SDA
|
||||
desc = I/O Slave I2C data signal.
|
||||
pinnum = 1
|
||||
func_sel = AM_HAL_PIN_1_SLSDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
pullup = 1_5K
|
||||
|
||||
# *****************************************************************************
|
||||
# ITM pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = ITM_SWO
|
||||
desc = ITM Serial Wire Output.
|
||||
pinnum = 22
|
||||
func_sel = AM_HAL_PIN_22_SWO
|
||||
drvstrength = 2
|
||||
|
||||
# *****************************************************************************
|
||||
# CORE pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = SWDCK
|
||||
desc = Cortex Serial Wire DCK.
|
||||
pinnum = 20
|
||||
func_sel = AM_HAL_PIN_20_SWDCK
|
||||
|
||||
pin
|
||||
name = SWDIO
|
||||
desc = Cortex Serial Wire DIO.
|
||||
pinnum = 21
|
||||
func_sel = AM_HAL_PIN_21_SWDIO
|
||||
@@ -0,0 +1,151 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Pull in exported paths
|
||||
SDKPATH?=../../../..
|
||||
BOARDPATH?=../..
|
||||
|
||||
TARGET := libam_bsp
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := libam_bsp_gcc
|
||||
CONFIG := bin
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
DEFINES = -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
|
||||
INCLUDES = -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
|
||||
VPATH = ..
|
||||
|
||||
SRC = am_bsp.c
|
||||
SRC += am_bsp_pins.c
|
||||
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP -std=c99 -Wall
|
||||
# Libraries O3 for production, examples O0 for debug.
|
||||
CFLAGS+= -O3
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#### Rules ####
|
||||
all: directories $(CONFIG)/$(TARGET).a
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS)
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS)
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET).a: $(OBJS)
|
||||
@echo " Library $(COMPILERNAME) $@" ;\
|
||||
$(AR) rsvc $@ $(OBJS)
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).a
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories
|
||||
Binary file not shown.
BIN
Binary file not shown.
Binary file not shown.
Binary file not shown.
+6084
File diff suppressed because it is too large
Load Diff
BIN
Binary file not shown.
+6084
File diff suppressed because it is too large
Load Diff
Binary file not shown.
Binary file not shown.
File diff suppressed because it is too large
Load Diff
Binary file not shown.
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,186 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// am_bsp.h
|
||||
//! @file
|
||||
//!
|
||||
//! @brief Functions to aid with configuring the GPIOs.
|
||||
//!
|
||||
//! @addtogroup BSP Board Support Package (BSP)
|
||||
//! @addtogroup apollo3_fpga_bsp BSP for the Apollo3 Hotshot FPGA
|
||||
//! @ingroup BSP
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision v2.0.0 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef AM_BSP_H
|
||||
#define AM_BSP_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp_pins.h"
|
||||
|
||||
//
|
||||
// Make individual includes to not require full port before usage.
|
||||
//#include "am_devices.h"
|
||||
//
|
||||
#include "am_devices_led.h"
|
||||
#include "am_devices_button.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Begin User Modifiable Area
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// LED definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#undef AM_BSP_NUM_LEDS
|
||||
#ifdef AM_BSP_NUM_LEDS
|
||||
extern am_devices_led_t am_bsp_psLEDs[AM_BSP_NUM_LEDS];
|
||||
#endif // AM_BSP_NUM_LEDS
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Apollo3 has two UART instances.
|
||||
// AM_BSP_UART_PRINT_INST should correspond to COM_UART.
|
||||
//
|
||||
#define AM_BSP_UART_IOS_INST 0
|
||||
#define AM_BSP_UART_PRINT_INST 0
|
||||
#define AM_BSP_UART_BOOTLOADER_INST 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End User Modifiable Area
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Print interface type
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_PRINT_INFC_NONE 0
|
||||
#define AM_BSP_PRINT_INFC_SWO 1
|
||||
#define AM_BSP_PRINT_INFC_UART0 2
|
||||
#define AM_BSP_PRINT_INFC_BUFFERED_UART0 3
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Structure containing UART configuration information while it is powered down.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
bool bSaved;
|
||||
uint32_t ui32TxPinNum;
|
||||
uint32_t ui32TxPinCfg;
|
||||
}
|
||||
am_bsp_uart_pwrsave_t;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External data definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern am_bsp_uart_pwrsave_t am_bsp_uart_pwrsave[AM_REG_UART_NUM_MODULES];
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External function definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void am_bsp_low_power_init(void);
|
||||
extern void am_bsp_iom_pins_enable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
|
||||
extern void am_bsp_iom_pins_disable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
|
||||
extern void am_bsp_mspi_pins_enable(am_hal_mspi_device_e eMSPIDevice);
|
||||
extern void am_bsp_mspi_pins_disable(am_hal_mspi_device_e eMSPIDevice);
|
||||
|
||||
extern void am_bsp_ios_pins_enable(uint32_t ui32Module, uint32_t ui32IOSMode); // SparkFun Edge does not expose IO Slave Clock signal, so hiding these functions
|
||||
extern void am_bsp_ios_pins_disable(uint32_t ui32Module, uint32_t ui32IOSMode);
|
||||
|
||||
extern void am_bsp_debug_printf_enable(void);
|
||||
extern void am_bsp_debug_printf_disable(void);
|
||||
|
||||
#ifdef AM_BSP_GPIO_ITM_SWO
|
||||
extern void am_bsp_itm_printf_enable(void);
|
||||
#else
|
||||
extern void am_bsp_itm_printf_enable(uint32_t ui32Pin, am_hal_gpio_pincfg_t sPincfg);
|
||||
#endif
|
||||
extern void am_bsp_itm_string_print(char *pcString);
|
||||
extern void am_bsp_itm_printf_disable(void);
|
||||
|
||||
extern void am_bsp_uart_string_print(char *pcString);
|
||||
extern void am_bsp_uart_printf_enable(void);
|
||||
extern void am_bsp_uart_printf_enable_custom(const am_hal_uart_config_t* p_config);
|
||||
extern void am_bsp_uart_printf_disable(void);
|
||||
|
||||
extern void am_bsp_buffered_uart_printf_enable(void);
|
||||
extern void am_bsp_buffered_uart_service(void);
|
||||
|
||||
extern uint32_t am_bsp_com_uart_transfer(const am_hal_uart_transfer_t *psTransfer);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // AM_BSP_H
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,818 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// am_bsp_pins.c
|
||||
//! @file
|
||||
//!
|
||||
//! @brief BSP pin configuration definitions.
|
||||
//!
|
||||
//! @addtogroup BSP Board Support Package (BSP)
|
||||
//! @addtogroup apollo3_evb_bsp BSP for the Apollo3 Engineering Board
|
||||
//! @ingroup BSP
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "am_bsp.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// COM_UART_TX pin: This pin is the COM_UART transmit pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_48_UART0TX,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// COM_UART_RX pin: This pin is the COM_UART receive pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_49_UART0RX
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_CS pin: I/O Master 0 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_11_NCE11,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 0,
|
||||
.uNCE = 0,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_CS3 pin: I/O Master 0 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_15_NCE15,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 0,
|
||||
.uNCE = 3,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_MISO pin: I/O Master 0 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_6_M0MISO,
|
||||
.uIOMnum = 0
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_7_M0MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 0
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SCK pin: I/O Master 0 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_5_M0SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 0
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SCL pin: I/O Master 0 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_5_M0SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 0
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SDA pin: I/O Master 0 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_6_M0SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 0
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_CS pin: I/O Master 1 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_14_NCE14,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 1,
|
||||
.uNCE = 2,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_MISO pin: I/O Master 1 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_9_M1MISO,
|
||||
.uIOMnum = 1
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_10_M1MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 1
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SCK pin: I/O Master 1 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_8_M1SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 1
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SCL pin: I/O Master 1 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_8_M1SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 1
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SDA pin: I/O Master 1 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_9_M1SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 1
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_CS pin: I/O Master 2 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_15_NCE15,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 2,
|
||||
.uNCE = 3,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_MISO pin: I/O Master 2 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_25_M2MISO,
|
||||
.uIOMnum = 2
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_28_M2MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 2
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SCK pin: I/O Master 2 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_27_M2SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 2
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SCL pin: I/O Master 2 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_27_M2SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 2
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SDA pin: I/O Master 2 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_25_M2SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 2
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_CS pin: I/O Master 3 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_12_NCE12,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 3,
|
||||
.uNCE = 0,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_MISO pin: I/O Master 3 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_43_M3MISO,
|
||||
.uIOMnum = 3
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_38_M3MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 3
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SCK pin: I/O Master 3 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_42_M3SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 3
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SCL pin: I/O Master 3 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_42_M3SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 3
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SDA pin: I/O Master 3 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_43_M3SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 3
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_CS pin: I/O Master 4 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_13_NCE13,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 4,
|
||||
.uNCE = 1,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_MISO pin: I/O Master 4 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_40_M4MISO,
|
||||
.uIOMnum = 4
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_44_M4MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 4
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SCK pin: I/O Master 4 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_39_M4SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 4
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SCL pin: I/O Master 4 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_39_M4SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 4
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SDA pin: I/O Master 4 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_40_M4SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 4
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_CS pin: I/O Master 5 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_16_NCE16,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 5,
|
||||
.uNCE = 0,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_MISO pin: I/O Master 5 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_49_M5MISO,
|
||||
.uIOMnum = 5
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_47_M5MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 5
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SCK pin: I/O Master 5 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_48_M5SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 5
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SCL pin: I/O Master 5 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_48_M5SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 5
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SDA pin: I/O Master 5 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_49_M5SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 5
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_CE0 pin: MSPI chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_19_NCE19,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6,
|
||||
.uNCE = 0,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_CE1 pin: MSPI chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_41_NCE41,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6,
|
||||
.uNCE = 1,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D0 pin: MSPI data 0.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_22_MSPI0,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D1 pin: MSPI data 1.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_26_MSPI1,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D2 pin: MSPI data 2.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_4_MSPI2,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D3 pin: MSPI data 3.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_23_MSPI13,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D4 pin: MSPI data 4.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_0_MSPI4,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D5 pin: MSPI data 5.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_1_MSPI5,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D6 pin: MSPI data 6.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_2_MSPI6,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D7 pin: MSPI data 7.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_3_MSPI7,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_SCK pin: MSPI clock.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_24_MSPI8,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_CE pin: I/O Slave chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_3_SLnCE,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE,
|
||||
.uNCE = 0,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_MISO pin: I/O Slave SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_2_SLMISO,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_MOSI pin: I/O Slave SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_1_SLMOSI,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SCK pin: I/O Slave SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_0_SLSCK,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SCL pin: I/O Slave I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_0_SLSCL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SDA pin: I/O Slave I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_1_SLSDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SWDCK pin: Cortex Serial Wire DCK.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_20_SWDCK
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SWDIO pin: Cortex Serial Wire DIO.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_21_SWDIO
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,551 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// am_bsp_pins.h
|
||||
//! @file
|
||||
//!
|
||||
//! @brief BSP pin configuration definitions.
|
||||
//!
|
||||
//! @addtogroup BSP Board Support Package (BSP)
|
||||
//! @addtogroup apollo3_bsp BSP for the Apollo3 EVB.
|
||||
//! @ingroup BSP
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef AM_BSP_PINS_H
|
||||
#define AM_BSP_PINS_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// COM_UART_TX pin: This pin is the COM_UART transmit pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_COM_UART_TX 48
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// COM_UART_RX pin: This pin is the COM_UART receive pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_COM_UART_RX 49
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_CS pin: I/O Master 0 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_CS 11
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS;
|
||||
#define AM_BSP_GPIO_IOM0_CS_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_CS3 pin: I/O Master 0 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_CS3 15
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3;
|
||||
#define AM_BSP_GPIO_IOM0_CS3_CHNL 3
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_MISO pin: I/O Master 0 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_MISO 6
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_MOSI 7
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SCK pin: I/O Master 0 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_SCK 5
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SCL pin: I/O Master 0 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_SCL 5
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SDA pin: I/O Master 0 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_SDA 6
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_CS pin: I/O Master 1 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_CS 14
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS;
|
||||
#define AM_BSP_GPIO_IOM1_CS_CHNL 2
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_MISO pin: I/O Master 1 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_MISO 9
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_MOSI 10
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SCK pin: I/O Master 1 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_SCK 8
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SCL pin: I/O Master 1 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_SCL 8
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SDA pin: I/O Master 1 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_SDA 9
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_CS pin: I/O Master 2 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_CS 15
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS;
|
||||
#define AM_BSP_GPIO_IOM2_CS_CHNL 3
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_MISO pin: I/O Master 2 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_MISO 25
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_MOSI 28
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SCK pin: I/O Master 2 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_SCK 27
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SCL pin: I/O Master 2 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_SCL 27
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SDA pin: I/O Master 2 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_SDA 25
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_CS pin: I/O Master 3 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_CS 12
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS;
|
||||
#define AM_BSP_GPIO_IOM3_CS_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_MISO pin: I/O Master 3 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_MISO 43
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_MOSI 38
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SCK pin: I/O Master 3 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_SCK 42
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SCL pin: I/O Master 3 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_SCL 42
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SDA pin: I/O Master 3 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_SDA 43
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_CS pin: I/O Master 4 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_CS 13
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS;
|
||||
#define AM_BSP_GPIO_IOM4_CS_CHNL 1
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_MISO pin: I/O Master 4 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_MISO 40
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_MOSI 44
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SCK pin: I/O Master 4 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_SCK 39
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SCL pin: I/O Master 4 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_SCL 39
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SDA pin: I/O Master 4 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_SDA 40
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_CS pin: I/O Master 5 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_CS 16
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS;
|
||||
#define AM_BSP_GPIO_IOM5_CS_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_MISO pin: I/O Master 5 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_MISO 49
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_MOSI 47
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SCK pin: I/O Master 5 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_SCK 48
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SCL pin: I/O Master 5 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_SCL 48
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SDA pin: I/O Master 5 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_SDA 49
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_CE0 pin: MSPI chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_CE0 19
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0;
|
||||
#define AM_BSP_GPIO_MSPI_CE0_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_CE1 pin: MSPI chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_CE1 41
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1;
|
||||
#define AM_BSP_GPIO_MSPI_CE1_CHNL 1
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D0 pin: MSPI data 0.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D0 22
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D1 pin: MSPI data 1.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D1 26
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D2 pin: MSPI data 2.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D2 4
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D3 pin: MSPI data 3.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D3 23
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D4 pin: MSPI data 4.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D4 0
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D5 pin: MSPI data 5.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D5 1
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D6 pin: MSPI data 6.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D6 2
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D7 pin: MSPI data 7.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D7 3
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_SCK pin: MSPI clock.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_SCK 24
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_CE pin: I/O Slave chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_CE 3
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE;
|
||||
#define AM_BSP_GPIO_IOS_CE_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_MISO pin: I/O Slave SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_MISO 2
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_MOSI pin: I/O Slave SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_MOSI 1
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SCK pin: I/O Slave SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_SCK 0
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SCL pin: I/O Slave I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_SCL 0
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SDA pin: I/O Slave I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_SDA 1
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SWDCK pin: Cortex Serial Wire DCK.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_SWDCK 20
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SWDIO pin: Cortex Serial Wire DIO.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_SWDIO 21
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // AM_BSP_PINS_H
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,635 @@
|
||||
# ******************************************************************************
|
||||
# *
|
||||
# Copyright (c) 2018 Ambiq Micro. *
|
||||
# *
|
||||
#*******************************************************************************
|
||||
# *
|
||||
# File: bsp_pins.src *
|
||||
# *
|
||||
# Title: SparkFun Edge2 Board Pin Definitions *
|
||||
# *
|
||||
# Date: 06/14/2019 *
|
||||
# *
|
||||
#*******************************************************************************
|
||||
# *
|
||||
# This file contains descriptors for the various BSP pin definitions. *
|
||||
# After completing the pin descriptors, the file is processed by a *
|
||||
# Python script to generate the appropriate C and header file. *
|
||||
# *
|
||||
# NOTEs: *
|
||||
# - This file should contain NO TAB characters, only spaces. *
|
||||
# - Indentation is required, but the amount of indentation is not critical, *
|
||||
# only the consistency of indentation. *
|
||||
# - Comment lines always begin with a '#' sign. *
|
||||
# - Letter case of keywords (left side of equal) is not important. *
|
||||
# Letter case of the value (right side of equal) is not important when *
|
||||
# processing standard values (e.g. "lo2hi"). However, letter case is *
|
||||
# maintained when used for creating defines. *
|
||||
# *
|
||||
# Keywords: *
|
||||
# All of the following keywords should begin in column 4. *
|
||||
# name The name to be used for the pin. This name will be used as a *
|
||||
# base for generating defines. Each pin name must be unique. *
|
||||
# desc Optional: A description, if provided, will appear in the *
|
||||
# generated header file. *
|
||||
# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. *
|
||||
# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. *
|
||||
# pinnum The pin number for the pin being defined (0-49). *
|
||||
# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. *
|
||||
# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).*
|
||||
# One of: disable, pushpull, opendrain, tristate. *
|
||||
# Also acceptable is a value 0-3, or a macro. *
|
||||
# GPinput Only used if the pin is being defined as GPIO (funcsel=3). *
|
||||
# One of: true, false. *
|
||||
# GPRdZero One of readpin, zero (or true or false). *
|
||||
# intdir One of: none, lo2hi, hi2lo, either. *
|
||||
# Note - does not enable any interrupt. Only configures the *
|
||||
# direction for when it is enabled. *
|
||||
# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. *
|
||||
# 1_5K - 24K: valid on I2C pins. *
|
||||
# weak: Valid for pullups on all other (non-I2C) pins. *
|
||||
# pulldown: Valid for pin 20 only. *
|
||||
# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). *
|
||||
# PowerSw One of: VDD or VSS. *
|
||||
# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). *
|
||||
# *
|
||||
# The following 3 parameters are used when the pin is being defined as a *
|
||||
# chip enable, i.e. for SPI or MSPI. *
|
||||
# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. *
|
||||
# Also acceptable is a macro (e.g. one defined in am_bsp.h). *
|
||||
# CEnum A value from 0-3. *
|
||||
# If a value 0-3, a macro is created of the form: *
|
||||
# #define AM_BSP_<name>_CHNL <CEnum> *
|
||||
# Also acceptable is a macro (e.g. one defined in am_bsp.h), *
|
||||
# in this case no other macro is created. *
|
||||
# CEpol Chip enable polarity, active low or active high. *
|
||||
# One of: LOW (default) or HIGH. *
|
||||
# *
|
||||
# ******************************************************************************
|
||||
|
||||
# *****************************************************************************
|
||||
# COM UART pins (UART0).
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = COM_UART_TX
|
||||
desc = This pin is the COM_UART transmit pin.
|
||||
pinnum = 48
|
||||
func_sel = AM_HAL_PIN_48_UART0TX
|
||||
drvstrength = 2
|
||||
|
||||
pin
|
||||
name = COM_UART_RX
|
||||
desc = This pin is the COM_UART receive pin.
|
||||
pinnum = 49
|
||||
func_sel = AM_HAL_PIN_49_UART0RX
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM0 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM0_CS
|
||||
desc = I/O Master 0 chip select.
|
||||
pinnum = 11
|
||||
func_sel = AM_HAL_PIN_11_NCE11
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 0
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM0_CS3
|
||||
desc = I/O Master 0 chip select.
|
||||
pinnum = 15
|
||||
func_sel = AM_HAL_PIN_15_NCE15
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 0
|
||||
CEnum = 3
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM0_MISO
|
||||
desc = I/O Master 0 SPI MISO signal.
|
||||
pinnum = 6
|
||||
func_sel = AM_HAL_PIN_6_M0MISO
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_MOSI
|
||||
desc = I/O Master 0 SPI MOSI signal.
|
||||
pinnum = 7
|
||||
func_sel = AM_HAL_PIN_7_M0MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_SCK
|
||||
desc = I/O Master 0 SPI SCK signal.
|
||||
pinnum = 5
|
||||
func_sel = AM_HAL_PIN_5_M0SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_SCL
|
||||
desc = I/O Master 0 I2C clock signal.
|
||||
pinnum = 5
|
||||
func_sel = AM_HAL_PIN_5_M0SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_SDA
|
||||
desc = I/O Master 0 I2C data signal.
|
||||
pinnum = 6
|
||||
func_sel = AM_HAL_PIN_6_M0SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 0
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM1 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM1_CS
|
||||
desc = I/O Master 1 chip select.
|
||||
pinnum = 14
|
||||
func_sel = AM_HAL_PIN_14_NCE14
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 1
|
||||
CEnum = 2
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM1_MISO
|
||||
desc = I/O Master 1 SPI MISO signal.
|
||||
pinnum = 9
|
||||
func_sel = AM_HAL_PIN_9_M1MISO
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_MOSI
|
||||
desc = I/O Master 1 SPI MOSI signal.
|
||||
pinnum = 10
|
||||
func_sel = AM_HAL_PIN_10_M1MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_SCK
|
||||
desc = I/O Master 1 SPI SCK signal.
|
||||
pinnum = 8
|
||||
func_sel = AM_HAL_PIN_8_M1SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_SCL
|
||||
desc = I/O Master 1 I2C clock signal.
|
||||
pinnum = 8
|
||||
func_sel = AM_HAL_PIN_8_M1SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_SDA
|
||||
desc = I/O Master 1 I2C data signal.
|
||||
pinnum = 9
|
||||
func_sel = AM_HAL_PIN_9_M1SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 1
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM2 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM2_CS
|
||||
desc = I/O Master 2 chip select.
|
||||
pinnum = 15
|
||||
func_sel = AM_HAL_PIN_15_NCE15
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 2
|
||||
CEnum = 3
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM2_MISO
|
||||
desc = I/O Master 2 SPI MISO signal.
|
||||
pinnum = 25
|
||||
func_sel = AM_HAL_PIN_25_M2MISO
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_MOSI
|
||||
desc = I/O Master 2 SPI MOSI signal.
|
||||
pinnum = 28
|
||||
func_sel = AM_HAL_PIN_28_M2MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_SCK
|
||||
desc = I/O Master 2 SPI SCK signal.
|
||||
pinnum = 27
|
||||
func_sel = AM_HAL_PIN_27_M2SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_SCL
|
||||
desc = I/O Master 2 I2C clock signal.
|
||||
pinnum = 27
|
||||
func_sel = AM_HAL_PIN_27_M2SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_SDA
|
||||
desc = I/O Master 2 I2C data signal.
|
||||
pinnum = 25
|
||||
func_sel = AM_HAL_PIN_25_M2SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 2
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM3 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM3_CS
|
||||
desc = I/O Master 3 chip select.
|
||||
pinnum = 12
|
||||
func_sel = AM_HAL_PIN_12_NCE12
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 3
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM3_MISO
|
||||
desc = I/O Master 3 SPI MISO signal.
|
||||
pinnum = 43
|
||||
func_sel = AM_HAL_PIN_43_M3MISO
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_MOSI
|
||||
desc = I/O Master 3 SPI MOSI signal.
|
||||
pinnum = 38
|
||||
func_sel = AM_HAL_PIN_38_M3MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_SCK
|
||||
desc = I/O Master 3 SPI SCK signal.
|
||||
pinnum = 42
|
||||
func_sel = AM_HAL_PIN_42_M3SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_SCL
|
||||
desc = I/O Master 3 I2C clock signal.
|
||||
pinnum = 42
|
||||
func_sel = AM_HAL_PIN_42_M3SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_SDA
|
||||
desc = I/O Master 3 I2C data signal.
|
||||
pinnum = 43
|
||||
func_sel = AM_HAL_PIN_43_M3SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 3
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM4 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM4_CS
|
||||
desc = I/O Master 4 chip select.
|
||||
pinnum = 13
|
||||
func_sel = AM_HAL_PIN_13_NCE13
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 4
|
||||
CEnum = 1
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM4_MISO
|
||||
desc = I/O Master 4 SPI MISO signal.
|
||||
pinnum = 40
|
||||
func_sel = AM_HAL_PIN_40_M4MISO
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_MOSI
|
||||
desc = I/O Master 4 SPI MOSI signal.
|
||||
pinnum = 44
|
||||
func_sel = AM_HAL_PIN_44_M4MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_SCK
|
||||
desc = I/O Master 4 SPI SCK signal.
|
||||
pinnum = 39
|
||||
func_sel = AM_HAL_PIN_39_M4SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_SCL
|
||||
desc = I/O Master 4 I2C clock signal.
|
||||
pinnum = 39
|
||||
func_sel = AM_HAL_PIN_39_M4SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_SDA
|
||||
desc = I/O Master 4 I2C data signal.
|
||||
pinnum = 40
|
||||
func_sel = AM_HAL_PIN_40_M4SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 4
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM5 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM5_CS
|
||||
desc = I/O Master 5 chip select.
|
||||
pinnum = 16
|
||||
func_sel = AM_HAL_PIN_16_NCE16
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 5
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM5_MISO
|
||||
desc = I/O Master 5 SPI MISO signal.
|
||||
pinnum = 49
|
||||
func_sel = AM_HAL_PIN_49_M5MISO
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_MOSI
|
||||
desc = I/O Master 5 SPI MOSI signal.
|
||||
pinnum = 47
|
||||
func_sel = AM_HAL_PIN_47_M5MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_SCK
|
||||
desc = I/O Master 5 SPI SCK signal.
|
||||
pinnum = 48
|
||||
func_sel = AM_HAL_PIN_48_M5SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_SCL
|
||||
desc = I/O Master 5 I2C clock signal.
|
||||
pinnum = 48
|
||||
func_sel = AM_HAL_PIN_48_M5SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_SDA
|
||||
desc = I/O Master 5 I2C data signal.
|
||||
pinnum = 49
|
||||
func_sel = AM_HAL_PIN_49_M5SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 5
|
||||
|
||||
# *****************************************************************************
|
||||
# MSPI pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = MSPI_CE0
|
||||
desc = MSPI chip select.
|
||||
pinnum = 19
|
||||
func_sel = AM_HAL_PIN_19_NCE19
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 6
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = MSPI_CE1
|
||||
desc = MSPI chip select.
|
||||
pinnum = 41
|
||||
func_sel = AM_HAL_PIN_41_NCE41
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 6
|
||||
CEnum = 1
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = MSPI_D0
|
||||
desc = MSPI data 0.
|
||||
pinnum = 22
|
||||
func_sel = AM_HAL_PIN_22_MSPI0
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D1
|
||||
desc = MSPI data 1.
|
||||
pinnum = 26
|
||||
func_sel = AM_HAL_PIN_26_MSPI1
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D2
|
||||
desc = MSPI data 2.
|
||||
pinnum = 4
|
||||
func_sel = AM_HAL_PIN_4_MSPI2
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D3
|
||||
desc = MSPI data 3.
|
||||
pinnum = 23
|
||||
func_sel = AM_HAL_PIN_23_MSPI13
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D4
|
||||
desc = MSPI data 4.
|
||||
pinnum = 0
|
||||
func_sel = AM_HAL_PIN_0_MSPI4
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D5
|
||||
desc = MSPI data 5.
|
||||
pinnum = 1
|
||||
func_sel = AM_HAL_PIN_1_MSPI5
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D6
|
||||
desc = MSPI data 6.
|
||||
pinnum = 2
|
||||
func_sel = AM_HAL_PIN_2_MSPI6
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D7
|
||||
desc = MSPI data 7.
|
||||
pinnum = 3
|
||||
func_sel = AM_HAL_PIN_3_MSPI7
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_SCK
|
||||
desc = MSPI clock.
|
||||
pinnum = 24
|
||||
func_sel = AM_HAL_PIN_24_MSPI8
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
# *****************************************************************************
|
||||
# IOS pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOS_CE
|
||||
desc = I/O Slave chip select.
|
||||
pinnum = 3
|
||||
func_sel = AM_HAL_PIN_3_SLnCE
|
||||
GPinput = true
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOS_MISO
|
||||
desc = I/O Slave SPI MISO signal.
|
||||
pinnum = 2
|
||||
func_sel = AM_HAL_PIN_2_SLMISO
|
||||
drvstrength = 12
|
||||
|
||||
pin
|
||||
name = IOS_MOSI
|
||||
desc = I/O Slave SPI MOSI signal.
|
||||
pinnum = 1
|
||||
func_sel = AM_HAL_PIN_1_SLMOSI
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = IOS_SCK
|
||||
desc = I/O Slave SPI SCK signal.
|
||||
pinnum = 0
|
||||
func_sel = AM_HAL_PIN_0_SLSCK
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = IOS_SCL
|
||||
desc = I/O Slave I2C clock signal.
|
||||
pinnum = 0
|
||||
func_sel = AM_HAL_PIN_0_SLSCL
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = IOS_SDA
|
||||
desc = I/O Slave I2C data signal.
|
||||
pinnum = 1
|
||||
func_sel = AM_HAL_PIN_1_SLSDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
pullup = 1_5K
|
||||
|
||||
# # *****************************************************************************
|
||||
# # ITM pins.
|
||||
# # *****************************************************************************
|
||||
# pin
|
||||
# name = ITM_SWO
|
||||
# desc = ITM Serial Wire Output.
|
||||
# pinnum = 41
|
||||
# func_sel = AM_HAL_PIN_41_SWO
|
||||
# drvstrength = 2
|
||||
|
||||
# *****************************************************************************
|
||||
# CORE pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = SWDCK
|
||||
desc = Cortex Serial Wire DCK.
|
||||
pinnum = 20
|
||||
func_sel = AM_HAL_PIN_20_SWDCK
|
||||
|
||||
pin
|
||||
name = SWDIO
|
||||
desc = Cortex Serial Wire DIO.
|
||||
pinnum = 21
|
||||
func_sel = AM_HAL_PIN_21_SWDIO
|
||||
@@ -0,0 +1,151 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Pull in exported paths
|
||||
SDKPATH?=../../../..
|
||||
BOARDPATH?=../..
|
||||
|
||||
TARGET := libam_bsp
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := libam_bsp_gcc
|
||||
CONFIG := bin
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
DEFINES = -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
|
||||
INCLUDES = -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
|
||||
VPATH = ..
|
||||
|
||||
SRC = am_bsp.c
|
||||
SRC += am_bsp_pins.c
|
||||
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP -std=c99 -Wall
|
||||
# Libraries O3 for production, examples O0 for debug.
|
||||
CFLAGS+= -O3
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#### Rules ####
|
||||
all: directories $(CONFIG)/$(TARGET).a
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS)
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS)
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET).a: $(OBJS)
|
||||
@echo " Library $(COMPILERNAME) $@" ;\
|
||||
$(AR) rsvc $@ $(OBJS)
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).a
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,266 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// am_bsp.h
|
||||
//! @file
|
||||
//!
|
||||
//! @brief Functions to aid with configuring the GPIOs.
|
||||
//!
|
||||
//! @addtogroup BSP Board Support Package (BSP)
|
||||
//! @addtogroup apollo3_fpga_bsp BSP for the Apollo3 Hotshot FPGA
|
||||
//! @ingroup BSP
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision v2.0.0 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef AM_BSP_H
|
||||
#define AM_BSP_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp_pins.h"
|
||||
|
||||
//
|
||||
// Make individual includes to not require full port before usage.
|
||||
//#include "am_devices.h"
|
||||
//
|
||||
#include "am_devices_led.h"
|
||||
#include "am_devices_button.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Begin User Modifiable Area
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// PDM Microphone
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_PDM_CHANNEL AM_HAL_PDM_CHANNEL_RIGHT
|
||||
#define AM_BSP_PDM_DATA_PIN AM_BSP_GPIO_MIC_DATA
|
||||
#define AM_BSP_PDM_CLOCK_PIN AM_BSP_GPIO_MIC_CLK
|
||||
#define g_AM_BSP_PDM_DATA g_AM_BSP_GPIO_MIC_DATA
|
||||
#define g_AM_BSP_PDM_CLOCK g_AM_BSP_GPIO_MIC_CLK
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Primary SPI Pins
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_PRIM_SPI_IOM 0
|
||||
#define AM_BSP_PRIM_SPI_CLK_PIN AM_BSP_GPIO_IOM0_SCK
|
||||
#define AM_BSP_PRIM_SPI_SDO_PIN AM_BSP_GPIO_IOM0_MOSI
|
||||
#define AM_BSP_PRIM_SPI_SDI_PIN AM_BSP_GPIO_IOM0_MISO
|
||||
#define g_AM_BSP_PRIM_SPI_CLK g_AM_BSP_GPIO_IOM0_SCK
|
||||
#define g_AM_BSP_PRIM_SPI_SDO g_AM_BSP_GPIO_IOM0_SDO
|
||||
#define g_AM_BSP_PRIM_SPI_SDI g_AM_BSP_GPIO_IOM0_SDI
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Primary UART Pins
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_PRIM_UART_TX_PIN AM_BSP_GPIO_COM_UART_TX
|
||||
#define AM_BSP_PRIM_UART_RX_PIN AM_BSP_GPIO_COM_UART_RX
|
||||
#define g_AM_BSP_PRIM_UART_TX g_AM_BSP_GPIO_COM_UART_TX
|
||||
#define g_AM_BSP_PRIM_UART_RX g_AM_BSP_GPIO_COM_UART_RX
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Qwiic Connector.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_QWIIC_I2C_IOM 4
|
||||
#define AM_BSP_QWIIC_I2C_SDA_PIN AM_BSP_GPIO_IOM4_SDA
|
||||
#define AM_BSP_QWIIC_I2C_SCL_PIN AM_BSP_GPIO_IOM4_SCL
|
||||
#define g_AM_BSP_QWIIC_I2C_SDA g_AM_BSP_GPIO_IOM4_SDA
|
||||
#define g_AM_BSP_QWIIC_I2C_SCL g_AM_BSP_GPIO_IOM4_SCL
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Button definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_NUM_BUTTONS 1
|
||||
extern am_devices_button_t am_bsp_psButtons[AM_BSP_NUM_BUTTONS];
|
||||
|
||||
#define AM_BSP_GPIO_BUTTON10 AM_BSP_GPIO_BUTTON0
|
||||
#define AM_BSP_GPIO_SWCH AM_BSP_GPIO_BUTTON0
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// LED definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_NUM_LEDS 1
|
||||
extern am_devices_led_t am_bsp_psLEDs[AM_BSP_NUM_LEDS];
|
||||
|
||||
// LED Device Array Indices
|
||||
#define AM_BSP_LED0 0
|
||||
#define AM_BSP_LED_BLUE AM_BSP_LED0
|
||||
|
||||
// Corresponding GPIO Numbers
|
||||
#define AM_BSP_GPIO_LED AM_BSP_GPIO_LED_BLUE
|
||||
#define AM_BSP_GPIO_LED0 AM_BSP_GPIO_LED_BLUE
|
||||
#define AM_BSP_GPIO_LED18 AM_BSP_GPIO_LED_BLUE
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// PWM_LED peripheral assignments.
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The Artemis Thing Plus PWM LED is pad 26
|
||||
//
|
||||
#define AM_BSP_PIN_PWM_LED AM_BSP_GPIO_LED0
|
||||
#define AM_BSP_PWM_LED_TIMER 0
|
||||
#define AM_BSP_PWM_LED_TIMER_SEG AM_HAL_CTIMER_TIMERB
|
||||
#define AM_BSP_PWM_LED_TIMER_INT AM_HAL_CTIMER_INT_TIMERB0C0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Apollo3 has two UART instances.
|
||||
// AM_BSP_UART_PRINT_INST should correspond to COM_UART.
|
||||
//
|
||||
#define AM_BSP_UART_IOS_INST 0
|
||||
#define AM_BSP_UART_PRINT_INST 0
|
||||
#define AM_BSP_UART_BOOTLOADER_INST 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End User Modifiable Area
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Print interface type
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_PRINT_INFC_NONE 0
|
||||
#define AM_BSP_PRINT_INFC_SWO 1
|
||||
#define AM_BSP_PRINT_INFC_UART0 2
|
||||
#define AM_BSP_PRINT_INFC_BUFFERED_UART0 3
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Structure containing UART configuration information while it is powered down.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
bool bSaved;
|
||||
uint32_t ui32TxPinNum;
|
||||
uint32_t ui32TxPinCfg;
|
||||
}
|
||||
am_bsp_uart_pwrsave_t;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External data definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern am_bsp_uart_pwrsave_t am_bsp_uart_pwrsave[AM_REG_UART_NUM_MODULES];
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External function definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void am_bsp_low_power_init(void);
|
||||
extern void am_bsp_iom_pins_enable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
|
||||
extern void am_bsp_iom_pins_disable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
|
||||
extern void am_bsp_mspi_pins_enable(am_hal_mspi_device_e eMSPIDevice);
|
||||
extern void am_bsp_mspi_pins_disable(am_hal_mspi_device_e eMSPIDevice);
|
||||
|
||||
extern void am_bsp_ios_pins_enable(uint32_t ui32Module, uint32_t ui32IOSMode); // SparkFun Edge does not expose IO Slave Clock signal, so hiding these functions
|
||||
extern void am_bsp_ios_pins_disable(uint32_t ui32Module, uint32_t ui32IOSMode);
|
||||
|
||||
extern void am_bsp_debug_printf_enable(void);
|
||||
extern void am_bsp_debug_printf_disable(void);
|
||||
|
||||
#ifdef AM_BSP_GPIO_ITM_SWO
|
||||
extern void am_bsp_itm_printf_enable(void);
|
||||
#else
|
||||
extern void am_bsp_itm_printf_enable(uint32_t ui32Pin, am_hal_gpio_pincfg_t sPincfg);
|
||||
#endif
|
||||
extern void am_bsp_itm_string_print(char *pcString);
|
||||
extern void am_bsp_itm_printf_disable(void);
|
||||
|
||||
extern void am_bsp_uart_string_print(char *pcString);
|
||||
extern void am_bsp_uart_printf_enable(void);
|
||||
extern void am_bsp_uart_printf_enable_custom(const am_hal_uart_config_t* p_config);
|
||||
extern void am_bsp_uart_printf_disable(void);
|
||||
|
||||
extern void am_bsp_buffered_uart_printf_enable(void);
|
||||
extern void am_bsp_buffered_uart_service(void);
|
||||
|
||||
extern uint32_t am_bsp_com_uart_transfer(const am_hal_uart_transfer_t *psTransfer);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // AM_BSP_H
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,873 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// am_bsp_pins.c
|
||||
//! @file
|
||||
//!
|
||||
//! @brief BSP pin configuration definitions.
|
||||
//!
|
||||
//! @addtogroup BSP Board Support Package (BSP)
|
||||
//! @addtogroup apollo3_evb_bsp BSP for the Apollo3 Engineering Board
|
||||
//! @ingroup BSP
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "am_bsp.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MIC_DATA pin: Data line for PDM microphones.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_36_PDMDATA
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MIC_CLK pin: Clock line for PDM microphones.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_37_PDMCLK
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// LED_BLUE pin: The BLUE LED labelled 18.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_26_GPIO,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// BUTTON0 pin: Labeled 10 on the Artemis Thing Plus.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BUTTON0 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_14_GPIO,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// COM_UART_TX pin: This pin is the COM_UART transmit pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_48_UART0TX,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// COM_UART_RX pin: This pin is the COM_UART receive pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_49_UART0RX
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_CS pin: I/O Master 0 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_11_NCE11,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 0,
|
||||
.uNCE = 0,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_CS3 pin: I/O Master 0 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_15_NCE15,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 0,
|
||||
.uNCE = 3,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_MISO pin: I/O Master 0 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_6_M0MISO,
|
||||
.uIOMnum = 0
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_7_M0MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 0
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SCK pin: I/O Master 0 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_5_M0SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 0
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SCL pin: I/O Master 0 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_5_M0SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 0
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SDA pin: I/O Master 0 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_6_M0SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 0
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_CS pin: I/O Master 1 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_14_NCE14,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 1,
|
||||
.uNCE = 2,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_MISO pin: I/O Master 1 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_9_M1MISO,
|
||||
.uIOMnum = 1
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_10_M1MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 1
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SCK pin: I/O Master 1 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_8_M1SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 1
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SCL pin: I/O Master 1 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_8_M1SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 1
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SDA pin: I/O Master 1 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_9_M1SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 1
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_CS pin: I/O Master 2 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_15_NCE15,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 2,
|
||||
.uNCE = 3,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_MISO pin: I/O Master 2 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_25_M2MISO,
|
||||
.uIOMnum = 2
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_28_M2MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 2
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SCK pin: I/O Master 2 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_27_M2SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 2
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SCL pin: I/O Master 2 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_27_M2SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 2
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SDA pin: I/O Master 2 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_25_M2SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 2
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_CS pin: I/O Master 3 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_12_NCE12,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 3,
|
||||
.uNCE = 0,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_MISO pin: I/O Master 3 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_43_M3MISO,
|
||||
.uIOMnum = 3
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_38_M3MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 3
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SCK pin: I/O Master 3 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_42_M3SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 3
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SCL pin: I/O Master 3 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_42_M3SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 3
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SDA pin: I/O Master 3 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_43_M3SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 3
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_CS pin: I/O Master 4 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_13_NCE13,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 4,
|
||||
.uNCE = 1,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_MISO pin: I/O Master 4 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_40_M4MISO,
|
||||
.uIOMnum = 4
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_44_M4MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 4
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SCK pin: I/O Master 4 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_39_M4SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 4
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SCL pin: I/O Master 4 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_39_M4SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 4
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SDA pin: I/O Master 4 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_40_M4SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 4
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_CS pin: I/O Master 5 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_16_NCE16,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 5,
|
||||
.uNCE = 0,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_MISO pin: I/O Master 5 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_49_M5MISO,
|
||||
.uIOMnum = 5
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_47_M5MOSI,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 5
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SCK pin: I/O Master 5 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_48_M5SCK,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.uIOMnum = 5
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SCL pin: I/O Master 5 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_48_M5SCL,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 5
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SDA pin: I/O Master 5 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_49_M5SDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
|
||||
.uIOMnum = 5
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_CE0 pin: MSPI chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_19_NCE19,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6,
|
||||
.uNCE = 0,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_CE1 pin: MSPI chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_41_NCE41,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6,
|
||||
.uNCE = 1,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D0 pin: MSPI data 0.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_22_MSPI0,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D1 pin: MSPI data 1.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_26_MSPI1,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D2 pin: MSPI data 2.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_4_MSPI2,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D3 pin: MSPI data 3.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_23_MSPI13,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D4 pin: MSPI data 4.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_0_MSPI4,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D5 pin: MSPI data 5.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_1_MSPI5,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D6 pin: MSPI data 6.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_2_MSPI6,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D7 pin: MSPI data 7.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7 =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_3_MSPI7,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_SCK pin: MSPI clock.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_24_MSPI8,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.uIOMnum = 6
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_CE pin: I/O Slave chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_3_SLnCE,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE,
|
||||
.uNCE = 0,
|
||||
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_MISO pin: I/O Slave SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_2_SLMISO,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_MOSI pin: I/O Slave SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_1_SLMOSI,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SCK pin: I/O Slave SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_0_SLSCK,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SCL pin: I/O Slave I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_0_SLSCL,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SDA pin: I/O Slave I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_1_SLSDAWIR3,
|
||||
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// ITM_SWO pin: ITM Serial Wire Output.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_ITM_SWO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_33_SWO,
|
||||
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SWDCK pin: Cortex Serial Wire DCK.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_20_SWDCK
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SWDIO pin: Cortex Serial Wire DIO.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO =
|
||||
{
|
||||
.uFuncSel = AM_HAL_PIN_21_SWDIO
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,591 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// am_bsp_pins.h
|
||||
//! @file
|
||||
//!
|
||||
//! @brief BSP pin configuration definitions.
|
||||
//!
|
||||
//! @addtogroup BSP Board Support Package (BSP)
|
||||
//! @addtogroup apollo3_bsp BSP for the Apollo3 EVB.
|
||||
//! @ingroup BSP
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef AM_BSP_PINS_H
|
||||
#define AM_BSP_PINS_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MIC_DATA pin: Data line for PDM microphones.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MIC_DATA 36
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MIC_CLK pin: Clock line for PDM microphones.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MIC_CLK 37
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// LED_BLUE pin: The BLUE LED labelled 18.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_LED_BLUE 26
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// BUTTON0 pin: Labeled 10 on the Artemis Thing Plus.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_BUTTON0 14
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BUTTON0;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// COM_UART_TX pin: This pin is the COM_UART transmit pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_COM_UART_TX 48
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// COM_UART_RX pin: This pin is the COM_UART receive pin.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_COM_UART_RX 49
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_CS pin: I/O Master 0 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_CS 11
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS;
|
||||
#define AM_BSP_GPIO_IOM0_CS_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_CS3 pin: I/O Master 0 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_CS3 15
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3;
|
||||
#define AM_BSP_GPIO_IOM0_CS3_CHNL 3
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_MISO pin: I/O Master 0 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_MISO 6
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_MOSI 7
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SCK pin: I/O Master 0 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_SCK 5
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SCL pin: I/O Master 0 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_SCL 5
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM0_SDA pin: I/O Master 0 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM0_SDA 6
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_CS pin: I/O Master 1 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_CS 14
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS;
|
||||
#define AM_BSP_GPIO_IOM1_CS_CHNL 2
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_MISO pin: I/O Master 1 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_MISO 9
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_MOSI 10
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SCK pin: I/O Master 1 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_SCK 8
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SCL pin: I/O Master 1 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_SCL 8
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM1_SDA pin: I/O Master 1 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM1_SDA 9
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_CS pin: I/O Master 2 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_CS 15
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS;
|
||||
#define AM_BSP_GPIO_IOM2_CS_CHNL 3
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_MISO pin: I/O Master 2 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_MISO 25
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_MOSI 28
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SCK pin: I/O Master 2 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_SCK 27
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SCL pin: I/O Master 2 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_SCL 27
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM2_SDA pin: I/O Master 2 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM2_SDA 25
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_CS pin: I/O Master 3 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_CS 12
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS;
|
||||
#define AM_BSP_GPIO_IOM3_CS_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_MISO pin: I/O Master 3 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_MISO 43
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_MOSI 38
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SCK pin: I/O Master 3 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_SCK 42
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SCL pin: I/O Master 3 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_SCL 42
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM3_SDA pin: I/O Master 3 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM3_SDA 43
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_CS pin: I/O Master 4 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_CS 13
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS;
|
||||
#define AM_BSP_GPIO_IOM4_CS_CHNL 1
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_MISO pin: I/O Master 4 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_MISO 40
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_MOSI 44
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SCK pin: I/O Master 4 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_SCK 39
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SCL pin: I/O Master 4 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_SCL 39
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM4_SDA pin: I/O Master 4 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM4_SDA 40
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_CS pin: I/O Master 5 chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_CS 16
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS;
|
||||
#define AM_BSP_GPIO_IOM5_CS_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_MISO pin: I/O Master 5 SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_MISO 49
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_MOSI 47
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SCK pin: I/O Master 5 SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_SCK 48
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SCL pin: I/O Master 5 I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_SCL 48
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOM5_SDA pin: I/O Master 5 I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOM5_SDA 49
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_CE0 pin: MSPI chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_CE0 19
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0;
|
||||
#define AM_BSP_GPIO_MSPI_CE0_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_CE1 pin: MSPI chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_CE1 41
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1;
|
||||
#define AM_BSP_GPIO_MSPI_CE1_CHNL 1
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D0 pin: MSPI data 0.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D0 22
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D1 pin: MSPI data 1.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D1 26
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D2 pin: MSPI data 2.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D2 4
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D3 pin: MSPI data 3.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D3 23
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D4 pin: MSPI data 4.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D4 0
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D5 pin: MSPI data 5.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D5 1
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D6 pin: MSPI data 6.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D6 2
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_D7 pin: MSPI data 7.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_D7 3
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// MSPI_SCK pin: MSPI clock.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_MSPI_SCK 24
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_CE pin: I/O Slave chip select.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_CE 3
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE;
|
||||
#define AM_BSP_GPIO_IOS_CE_CHNL 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_MISO pin: I/O Slave SPI MISO signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_MISO 2
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_MOSI pin: I/O Slave SPI MOSI signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_MOSI 1
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SCK pin: I/O Slave SPI SCK signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_SCK 0
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SCL pin: I/O Slave I2C clock signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_SCL 0
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// IOS_SDA pin: I/O Slave I2C data signal.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_IOS_SDA 1
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// ITM_SWO pin: ITM Serial Wire Output.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_ITM_SWO 33
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_ITM_SWO;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SWDCK pin: Cortex Serial Wire DCK.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_SWDCK 20
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SWDIO pin: Cortex Serial Wire DIO.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_GPIO_SWDIO 21
|
||||
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // AM_BSP_PINS_H
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,671 @@
|
||||
# ******************************************************************************
|
||||
# *
|
||||
# Copyright (c) 2018 Ambiq Micro. *
|
||||
# *
|
||||
#*******************************************************************************
|
||||
# *
|
||||
# File: bsp_pins.src *
|
||||
# *
|
||||
# Title: SparkFun Edge2 Board Pin Definitions *
|
||||
# *
|
||||
# Date: 06/14/2019 *
|
||||
# *
|
||||
#*******************************************************************************
|
||||
# *
|
||||
# This file contains descriptors for the various BSP pin definitions. *
|
||||
# After completing the pin descriptors, the file is processed by a *
|
||||
# Python script to generate the appropriate C and header file. *
|
||||
# *
|
||||
# NOTEs: *
|
||||
# - This file should contain NO TAB characters, only spaces. *
|
||||
# - Indentation is required, but the amount of indentation is not critical, *
|
||||
# only the consistency of indentation. *
|
||||
# - Comment lines always begin with a '#' sign. *
|
||||
# - Letter case of keywords (left side of equal) is not important. *
|
||||
# Letter case of the value (right side of equal) is not important when *
|
||||
# processing standard values (e.g. "lo2hi"). However, letter case is *
|
||||
# maintained when used for creating defines. *
|
||||
# *
|
||||
# Keywords: *
|
||||
# All of the following keywords should begin in column 4. *
|
||||
# name The name to be used for the pin. This name will be used as a *
|
||||
# base for generating defines. Each pin name must be unique. *
|
||||
# desc Optional: A description, if provided, will appear in the *
|
||||
# generated header file. *
|
||||
# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. *
|
||||
# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. *
|
||||
# pinnum The pin number for the pin being defined (0-49). *
|
||||
# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. *
|
||||
# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).*
|
||||
# One of: disable, pushpull, opendrain, tristate. *
|
||||
# Also acceptable is a value 0-3, or a macro. *
|
||||
# GPinput Only used if the pin is being defined as GPIO (funcsel=3). *
|
||||
# One of: true, false. *
|
||||
# GPRdZero One of readpin, zero (or true or false). *
|
||||
# intdir One of: none, lo2hi, hi2lo, either. *
|
||||
# Note - does not enable any interrupt. Only configures the *
|
||||
# direction for when it is enabled. *
|
||||
# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. *
|
||||
# 1_5K - 24K: valid on I2C pins. *
|
||||
# weak: Valid for pullups on all other (non-I2C) pins. *
|
||||
# pulldown: Valid for pin 20 only. *
|
||||
# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). *
|
||||
# PowerSw One of: VDD or VSS. *
|
||||
# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). *
|
||||
# *
|
||||
# The following 3 parameters are used when the pin is being defined as a *
|
||||
# chip enable, i.e. for SPI or MSPI. *
|
||||
# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. *
|
||||
# Also acceptable is a macro (e.g. one defined in am_bsp.h). *
|
||||
# CEnum A value from 0-3. *
|
||||
# If a value 0-3, a macro is created of the form: *
|
||||
# #define AM_BSP_<name>_CHNL <CEnum> *
|
||||
# Also acceptable is a macro (e.g. one defined in am_bsp.h), *
|
||||
# in this case no other macro is created. *
|
||||
# CEpol Chip enable polarity, active low or active high. *
|
||||
# One of: LOW (default) or HIGH. *
|
||||
# *
|
||||
# ******************************************************************************
|
||||
|
||||
# *****************************************************************************
|
||||
# PDM Microphone Lines
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = MIC_DATA
|
||||
desc = Data line for PDM microphones
|
||||
pinnum = 36
|
||||
func_sel = AM_HAL_PIN_36_PDMDATA
|
||||
|
||||
pin
|
||||
name = MIC_CLK
|
||||
desc = Clock line for PDM microphones
|
||||
pinnum = 37
|
||||
func_sel = AM_HAL_PIN_37_PDMCLK
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# LEDs and buttons
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = LED_BLUE
|
||||
desc = The BLUE LED labelled 18
|
||||
pinnum = 26
|
||||
func_sel = AM_HAL_PIN_26_GPIO
|
||||
drvstrength = 12
|
||||
|
||||
pin
|
||||
name = BUTTON0
|
||||
desc = Labeled 10 on the Artemis Thing Plus.
|
||||
pinnum = 14
|
||||
func_sel = AM_HAL_PIN_14_GPIO
|
||||
drvstrength = 2
|
||||
pullup = 1_5K
|
||||
GPinput = true
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# COM UART pins (UART0).
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = COM_UART_TX
|
||||
desc = This pin is the COM_UART transmit pin.
|
||||
pinnum = 48
|
||||
func_sel = AM_HAL_PIN_48_UART0TX
|
||||
drvstrength = 2
|
||||
|
||||
pin
|
||||
name = COM_UART_RX
|
||||
desc = This pin is the COM_UART receive pin.
|
||||
pinnum = 49
|
||||
func_sel = AM_HAL_PIN_49_UART0RX
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM0 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM0_CS
|
||||
desc = I/O Master 0 chip select.
|
||||
pinnum = 11
|
||||
func_sel = AM_HAL_PIN_11_NCE11
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 0
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM0_CS3
|
||||
desc = I/O Master 0 chip select.
|
||||
pinnum = 15
|
||||
func_sel = AM_HAL_PIN_15_NCE15
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 0
|
||||
CEnum = 3
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM0_MISO
|
||||
desc = I/O Master 0 SPI MISO signal.
|
||||
pinnum = 6
|
||||
func_sel = AM_HAL_PIN_6_M0MISO
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_MOSI
|
||||
desc = I/O Master 0 SPI MOSI signal.
|
||||
pinnum = 7
|
||||
func_sel = AM_HAL_PIN_7_M0MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_SCK
|
||||
desc = I/O Master 0 SPI SCK signal.
|
||||
pinnum = 5
|
||||
func_sel = AM_HAL_PIN_5_M0SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_SCL
|
||||
desc = I/O Master 0 I2C clock signal.
|
||||
pinnum = 5
|
||||
func_sel = AM_HAL_PIN_5_M0SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 0
|
||||
|
||||
pin
|
||||
name = IOM0_SDA
|
||||
desc = I/O Master 0 I2C data signal.
|
||||
pinnum = 6
|
||||
func_sel = AM_HAL_PIN_6_M0SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 0
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM1 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM1_CS
|
||||
desc = I/O Master 1 chip select.
|
||||
pinnum = 14
|
||||
func_sel = AM_HAL_PIN_14_NCE14
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 1
|
||||
CEnum = 2
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM1_MISO
|
||||
desc = I/O Master 1 SPI MISO signal.
|
||||
pinnum = 9
|
||||
func_sel = AM_HAL_PIN_9_M1MISO
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_MOSI
|
||||
desc = I/O Master 1 SPI MOSI signal.
|
||||
pinnum = 10
|
||||
func_sel = AM_HAL_PIN_10_M1MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_SCK
|
||||
desc = I/O Master 1 SPI SCK signal.
|
||||
pinnum = 8
|
||||
func_sel = AM_HAL_PIN_8_M1SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_SCL
|
||||
desc = I/O Master 1 I2C clock signal.
|
||||
pinnum = 8
|
||||
func_sel = AM_HAL_PIN_8_M1SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 1
|
||||
|
||||
pin
|
||||
name = IOM1_SDA
|
||||
desc = I/O Master 1 I2C data signal.
|
||||
pinnum = 9
|
||||
func_sel = AM_HAL_PIN_9_M1SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 1
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM2 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM2_CS
|
||||
desc = I/O Master 2 chip select.
|
||||
pinnum = 15
|
||||
func_sel = AM_HAL_PIN_15_NCE15
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 2
|
||||
CEnum = 3
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM2_MISO
|
||||
desc = I/O Master 2 SPI MISO signal.
|
||||
pinnum = 25
|
||||
func_sel = AM_HAL_PIN_25_M2MISO
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_MOSI
|
||||
desc = I/O Master 2 SPI MOSI signal.
|
||||
pinnum = 28
|
||||
func_sel = AM_HAL_PIN_28_M2MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_SCK
|
||||
desc = I/O Master 2 SPI SCK signal.
|
||||
pinnum = 27
|
||||
func_sel = AM_HAL_PIN_27_M2SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_SCL
|
||||
desc = I/O Master 2 I2C clock signal.
|
||||
pinnum = 27
|
||||
func_sel = AM_HAL_PIN_27_M2SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 2
|
||||
|
||||
pin
|
||||
name = IOM2_SDA
|
||||
desc = I/O Master 2 I2C data signal.
|
||||
pinnum = 25
|
||||
func_sel = AM_HAL_PIN_25_M2SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 2
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM3 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM3_CS
|
||||
desc = I/O Master 3 chip select.
|
||||
pinnum = 12
|
||||
func_sel = AM_HAL_PIN_12_NCE12
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 3
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM3_MISO
|
||||
desc = I/O Master 3 SPI MISO signal.
|
||||
pinnum = 43
|
||||
func_sel = AM_HAL_PIN_43_M3MISO
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_MOSI
|
||||
desc = I/O Master 3 SPI MOSI signal.
|
||||
pinnum = 38
|
||||
func_sel = AM_HAL_PIN_38_M3MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_SCK
|
||||
desc = I/O Master 3 SPI SCK signal.
|
||||
pinnum = 42
|
||||
func_sel = AM_HAL_PIN_42_M3SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_SCL
|
||||
desc = I/O Master 3 I2C clock signal.
|
||||
pinnum = 42
|
||||
func_sel = AM_HAL_PIN_42_M3SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 3
|
||||
|
||||
pin
|
||||
name = IOM3_SDA
|
||||
desc = I/O Master 3 I2C data signal.
|
||||
pinnum = 43
|
||||
func_sel = AM_HAL_PIN_43_M3SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 3
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM4 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM4_CS
|
||||
desc = I/O Master 4 chip select.
|
||||
pinnum = 13
|
||||
func_sel = AM_HAL_PIN_13_NCE13
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 4
|
||||
CEnum = 1
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM4_MISO
|
||||
desc = I/O Master 4 SPI MISO signal.
|
||||
pinnum = 40
|
||||
func_sel = AM_HAL_PIN_40_M4MISO
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_MOSI
|
||||
desc = I/O Master 4 SPI MOSI signal.
|
||||
pinnum = 44
|
||||
func_sel = AM_HAL_PIN_44_M4MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_SCK
|
||||
desc = I/O Master 4 SPI SCK signal.
|
||||
pinnum = 39
|
||||
func_sel = AM_HAL_PIN_39_M4SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_SCL
|
||||
desc = I/O Master 4 I2C clock signal.
|
||||
pinnum = 39
|
||||
func_sel = AM_HAL_PIN_39_M4SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 4
|
||||
|
||||
pin
|
||||
name = IOM4_SDA
|
||||
desc = I/O Master 4 I2C data signal.
|
||||
pinnum = 40
|
||||
func_sel = AM_HAL_PIN_40_M4SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 4
|
||||
|
||||
# *****************************************************************************
|
||||
# IOM5 pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOM5_CS
|
||||
desc = I/O Master 5 chip select.
|
||||
pinnum = 16
|
||||
func_sel = AM_HAL_PIN_16_NCE16
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 5
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOM5_MISO
|
||||
desc = I/O Master 5 SPI MISO signal.
|
||||
pinnum = 49
|
||||
func_sel = AM_HAL_PIN_49_M5MISO
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_MOSI
|
||||
desc = I/O Master 5 SPI MOSI signal.
|
||||
pinnum = 47
|
||||
func_sel = AM_HAL_PIN_47_M5MOSI
|
||||
drvstrength = 12
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_SCK
|
||||
desc = I/O Master 5 SPI SCK signal.
|
||||
pinnum = 48
|
||||
func_sel = AM_HAL_PIN_48_M5SCK
|
||||
drvstrength = 12
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_SCL
|
||||
desc = I/O Master 5 I2C clock signal.
|
||||
pinnum = 48
|
||||
func_sel = AM_HAL_PIN_48_M5SCL
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 5
|
||||
|
||||
pin
|
||||
name = IOM5_SDA
|
||||
desc = I/O Master 5 I2C data signal.
|
||||
pinnum = 49
|
||||
func_sel = AM_HAL_PIN_49_M5SDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
drvstrength = 12
|
||||
pullup = 1_5K
|
||||
IOMnum = 5
|
||||
|
||||
# *****************************************************************************
|
||||
# MSPI pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = MSPI_CE0
|
||||
desc = MSPI chip select.
|
||||
pinnum = 19
|
||||
func_sel = AM_HAL_PIN_19_NCE19
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 6
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = MSPI_CE1
|
||||
desc = MSPI chip select.
|
||||
pinnum = 41
|
||||
func_sel = AM_HAL_PIN_41_NCE41
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
GPOutcfg = pushpull
|
||||
GPinput = false
|
||||
IOMnum = 6
|
||||
CEnum = 1
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = MSPI_D0
|
||||
desc = MSPI data 0.
|
||||
pinnum = 22
|
||||
func_sel = AM_HAL_PIN_22_MSPI0
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D1
|
||||
desc = MSPI data 1.
|
||||
pinnum = 26
|
||||
func_sel = AM_HAL_PIN_26_MSPI1
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D2
|
||||
desc = MSPI data 2.
|
||||
pinnum = 4
|
||||
func_sel = AM_HAL_PIN_4_MSPI2
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D3
|
||||
desc = MSPI data 3.
|
||||
pinnum = 23
|
||||
func_sel = AM_HAL_PIN_23_MSPI13
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D4
|
||||
desc = MSPI data 4.
|
||||
pinnum = 0
|
||||
func_sel = AM_HAL_PIN_0_MSPI4
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D5
|
||||
desc = MSPI data 5.
|
||||
pinnum = 1
|
||||
func_sel = AM_HAL_PIN_1_MSPI5
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D6
|
||||
desc = MSPI data 6.
|
||||
pinnum = 2
|
||||
func_sel = AM_HAL_PIN_2_MSPI6
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_D7
|
||||
desc = MSPI data 7.
|
||||
pinnum = 3
|
||||
func_sel = AM_HAL_PIN_3_MSPI7
|
||||
drvstrength = 8
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
pin
|
||||
name = MSPI_SCK
|
||||
desc = MSPI clock.
|
||||
pinnum = 24
|
||||
func_sel = AM_HAL_PIN_24_MSPI8
|
||||
drvstrength = 12
|
||||
intdir = lo2hi
|
||||
IOMnum = 6
|
||||
|
||||
# *****************************************************************************
|
||||
# IOS pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = IOS_CE
|
||||
desc = I/O Slave chip select.
|
||||
pinnum = 3
|
||||
func_sel = AM_HAL_PIN_3_SLnCE
|
||||
GPinput = true
|
||||
CEnum = 0
|
||||
CEpol = low
|
||||
|
||||
pin
|
||||
name = IOS_MISO
|
||||
desc = I/O Slave SPI MISO signal.
|
||||
pinnum = 2
|
||||
func_sel = AM_HAL_PIN_2_SLMISO
|
||||
drvstrength = 12
|
||||
|
||||
pin
|
||||
name = IOS_MOSI
|
||||
desc = I/O Slave SPI MOSI signal.
|
||||
pinnum = 1
|
||||
func_sel = AM_HAL_PIN_1_SLMOSI
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = IOS_SCK
|
||||
desc = I/O Slave SPI SCK signal.
|
||||
pinnum = 0
|
||||
func_sel = AM_HAL_PIN_0_SLSCK
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = IOS_SCL
|
||||
desc = I/O Slave I2C clock signal.
|
||||
pinnum = 0
|
||||
func_sel = AM_HAL_PIN_0_SLSCL
|
||||
GPinput = true
|
||||
|
||||
pin
|
||||
name = IOS_SDA
|
||||
desc = I/O Slave I2C data signal.
|
||||
pinnum = 1
|
||||
func_sel = AM_HAL_PIN_1_SLSDAWIR3
|
||||
GPOutcfg = opendrain
|
||||
pullup = 1_5K
|
||||
|
||||
# *****************************************************************************
|
||||
# ITM pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = ITM_SWO
|
||||
desc = ITM Serial Wire Output.
|
||||
pinnum = 33
|
||||
func_sel = AM_HAL_PIN_33_SWO
|
||||
drvstrength = 2
|
||||
|
||||
# *****************************************************************************
|
||||
# CORE pins.
|
||||
# *****************************************************************************
|
||||
pin
|
||||
name = SWDCK
|
||||
desc = Cortex Serial Wire DCK.
|
||||
pinnum = 20
|
||||
func_sel = AM_HAL_PIN_20_SWDCK
|
||||
|
||||
pin
|
||||
name = SWDIO
|
||||
desc = Cortex Serial Wire DIO.
|
||||
pinnum = 21
|
||||
func_sel = AM_HAL_PIN_21_SWDIO
|
||||
@@ -0,0 +1,151 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Pull in exported paths
|
||||
SDKPATH?=../../../..
|
||||
BOARDPATH?=../..
|
||||
|
||||
TARGET := libam_bsp
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := libam_bsp_gcc
|
||||
CONFIG := bin
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
DEFINES = -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
|
||||
INCLUDES = -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
|
||||
VPATH = ..
|
||||
|
||||
SRC = am_bsp.c
|
||||
SRC += am_bsp_pins.c
|
||||
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP -std=c99 -Wall
|
||||
# Libraries O3 for production, examples O0 for debug.
|
||||
CFLAGS+= -O3
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#### Rules ####
|
||||
all: directories $(CONFIG)/$(TARGET).a
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS)
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS)
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET).a: $(OBJS)
|
||||
@echo " Library $(COMPILERNAME) $@" ;\
|
||||
$(AR) rsvc $@ $(OBJS)
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).a
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories
|
||||
BIN
Binary file not shown.
@@ -0,0 +1,225 @@
|
||||
How to Regenerate Existing BSPs
|
||||
===============================
|
||||
After making changes to the BSP source files (```am_bsp.h```, ```am_bsp.c```, and ```bsp_pins.src```) you will still need to ensure that the ```libam_bsp.a``` archive is updated to reflect this (if this file exists then the build process simply uses it instead of compiling BSP sources). The simplest way is to navigate to the root of this repo and run ```./common/tools_sfe/scripts/regen_bsps.sh```
|
||||
|
||||
**all these automated methods rely on this repo being placed in the root directory of the AmbiqSuite SDK (alternately you may employ an environment variable {$AMSDK} pointing at the root) and having the prerequisite tools available**
|
||||
|
||||
How to Generate New BSP Files
|
||||
=============================
|
||||
|
||||
A Board Support Package is designed to provide a uniform interface to the hardware capabilities across boards, thus enabling users to easily identify what hardware is being used and increasing the compatibility of example applications.
|
||||
|
||||
To do so the BSP provides a listing of pin names and corresponding pin configurations, as well as several uniform API calls.
|
||||
|
||||
|
||||
am_bsp_pins.h + am_bsp_pins.c
|
||||
=============================
|
||||
|
||||
These files are used to create named configurations (and pins numbers) that represent what's on the board. The files are automatically generated by the ```pinconfig.py``` script. This uses pin definitions that the user sets up in the ```bsp_pins.src``` file which helps reduce maintenance effort. An example usage is (from the root directory of this repo):
|
||||
|
||||
```bash
|
||||
python common/bsp_pinconfig/pinconfig.py ${board}/bsp/bsp_pins.src ${selector} > ${board}/bsp/am_bsp_pins.${selector}
|
||||
```
|
||||
Where ```${board}``` is the directory for the board whose BSP is being generated and ```${selector}``` is one of ```c``` or ```h``` (which tells the script which file to generate)
|
||||
|
||||
|
||||
am_bsp.h + am_bsp.c
|
||||
===================
|
||||
|
||||
This compilation unit uses the pin definitions (above) to describe the common interface. It has a standard structure and contents, but it is also possible to add additional board-specific macros.
|
||||
|
||||
**The Header**
|
||||
The header is standardized and changes to it should be minimal
|
||||
Includes:
|
||||
- License + Copyright
|
||||
- Include guards (opening)
|
||||
- Includes
|
||||
- stdint
|
||||
- stdbool
|
||||
- am_mcu_apollo
|
||||
- am_bsp_pins
|
||||
- am_devices_led
|
||||
- am_devices_button
|
||||
- C++ guards (opening)
|
||||
|
||||
``` c
|
||||
//*****************************************************************************
|
||||
//
|
||||
// am_bsp.h
|
||||
//! @file
|
||||
//!
|
||||
//! @brief Functions to aid with configuring the GPIOs.
|
||||
//!
|
||||
//! @addtogroup BSP Board Support Package (BSP)
|
||||
//! @addtogroup apollo3_fpga_bsp BSP for the Apollo3 Hotshot FPGA
|
||||
//! @ingroup BSP
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision v2.0.0 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef AM_BSP_H
|
||||
#define AM_BSP_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp_pins.h"
|
||||
|
||||
//
|
||||
// Make individual includes to not require full port before usage.
|
||||
//#include "am_devices.h"
|
||||
//
|
||||
#include "am_devices_led.h"
|
||||
#include "am_devices_button.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Begin User Modifiable Area
|
||||
//
|
||||
//*****************************************************************************
|
||||
```
|
||||
|
||||
**The User Modifiable Area**
|
||||
Contents of this section are free reign. Nothing is required. Possible elements include:
|
||||
- Aliases for pin names
|
||||
- Definitions for HW not captured by the bsp_pins.src file
|
||||
|
||||
**Print Interface Area**
|
||||
Todo: explain what this area is about
|
||||
```c
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End User Modifiable Area
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Print interface type
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_BSP_PRINT_INFC_NONE 0
|
||||
#define AM_BSP_PRINT_INFC_SWO 1
|
||||
#define AM_BSP_PRINT_INFC_UART0 2
|
||||
#define AM_BSP_PRINT_INFC_BUFFERED_UART0 3
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Structure containing UART configuration information while it is powered down.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
bool bSaved;
|
||||
uint32_t ui32TxPinNum;
|
||||
uint32_t ui32TxPinCfg;
|
||||
}
|
||||
am_bsp_uart_pwrsave_t;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External data definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern am_bsp_uart_pwrsave_t am_bsp_uart_pwrsave[AM_REG_UART_NUM_MODULES];
|
||||
|
||||
```
|
||||
|
||||
**The API Area**
|
||||
This area declares standard bsp functions that are used across AmbiqSuite examples. It is best to attempt to implement these functions in ```am_bsp.c```.
|
||||
```c
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External function definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void am_bsp_low_power_init(void);
|
||||
extern void am_bsp_iom_pins_enable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
|
||||
extern void am_bsp_iom_pins_disable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
|
||||
extern void am_bsp_mspi_pins_enable(am_hal_mspi_device_e eMSPIDevice);
|
||||
extern void am_bsp_mspi_pins_disable(am_hal_mspi_device_e eMSPIDevice);
|
||||
|
||||
extern void am_bsp_ios_pins_enable(uint32_t ui32Module, uint32_t ui32IOSMode); // SparkFun Edge does not expose IO Slave Clock signal, so hiding these functions
|
||||
extern void am_bsp_ios_pins_disable(uint32_t ui32Module, uint32_t ui32IOSMode);
|
||||
|
||||
extern void am_bsp_debug_printf_enable(void);
|
||||
extern void am_bsp_debug_printf_disable(void);
|
||||
|
||||
#ifdef AM_BSP_GPIO_ITM_SWO
|
||||
extern void am_bsp_itm_printf_enable(void);
|
||||
#else
|
||||
extern void am_bsp_itm_printf_enable(uint32_t ui32Pin, am_hal_gpio_pincfg_t sPincfg);
|
||||
#endif
|
||||
extern void am_bsp_itm_string_print(char *pcString);
|
||||
extern void am_bsp_itm_printf_disable(void);
|
||||
|
||||
extern void am_bsp_uart_string_print(char *pcString);
|
||||
extern void am_bsp_uart_printf_enable(void);
|
||||
extern void am_bsp_uart_printf_enable_custom(const am_hal_uart_config_t* p_config);
|
||||
extern void am_bsp_uart_printf_disable(void);
|
||||
|
||||
extern void am_bsp_buffered_uart_printf_enable(void);
|
||||
extern void am_bsp_buffered_uart_service(void);
|
||||
|
||||
extern uint32_t am_bsp_com_uart_transfer(const am_hal_uart_transfer_t *psTransfer);
|
||||
```
|
||||
|
||||
**The Footer**
|
||||
The footer just wraps it all up
|
||||
```c
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // AM_BSP_H
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
```
|
||||
+653
@@ -0,0 +1,653 @@
|
||||
#!/usr/bin/env python3
|
||||
|
||||
# *****************************************************************************
|
||||
#
|
||||
# pinconfig.py
|
||||
#
|
||||
# @brief Script for generating a BSP pin file.
|
||||
|
||||
# *****************************************************************************
|
||||
|
||||
# *****************************************************************************
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
|
||||
#
|
||||
# *****************************************************************************
|
||||
|
||||
# *****************************************************************************
|
||||
# Imported modules
|
||||
# *****************************************************************************
|
||||
import argparse
|
||||
import textwrap
|
||||
import os.path
|
||||
import rsonlite
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# Templates
|
||||
# *****************************************************************************
|
||||
filetemplateC = '''
|
||||
//*****************************************************************************
|
||||
//
|
||||
// {filename}
|
||||
//! @file
|
||||
//!
|
||||
//! @brief BSP pin configuration definitions.
|
||||
//!
|
||||
//! @addtogroup BSP Board Support Package (BSP)
|
||||
//! @addtogroup apollo3_evb_bsp BSP for the Apollo3 Engineering Board
|
||||
//! @ingroup BSP
|
||||
//! @{{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "am_bsp.h"
|
||||
{pin_defs}
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End Doxygen group.
|
||||
//! @}}
|
||||
//
|
||||
//*****************************************************************************
|
||||
'''.strip()
|
||||
|
||||
|
||||
filetemplateH = '''
|
||||
//*****************************************************************************
|
||||
//
|
||||
// {filename}
|
||||
//! @file
|
||||
//!
|
||||
//! @brief BSP pin configuration definitions.
|
||||
//!
|
||||
//! @addtogroup BSP Board Support Package (BSP)
|
||||
//! @addtogroup apollo3_bsp BSP for the Apollo3 EVB.
|
||||
//! @ingroup BSP
|
||||
//! @{{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef {headerdef}
|
||||
#define {headerdef}
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{{
|
||||
#endif
|
||||
{pin_defs}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}}
|
||||
#endif
|
||||
|
||||
#endif // {headerdef}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// End Doxygen group.
|
||||
//! @}}
|
||||
//
|
||||
//*****************************************************************************
|
||||
'''.strip()
|
||||
|
||||
|
||||
sectiontemplate = '''
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// {pin_descr}
|
||||
//
|
||||
//*****************************************************************************
|
||||
'''.strip()
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
#
|
||||
# Globals
|
||||
#
|
||||
# *****************************************************************************
|
||||
|
||||
# *****************************************************************************
|
||||
#
|
||||
# Command line support.
|
||||
#
|
||||
# *****************************************************************************
|
||||
def read_arguments():
|
||||
parser = argparse.ArgumentParser()
|
||||
|
||||
parser.add_argument('input', help='input src file name')
|
||||
parser.add_argument('CorH', help='C to create C file, H to create H file',
|
||||
choices=['C','H','c','h'])
|
||||
parser.add_argument('-g', '--guard', dest='headerdef', required=False, default='AM_BSP_PINS_H', help='optional string to use for header include guards - defaults to AM_BSP_PINS_H')
|
||||
parser.add_argument('-p', '--prefix', dest='prefix', required=False, default='AM_BSP_GPIO', help='optional string with which to prefix names - defaults to AM_BSP')
|
||||
parser.add_argument('-b', '--bgaguard', dest='bgaguard', required=False, default=None, help='if provided this script will place preprocessor guards around pins that only exist on the BGA package using the provided string as the check value')
|
||||
|
||||
return parser.parse_args()
|
||||
|
||||
# *****************************************************************************
|
||||
# parse_input()
|
||||
# *****************************************************************************
|
||||
def parse_input(filename):
|
||||
'''
|
||||
Simple wrapper to pull an rsonlite list from given file.
|
||||
'''
|
||||
with open(filename) as f:
|
||||
data = f.read()
|
||||
return rsonlite.loads(data)
|
||||
|
||||
# *****************************************************************************
|
||||
# list_to_dict()
|
||||
# *****************************************************************************
|
||||
def list_to_dict(L):
|
||||
'''
|
||||
rsonlite loads data from the rson files as a very-nested list. This
|
||||
function converts that list to a set of nested dictionaries. At each level,
|
||||
the dictionary keys correspond to the "headings", and the dictionary values
|
||||
are a list of the items under that "heading". Values assigned by
|
||||
equals-sign statements are (unfortunately) also converted to (key, list)
|
||||
pairs, the same way that subheadings are.
|
||||
'''
|
||||
if len(L) == 1:
|
||||
return L[0]
|
||||
else:
|
||||
D = dict()
|
||||
for x in L:
|
||||
if x[0] in D:
|
||||
D[x[0]] = D[x[0]] + [list_to_dict(x[1])]
|
||||
else:
|
||||
D[x[0]] = [list_to_dict(x[1])]
|
||||
return D
|
||||
|
||||
# *****************************************************************************
|
||||
# get_val()
|
||||
# *****************************************************************************
|
||||
def get_val(name, D):
|
||||
'''
|
||||
get_val is just a helper to make it more obvious when you are trying to get
|
||||
at an equals-sign-assigned value from the rson file dictionary.
|
||||
'''
|
||||
if name not in D:
|
||||
return "ERROR: {} VALUE MISSING".format(name)
|
||||
else:
|
||||
return D[name][0]
|
||||
|
||||
# *****************************************************************************
|
||||
# get_pinobj()
|
||||
# *****************************************************************************
|
||||
def get_pinobj(filename):
|
||||
'''
|
||||
Given the filename of an 'src' file, this function will return a 'pin'
|
||||
object corresponding to the fields described in the src file.
|
||||
'''
|
||||
|
||||
# Set the location for the supplementary files (infoblock, base addresses, etc.)
|
||||
srcdir = os.path.dirname(filename)
|
||||
|
||||
# Read in the contents of the src file, and use the rsonlite library to
|
||||
# parse them into a list.
|
||||
rson_data = parse_input(filename)
|
||||
|
||||
# Convert the list to a dictionary.
|
||||
rson_dict = list_to_dict(rson_data)
|
||||
|
||||
# Convert the dictionary to a block object, which will create field
|
||||
# objects as necessary. Return this object to the caller.
|
||||
return pinobj(rson_dict)
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# pinfields
|
||||
# *****************************************************************************
|
||||
class pinfields:
|
||||
def __init__(self, pindict):
|
||||
|
||||
self.name = ''
|
||||
self.desc = ''
|
||||
self.pinnum = 0
|
||||
self.powersw = ''
|
||||
self.pullup = ''
|
||||
self.func_sel = ''
|
||||
self.drvstrength = 0
|
||||
self.intdir = 0
|
||||
self.GPOutcfg = ''
|
||||
self.GPinput = ''
|
||||
self.GPRdZero = ''
|
||||
self.IOMnum = ''
|
||||
self.CEnum = ''
|
||||
self.CEpol = ''
|
||||
self.bIomMSPIn = ''
|
||||
|
||||
intnotgiven = 65535
|
||||
strnotgiven = 'none_given'
|
||||
|
||||
if 'name' in pindict:
|
||||
self.name = get_val('name', pindict)
|
||||
else:
|
||||
self.name = strnotgiven
|
||||
|
||||
if 'desc' in pindict:
|
||||
self.desc = get_val('desc', pindict)
|
||||
else:
|
||||
self.desc = strnotgiven
|
||||
|
||||
if 'pinnum' in pindict:
|
||||
self.pinnum = int(get_val('pinnum', pindict))
|
||||
else:
|
||||
self.pinnum = intnotgiven
|
||||
|
||||
if 'powersw' in pindict:
|
||||
self.powersw = get_val('powersw', pindict)
|
||||
else:
|
||||
self.powersw = strnotgiven
|
||||
|
||||
if 'pullup' in pindict:
|
||||
self.pullup = get_val('pullup', pindict)
|
||||
else:
|
||||
self.pullup = strnotgiven
|
||||
|
||||
if 'func_sel' in pindict:
|
||||
self.func_sel = get_val('func_sel', pindict)
|
||||
else:
|
||||
self.func_sel = strnotgiven
|
||||
|
||||
if 'drvstrength' in pindict:
|
||||
self.drvstrength = int(get_val('drvstrength', pindict))
|
||||
else:
|
||||
self.drvstrength = intnotgiven
|
||||
|
||||
if 'intdir' in pindict:
|
||||
self.intdir = get_val('intdir', pindict)
|
||||
else:
|
||||
self.intdir = strnotgiven
|
||||
|
||||
if 'GPOutcfg' in pindict:
|
||||
self.GPOutcfg = get_val('GPOutcfg', pindict)
|
||||
else:
|
||||
self.GPOutcfg = strnotgiven
|
||||
|
||||
if 'GPinput' in pindict:
|
||||
self.GPinput = get_val('GPinput', pindict)
|
||||
else:
|
||||
self.GPinput = strnotgiven
|
||||
|
||||
if 'GPRdZero' in pindict:
|
||||
self.GPRdZero = get_val('GPRdZero', pindict)
|
||||
else:
|
||||
self.GPRdZero = strnotgiven
|
||||
|
||||
if 'IOMnum' in pindict:
|
||||
self.IOMnum = get_val('IOMnum', pindict)
|
||||
else:
|
||||
self.IOMnum = strnotgiven
|
||||
|
||||
if 'CEnum' in pindict:
|
||||
self.CEnum = get_val('CEnum', pindict)
|
||||
else:
|
||||
self.CEnum = strnotgiven
|
||||
|
||||
if 'CEpol' in pindict:
|
||||
self.CEpol = get_val('CEpol', pindict)
|
||||
else:
|
||||
self.CEpol = strnotgiven
|
||||
|
||||
if 'bIomMSPIn' in pindict:
|
||||
self.bIomMSPIn = get_val('bIomMSPIn', pindict)
|
||||
else:
|
||||
self.bIomMSPIn = strnotgiven
|
||||
|
||||
#
|
||||
# Check for an invalid field in the src file. If so, report it.
|
||||
#
|
||||
for fld in pindict:
|
||||
if fld != 'name' and \
|
||||
fld != 'desc' and \
|
||||
fld != 'pinnum' and \
|
||||
fld != 'powersw' and \
|
||||
fld != 'pullup' and \
|
||||
fld != 'func_sel' and \
|
||||
fld != 'drvstrength' and \
|
||||
fld != 'intdir' and \
|
||||
fld != 'GPOutcfg' and \
|
||||
fld != 'GPinput' and \
|
||||
fld != 'GPRdZero' and \
|
||||
fld != 'IOMnum' and \
|
||||
fld != 'CEnum' and \
|
||||
fld != 'CEpol' and \
|
||||
fld != 'bIomMSPIn':
|
||||
print("Invalid field: '%s.%s'" % (self.name, fld))
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# pinobj
|
||||
# *****************************************************************************
|
||||
class pinobj:
|
||||
def __init__(self, pindict):
|
||||
self.name = 'name'
|
||||
self.srcver=0x0000
|
||||
self.pins = []
|
||||
|
||||
if 'pinsrc_ver' in pindict:
|
||||
# Convert rson list object to int
|
||||
ssrcver = pindict["pinsrc_ver"][0]
|
||||
if ssrcver[0:2].lower() == "0x":
|
||||
self.srcver = int(ssrcver,16)
|
||||
else:
|
||||
self.srcver = int(ssrcver,10)
|
||||
else:
|
||||
# If no src file version given, assume version for Apollo3
|
||||
self.srcver = 0x0003
|
||||
|
||||
# Run through all the pins given in the src file
|
||||
if 'pin' in pindict:
|
||||
#
|
||||
# Run through the 'pin' list.
|
||||
#
|
||||
for pin in pindict['pin']:
|
||||
self.pins.append(pinfields(pin))
|
||||
|
||||
# *****************************************************************************
|
||||
# write_Cfiles()
|
||||
# *****************************************************************************
|
||||
|
||||
def write_Cfiles(pinobj, bCreateC):
|
||||
#
|
||||
# Initializations
|
||||
#
|
||||
intnotgiven = 65535
|
||||
strnotgiven = 'none_given'
|
||||
strCfile = ''
|
||||
strHfile = ''
|
||||
|
||||
for pin in pinobj.pins:
|
||||
sectiondesc = pin.name.strip() + ' pin'
|
||||
if pin.desc == strnotgiven:
|
||||
sectiondesc += '.'
|
||||
else:
|
||||
sectiondesc += ': ' + pin.desc.strip()
|
||||
if sectiondesc[-1] != '.':
|
||||
sectiondesc += '.'
|
||||
strCfile += '\n'
|
||||
strCfile += sectiontemplate.format(pin_descr=sectiondesc)
|
||||
strCfile += '\n'
|
||||
strHfile += '\n'
|
||||
strHfile += sectiontemplate.format(pin_descr=sectiondesc)
|
||||
strHfile += '\n'
|
||||
|
||||
bga = False
|
||||
if ( 30 <= pin.pinnum <=38 ) or ( 42 <= pin.pinnum <= 43 ) or ( 45 <= pin.pinnum <= 46 ):
|
||||
bga = True
|
||||
|
||||
if pin.pinnum != intnotgiven:
|
||||
if bga and args.bgaguard:
|
||||
strHfile += '#if defined (' + args.bgaguard + ')\n'
|
||||
|
||||
strHfile += '#define ' + args.prefix + '_%-20s\t' % pin.name + '%d\n' % pin.pinnum
|
||||
strHfile += 'extern const am_hal_gpio_pincfg_t g_' + args.prefix + '_%s;\n' % pin.name
|
||||
|
||||
if bga and args.bgaguard:
|
||||
strHfile += '#endif // ' + args.bgaguard + '\n'
|
||||
#strHfile += '\n'
|
||||
|
||||
if bga and args.bgaguard:
|
||||
strCfile += '#if defined (' + args.bgaguard + ')\n'
|
||||
|
||||
strCfile += 'const am_hal_gpio_pincfg_t g_' + args.prefix + '_%s =\n' % pin.name
|
||||
strCfile += '{\n'
|
||||
strCfile += '%-25s' % ' .uFuncSel' + '= %s,\n' % pin.func_sel
|
||||
|
||||
if pin.powersw != strnotgiven:
|
||||
if (pin.powersw.lower() == "vdd") or \
|
||||
(pin.powersw.lower() == "vss") or \
|
||||
(pin.powersw.lower() == "none"):
|
||||
strCfile += '%-25s' % ' .ePowerSw' + '= AM_HAL_GPIO_PIN_POWERSW_%s,\n' % pin.powersw.upper()
|
||||
else:
|
||||
strCfile += '%-25s' % ' .ePowerSw' + '= %s,\n' % pin.powersw
|
||||
|
||||
if pin.pullup != strnotgiven:
|
||||
if (pin.pullup.lower() == "none") or \
|
||||
(pin.pullup.lower() == "weak") or \
|
||||
(pin.pullup.lower() == "pulldown") or \
|
||||
(pin.pullup.lower() == "1_5k") or \
|
||||
(pin.pullup.lower() == "6k") or \
|
||||
(pin.pullup.lower() == "12k") or \
|
||||
(pin.pullup.lower() == "24k"):
|
||||
strCfile += '%-25s' % ' .ePullup' + '= AM_HAL_GPIO_PIN_PULLUP_%s,\n' % pin.pullup.upper()
|
||||
elif (pin.pullup == "1_5") or \
|
||||
(pin.pullup == "6") or \
|
||||
(pin.pullup == "12") or \
|
||||
(pin.pullup == "24"):
|
||||
strCfile += '%-25s' % ' .ePullup' + '= AM_HAL_GPIO_PIN_PULLUP_%sK,\n' % pin.pullup
|
||||
else:
|
||||
strCfile += '%-25s' % ' .ePullup' + '= %s,\n' % pin.pullup
|
||||
|
||||
if pin.drvstrength != intnotgiven:
|
||||
if (pin.drvstrength != 2) and (pin.drvstrength != 4) and \
|
||||
(pin.drvstrength != 8) and (pin.drvstrength != 12):
|
||||
pin.drvstrength = 2
|
||||
strCfile += '%-25s' % ' .eDriveStrength' + '= AM_HAL_GPIO_PIN_DRIVESTRENGTH_%dMA,\n' % pin.drvstrength
|
||||
|
||||
if pin.GPOutcfg != strnotgiven:
|
||||
if (pin.GPOutcfg.lower() == "disable") or \
|
||||
(pin.GPOutcfg.lower() == "pushpull") or \
|
||||
(pin.GPOutcfg.lower() == "opendrain") or \
|
||||
(pin.GPOutcfg.lower() == "tristate"):
|
||||
strCfile += '%-25s' % ' .eGPOutcfg' + '= AM_HAL_GPIO_PIN_OUTCFG_%s,\n' % pin.GPOutcfg.upper()
|
||||
else:
|
||||
strCfile += '%-25s' % ' .eGPOutcfg' + '= %s,\n' % pin.GPOutcfg
|
||||
|
||||
if pin.GPinput != strnotgiven:
|
||||
if (pin.GPinput.lower() == "true"):
|
||||
strCfile += '%-25s' % ' .eGPInput' + '= AM_HAL_GPIO_PIN_INPUT_ENABLE,\n'
|
||||
elif (pin.GPinput.lower() == "false"):
|
||||
strCfile += '%-25s' % ' .eGPInput' + '= AM_HAL_GPIO_PIN_INPUT_NONE,\n'
|
||||
else:
|
||||
strCfile += '%-25s' % ' .eGPInput' + '= %s,\n' % pin.GPinput
|
||||
|
||||
if pin.GPRdZero != strnotgiven:
|
||||
if (pin.GPRdZero.lower() == "true") or \
|
||||
(pin.GPRdZero.lower() == "zero"):
|
||||
strCfile += '%-25s' % ' .eGPRdZero' + '= AM_HAL_GPIO_PIN_RDZERO_ZERO,\n'
|
||||
elif (pin.GPRdZero.lower() == "false") or \
|
||||
(pin.GPRdZero.lower() == "readpin"):
|
||||
strCfile += '%-25s' % ' .eGPRdZero' + '= AM_HAL_GPIO_PIN_RDZERO_READPIN,\n'
|
||||
else:
|
||||
strCfile += '%-25s' % ' .eGPRdZero' + '= %s,\n' % pin.GPRdZero
|
||||
|
||||
if pin.intdir != strnotgiven:
|
||||
if (pin.intdir.lower() == "none") or \
|
||||
(pin.intdir.lower() == "lo2hi") or \
|
||||
(pin.intdir.lower() == "hi2lo") or \
|
||||
(pin.intdir.lower() == "either"):
|
||||
strCfile += '%-25s' % ' .eIntDir' + '= AM_HAL_GPIO_PIN_INTDIR_%s,\n' % pin.intdir.upper()
|
||||
else:
|
||||
strCfile += '%-25s' % ' .eIntDir' + '= %s,\n' % pin.intdir
|
||||
|
||||
if (pin.bIomMSPIn != strnotgiven):
|
||||
if pinobj.srcver >= 0x0003:
|
||||
if ((pin.bIomMSPIn[0:1].lower() != "m") and (pin.bIomMSPIn != "0")):
|
||||
bIom = 1
|
||||
else:
|
||||
bIom = 0
|
||||
strCfile += '%-25s' % ' .bIomMSPIn' + '= %d,\n' % bIom
|
||||
|
||||
if pin.IOMnum != strnotgiven:
|
||||
strCfile += '%-25s' % ' .uIOMnum' + '= %s,\n' % str(pin.IOMnum)
|
||||
|
||||
if pin.CEnum != strnotgiven:
|
||||
strCfile += '%-25s' % ' .uNCE' + '= %s,\n' % str(pin.CEnum)
|
||||
|
||||
# Create the define
|
||||
strtmp = '#define ' + args.prefix + '_%s_CHNL' % (pin.name)
|
||||
strHfile += '%-40s' % strtmp + '%s\n' % str((pin.CEnum))
|
||||
|
||||
if pin.CEpol != strnotgiven:
|
||||
if (pin.CEpol.lower() == "low") or \
|
||||
(pin.CEpol.lower() == "high"):
|
||||
strCfile += '%-25s' % ' .eCEpol' + '= AM_HAL_GPIO_PIN_CEPOL_ACTIVE%s,\n' % pin.CEpol.upper()
|
||||
elif (pin.CEpol.lower() == "activelow") or \
|
||||
(pin.CEpol.lower() == "activehigh"):
|
||||
strCfile += '%-25s' % ' .eCEpol' + '= AM_HAL_GPIO_PIN_CEPOL_%s,\n' % pin.CEpol.upper()
|
||||
else:
|
||||
strCfile += '%-25s' % ' .eCEpol' + '= %s,\n' % pin.CEpol
|
||||
|
||||
# Eliminate the last comma from the last structure member
|
||||
strCfile = strCfile[:-2]
|
||||
|
||||
# Terminate the structure
|
||||
strCfile += '\n};\n'
|
||||
|
||||
if bga and args.bgaguard:
|
||||
strCfile += '#endif // ' + args.bgaguard + '\n'
|
||||
|
||||
if bCreateC:
|
||||
#
|
||||
# Develop and print the C file
|
||||
#
|
||||
S = filetemplateC.format(filename='am_bsp_pins.c', pin_defs=strCfile);
|
||||
print(S)
|
||||
else:
|
||||
#
|
||||
# Develop and print the H file
|
||||
#
|
||||
S = filetemplateH.format(filename='am_bsp_pins.h',
|
||||
pin_defs=strHfile,
|
||||
headerdef=args.headerdef)
|
||||
print(S)
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
#
|
||||
# main
|
||||
#
|
||||
# *****************************************************************************
|
||||
if __name__ == '__main__':
|
||||
|
||||
#
|
||||
# Get arguments.
|
||||
# First arg is a string for the input .src file.
|
||||
# Second arg must be a C or H.
|
||||
#
|
||||
args = read_arguments()
|
||||
if args.CorH.upper() == 'C':
|
||||
bCreateC = True
|
||||
else:
|
||||
bCreateC = False
|
||||
|
||||
pinobj = get_pinobj(args.input)
|
||||
|
||||
#
|
||||
# pinobj.pins is a list of the pins
|
||||
#
|
||||
write_Cfiles(pinobj, bCreateC)
|
||||
@@ -0,0 +1,294 @@
|
||||
'''
|
||||
rsonlite -- an extremely lightweight version of rson.
|
||||
|
||||
Copyright (c) 2012, Patrick Maupin
|
||||
|
||||
License :: MIT
|
||||
|
||||
http://pypi.python.org/pypi/rsonlite
|
||||
http://code.google.com/p/rson/
|
||||
|
||||
rsonlite makes it easy to build a file parser for
|
||||
declarative hierarchical data structures using indentation.
|
||||
(Spaces only, tabs not considered indentation.)
|
||||
|
||||
The only special characters are '#', '=', and indentation:
|
||||
|
||||
- Indentation denotes a key/value relationship. The
|
||||
value is indented from the key.
|
||||
|
||||
- = Denotes the start of a free-format string. These
|
||||
strings can contain '=' and '#' characters, and
|
||||
even be multi-line, but every line in the string
|
||||
must be indented past the initial equal sign.
|
||||
|
||||
Note that, for multi-line strings, indentation is
|
||||
preserved but normalized such that at least one
|
||||
line starts in the left column. This allows for
|
||||
restructuredText or Python code to exist inside
|
||||
multi-line strings.
|
||||
|
||||
- # Denotes the start of a line comment, when not
|
||||
inside a free-format string.
|
||||
|
||||
The only Python objects resulting from parsing a file
|
||||
with rsonlite are:
|
||||
|
||||
- strings:
|
||||
free-format strings (described above) can
|
||||
contain any character, but the whitespace
|
||||
before/after the string may be stripped.
|
||||
|
||||
Regular strings must fit on a single line and
|
||||
cannot contain '=' or '#' characters.
|
||||
|
||||
Regular strings may be used as keys in key/value
|
||||
pairs, but free-format strings may not.
|
||||
|
||||
- tuple:
|
||||
A key/value pair is a two-element tuple. The key is always
|
||||
a string. The value is always a list.
|
||||
|
||||
- list:
|
||||
The top level is a list, and the value element of every
|
||||
key/value pair tuple is also a list. Lists can contain
|
||||
strings and key/value pair tuples.
|
||||
'''
|
||||
|
||||
import re
|
||||
|
||||
version = __version__ = '0.1.0'
|
||||
|
||||
# Our attempt at rationalizing differences between Python 2 and Python 3.
|
||||
|
||||
try:
|
||||
basestring
|
||||
except NameError:
|
||||
basestring = str
|
||||
class unicode: pass
|
||||
|
||||
# Use OrderedDict if it's available
|
||||
|
||||
try:
|
||||
from collections import OrderedDict as stddict
|
||||
except ImportError:
|
||||
stddict = dict
|
||||
|
||||
# Splits the entire file into probable tokens.
|
||||
|
||||
splitter = re.compile('(\n *|=[^\n]*|#[^\n]*|[^\n#=]+)').findall
|
||||
|
||||
class RsonToken(str):
|
||||
''' A string that may be annotated with location information
|
||||
'''
|
||||
def __new__(cls, s, line, col):
|
||||
self = str.__new__(cls, s)
|
||||
self.line = line
|
||||
self.col = col
|
||||
return self
|
||||
def __add__(self, other):
|
||||
return RsonToken(str(self) + other, self.line, self.col)
|
||||
|
||||
|
||||
def gettoks(source):
|
||||
''' Convert string into (probable) tokens
|
||||
(some tokens may be recombined later, e.g. if they
|
||||
contain # or = but were already inside a string)
|
||||
'''
|
||||
|
||||
# Use "regular" strings, whatever that means for the given Python
|
||||
if isinstance(source, unicode):
|
||||
source = source.encode('utf-8', 'replace')
|
||||
elif not isinstance(source, basestring):
|
||||
source = source.decode('utf-8', 'replace')
|
||||
|
||||
# Convert MS-DOS or Mac line endings to the one true way, and
|
||||
# prefix the source with a linefeed to simplify the tokenization.
|
||||
source = '\n' + source.replace('\r\n', '\n').replace('\r', '\n')
|
||||
|
||||
line = 0
|
||||
for tok in splitter(source):
|
||||
if tok.startswith('\n'):
|
||||
line += 1
|
||||
col = len(tok)
|
||||
else:
|
||||
yield RsonToken(tok, line, col)
|
||||
col += len(tok)
|
||||
|
||||
def multiline(lineinfo, dedent):
|
||||
''' Returns one string for each line,
|
||||
properly dedented.
|
||||
'''
|
||||
linenum = lineinfo[0].line
|
||||
for tok in lineinfo:
|
||||
while linenum < tok.line:
|
||||
yield ''
|
||||
linenum += 1
|
||||
yield (tok.col - dedent) * ' ' + tok.rstrip()
|
||||
linenum += 1
|
||||
|
||||
def getfreeformat(toklist, firsttok, firstcol):
|
||||
''' Returns a free-formatted string.
|
||||
'''
|
||||
curline = firsttok.line
|
||||
firstpart = firsttok[1:].strip() # Get past = sign
|
||||
lineinfo = []
|
||||
while toklist and toklist[-1].col > firstcol:
|
||||
tok = toklist.pop()
|
||||
if tok.line == curline:
|
||||
lineinfo[-1] += tok
|
||||
else:
|
||||
lineinfo.append(tok)
|
||||
curline = tok.line
|
||||
if lineinfo:
|
||||
dedent = min(tok.col for tok in lineinfo)
|
||||
if firstpart:
|
||||
lineinfo.insert(0, RsonToken(firstpart, firsttok.line, dedent))
|
||||
firstpart = '\n'.join(multiline(lineinfo, dedent))
|
||||
return RsonToken(firstpart, firsttok.line, firsttok.col)
|
||||
|
||||
def loads(source):
|
||||
''' load a string into an rsonlite datastructure.
|
||||
If the source is not a string instance, then
|
||||
loads will attempt to convert it into a string
|
||||
instance, by encoding to UTF-8 on Python 2,
|
||||
or decoding from UTF-8 on Python 3.
|
||||
'''
|
||||
toklist = list(gettoks(source))
|
||||
toklist.reverse()
|
||||
result = [None]
|
||||
stack = []
|
||||
curcol = -1
|
||||
curlist = result
|
||||
while toklist:
|
||||
tok = toklist.pop()
|
||||
if tok.startswith('#'):
|
||||
continue
|
||||
col = tok.col
|
||||
if col > curcol:
|
||||
stack.append((curcol, curlist))
|
||||
oldlist = curlist
|
||||
curcol, curlist = col, []
|
||||
oldlist[-1] = oldlist[-1], curlist
|
||||
while col < curcol:
|
||||
curcol, curlist = stack.pop()
|
||||
if col != curcol:
|
||||
err = IndentationError('unindent does not match any outer indentation level')
|
||||
err.filename = '<rsonlite>'
|
||||
err.lineno = tok.line
|
||||
raise err
|
||||
if tok.startswith('='):
|
||||
curlist.append(getfreeformat(toklist, tok, col))
|
||||
else:
|
||||
curlist.append(RsonToken(tok.rstrip(), tok.line, tok.col))
|
||||
if toklist and toklist[-1].line == tok.line:
|
||||
tok = toklist.pop()
|
||||
if tok.startswith('='):
|
||||
curlist[-1] = curlist[-1], [getfreeformat(toklist, tok, col)]
|
||||
else:
|
||||
assert tok.startswith('#') # else problem in regex...
|
||||
result, = result
|
||||
return [] if result is None else result[1]
|
||||
|
||||
def dumps(data, indent=' ', initial_indent=''):
|
||||
''' Dump a string loaded with loads back out.
|
||||
'''
|
||||
def getstring(data, indent2):
|
||||
if '\n' in data:
|
||||
data = ('\n'+indent2).join([''] + data.split('\n'))
|
||||
return data
|
||||
|
||||
def recurse(data, indent2):
|
||||
assert isinstance(data, list), repr(data)
|
||||
for data in data:
|
||||
if isinstance(data, tuple):
|
||||
key, value = data
|
||||
if len(value) == 1 and isinstance(value[0], basestring):
|
||||
append('%s%s = %s' % (indent2, key, getstring(value[0], indent2+indent)))
|
||||
else:
|
||||
append('%s%s' % (indent2, key))
|
||||
recurse(value, indent2 + indent)
|
||||
else:
|
||||
assert isinstance(data, basestring)
|
||||
if '\n' in data or '=' in data or '#' in data:
|
||||
append(indent2 + '=')
|
||||
append(getstring(data, indent2 + ' '))
|
||||
else:
|
||||
append('%s%s' % (indent2, data))
|
||||
result = []
|
||||
append = result.append
|
||||
recurse(data, initial_indent)
|
||||
append('')
|
||||
return '\n'.join(result)
|
||||
|
||||
def pretty(data, indent=' '):
|
||||
''' Pretty-print a string loaded by loads into
|
||||
something that makes it easy to see the actual
|
||||
structure of the data. The return value of
|
||||
this should be parseable by eval()
|
||||
'''
|
||||
def recurse(data, indent2):
|
||||
assert isinstance(data, list)
|
||||
for data in data:
|
||||
assert isinstance(data, (tuple, basestring))
|
||||
if isinstance(data, tuple) and (
|
||||
len(data[1]) != 1 or not isinstance(data[1][0], basestring)):
|
||||
append('%s(%s, [' % (indent2, repr(data[0])))
|
||||
recurse(data[1], indent2 + indent)
|
||||
append('%s])' % (indent2))
|
||||
else:
|
||||
append('%s%s,' % (indent2, repr(data)))
|
||||
result = []
|
||||
append = result.append
|
||||
append('[')
|
||||
recurse(data, indent)
|
||||
append(']')
|
||||
append('')
|
||||
return '\n'.join(result)
|
||||
|
||||
##########################################################################
|
||||
# These higher-level functions might suffice for simple data, and also
|
||||
# provide a template for designing similar functions.
|
||||
|
||||
def stringparse(s, special=dict(true=True, false=False, null=None)):
|
||||
''' This gives an example of handling the JSON special identifiers
|
||||
true, false and null, and also of handling simple arrays.
|
||||
'''
|
||||
if s in special:
|
||||
return special[s]
|
||||
if s.startswith('[') and s.endswith(']'):
|
||||
t = s[1:-1]
|
||||
for ch in '"\'[]{}\n':
|
||||
if ch in t:
|
||||
return s
|
||||
return [x.strip() for x in t.split(',')]
|
||||
return s
|
||||
|
||||
def simpleparse(source, stringparse=stringparse, stddict=stddict):
|
||||
''' Return the simplest structure that uses dicts instead
|
||||
of tuples, and doesn't lose any source information.
|
||||
Use ordered dicts if they are available.
|
||||
'''
|
||||
def recurse(mylist):
|
||||
if len(mylist) == 1 and isinstance(mylist[0], basestring):
|
||||
return stringparse(mylist[0])
|
||||
keys = [x[0] for x in mylist if isinstance(x, tuple)]
|
||||
if not keys:
|
||||
return mylist # simple list
|
||||
if len(set(keys)) == len(mylist):
|
||||
return stddict((x, recurse(y)) for (x, y) in mylist)
|
||||
# Complicated. Make a list that might have multiple dicts
|
||||
result = []
|
||||
curdict = None
|
||||
for item in mylist:
|
||||
if not isinstance(item, tuple):
|
||||
result.append(stringparse(item))
|
||||
curdict = None
|
||||
continue
|
||||
key, value = item
|
||||
if curdict is None or key in curdict:
|
||||
curdict = stddict()
|
||||
result.append(curdict)
|
||||
curdict[key] = recurse(value)
|
||||
return result
|
||||
return recurse(source if isinstance(source, list) else loads(source))
|
||||
@@ -0,0 +1,6 @@
|
||||
Common Examples README
|
||||
======================
|
||||
|
||||
The beauty of the Ambiq BSP system is that it can be used to create common example code. For example if we define the proper UART instance and TX/RX pads as part of the BSP then a single source file can be used to demonstrate UART functionality across all capable boards. To utilize this capability to the fullest the common examples source code should be isolated from specific boards. This reduces redundancy in maintenance.
|
||||
|
||||
This directory contains common source files that may be referred to by any of the boards included in this repo. For board-specific source code look beneath the respective board's directory.
|
||||
+21
@@ -0,0 +1,21 @@
|
||||
Name:
|
||||
=====
|
||||
ble_freertos_tag
|
||||
|
||||
|
||||
Description:
|
||||
============
|
||||
ARM Cordio BLE - Proximity Tag Example
|
||||
|
||||
|
||||
Purpose:
|
||||
========
|
||||
This is a standard BLE Proximity Profile example.
|
||||
|
||||
Printing takes place over the ITM at 1M Baud.
|
||||
|
||||
|
||||
|
||||
******************************************************************************
|
||||
|
||||
|
||||
+574
@@ -0,0 +1,574 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.3.2 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Options
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# You can override these values on the command line e.g. make bootload COM_PORT=/dev/cu***
|
||||
# COM_PORT is the serial port to use for uploading. For example COM#### on Windows or /dev/cu.usbserial-#### on *nix
|
||||
COM_PORT ?=
|
||||
# ASB_UPLOAD_BAUD is the baud rate setting of the Ambiq Secue Bootloader (ASB) as it is configured on the Apollo3. Defautls to 115200 if unset
|
||||
ASB_UPLOAD_BAUD ?=
|
||||
# SVL_UPLOAD_BAUD is the baud rate setting of the SparkFun Variable Loader (SVL). Defaults to 921600 if unset
|
||||
SVL_UPLOAD_BAUD ?=
|
||||
# PYTHON3 should evaluate to a call to the Python3 executable on your machine
|
||||
PYTHON3 ?=
|
||||
|
||||
# *Optionally* specify absolute paths to the SDK and the BSP
|
||||
# You can do this on the command line - e.g. make bootload SDKPATH=~/$AMBIQ_SDK_ROOT_PATH
|
||||
# Make sure to use / instead of \ when on Windows
|
||||
SDKPATH ?=# Set as the path to the SDK root if not located at ../../../../..
|
||||
COMMONPATH ?=# Set as the path to the BSP common folder if not located at ../../../../common
|
||||
BOARDPATH ?=# Set as the path to the board if not located at ../../..
|
||||
PROJECTPATH ?=# Set as the path to the project if not located at ..
|
||||
BOARD ?=# If using a SparkFun board you can simply provide the name e.g. redboard_artemis_atp
|
||||
|
||||
### Project Settings
|
||||
TARGET := ble_freertos_tag
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := $(TARGET)_gcc
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
ifeq ($(BOARD),)
|
||||
$(warning warning: no BOARD specified, will fall back to BOARDPATH for arbitrary bsp locations)
|
||||
else
|
||||
BOARDPATH=../../../../$(BOARD)
|
||||
$(warning Using BOARD=$(BOARD) at $(BOARDPATH))
|
||||
endif
|
||||
|
||||
ifeq ($(COM_PORT),)
|
||||
COM_PORT=COM4
|
||||
$(warning warning: you have not defined COM_PORT. Assuming it is COM4)
|
||||
endif
|
||||
ifeq ($(PYTHON3),)
|
||||
PYTHON3=python3
|
||||
$(warning warning: you have not defined PYTHON3. assuming it is accessible by 'python3')
|
||||
endif
|
||||
ifeq ($(ASB_UPLOAD_BAUD),)
|
||||
ASB_UPLOAD_BAUD=115200
|
||||
$(warning defaulting to 115200 baud for ASB)
|
||||
endif
|
||||
ifeq ($(SVL_UPLOAD_BAUD),)
|
||||
SVL_UPLOAD_BAUD=921600
|
||||
$(warning defaulting to 921600 baud for SVL)
|
||||
endif
|
||||
|
||||
ifeq ($(SDKPATH),)
|
||||
SDKPATH =../../../../..
|
||||
$(warning warning: you have not defined SDKPATH so will continue assuming that the SDK root is at $(SDKPATH))
|
||||
else
|
||||
# When the SDKPATH is given export it
|
||||
export SDKPATH
|
||||
endif
|
||||
|
||||
ifeq ($(COMMONPATH),)
|
||||
COMMONPATH =../../../../common
|
||||
$(warning warning: you have not defined COMMONPATH so will continue assuming that the COMMON root is at $(COMMONPATH))
|
||||
else
|
||||
# When the COMMONPATH is given export it
|
||||
export COMMONPATH
|
||||
endif
|
||||
|
||||
ifeq ($(BOARDPATH),)
|
||||
$(error Error: BOARDPATH must be provided)
|
||||
else
|
||||
# Ensure that boardpath does not include a trailing '/'
|
||||
ifeq ($(notdir $(BOARDPATH)),)
|
||||
override BOARDPATH:=$(patsubst %/, %,$(BOARDPATH))
|
||||
$(warning BOARDPATH had a trivial 'notdir' so we tried changing it to: $(BOARDPATH))
|
||||
endif
|
||||
BOARD=$(notdir $(BOARDPATH))
|
||||
# When the BOARDPATH is given export it
|
||||
export BOARDPATH
|
||||
endif
|
||||
|
||||
ifeq ($(PROJECTPATH),)
|
||||
PROJECTPATH =..
|
||||
$(warning warning: you have not defined PROJECTPATH so will continue assuming that the PROJECT root is at $(PROJECTPATH))
|
||||
else
|
||||
# When the PROJECTPATH is given export it
|
||||
export PROJECTPATH
|
||||
endif
|
||||
|
||||
CONFIG := $(PROJECTPATH)/gcc/$(BOARD)/bin
|
||||
$(warning CONFIG=$(CONFIG))
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Defines / Includes / Sources / Libraries
|
||||
#
|
||||
#******************************************************************************
|
||||
# Global Defines
|
||||
DEFINES= -DPART_$(PART)
|
||||
DEFINES+= -DAM_FREERTOS
|
||||
DEFINES+= -DAM_CUSTOM_BDADDR
|
||||
DEFINES+= -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -DAM_DEBUG_PRINTF
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
DEFINES+= -DSEC_ECC_CFG=SEC_ECC_CFG_UECC
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -Dgcc
|
||||
DEFINES+=
|
||||
|
||||
INCLUDES = -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-host/sources/stack/l2c
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/hid
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/fmpl
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-host/sources/stack/att
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/uribeacon
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/apps
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/gap
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-host/include
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-host/sources/hci/include
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/wsf/sources
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/FreeRTOSv10.1.1/Source/portable/GCC/AMapollo2
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-host/sources/sec/common
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/bas
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/apps/app
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/include
|
||||
INCLUDES+= -I$(SDKPATH)
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/wsf/include
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/ble_freertos_tag/src
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/wsf/sources/port/freertos
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/FreeRTOSv10.1.1/Source/include
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-host/sources/hci/ambiq/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-host/sources/stack/dm
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/wsf/sources/util
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/wdxs
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/gatt
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/include/app
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/uecc
|
||||
INCLUDES+= -I$(BOARDPATH)/bsp
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/services
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/apps/tag
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-host/sources/stack/smp
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-host/sources/stack/hci
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-host/sources/stack/cfg
|
||||
INCLUDES+= -I$(SDKPATH)/third_party/exactle/ble-host/sources/hci/ambiq
|
||||
|
||||
VPATH = $(SDKPATH)/utils
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-host/sources/stack/l2c
|
||||
VPATH+=:$(COMMONPATH)/examples/ble_freertos_tag/src
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/wsf/sources/port/freertos
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/hid
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/fmpl
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-host/sources/stack/att
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-host/sources/sec/uecc
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-profiles/sources/apps/app/common
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-host/sources/hci/ambiq/apollo3
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/wsf/sources/util
|
||||
VPATH+=:$(SDKPATH)/third_party/FreeRTOSv10.1.1/Source
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-host/sources/stack/dm
|
||||
VPATH+=:$(SDKPATH)/third_party/FreeRTOSv10.1.1/Source/portable/MemMang
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/wdxs
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/gatt
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/gap
|
||||
VPATH+=:$(SDKPATH)/third_party/uecc
|
||||
VPATH+=:$(SDKPATH)/devices
|
||||
VPATH+=:$(SDKPATH)/third_party/FreeRTOSv10.1.1/Source/portable/GCC/AMapollo2
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-profiles/sources/services
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-profiles/sources/apps/tag
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-host/sources/sec/common
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-profiles/sources/profiles/bas
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-host/sources/stack/smp
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-profiles/sources/apps/app
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-host/sources/stack/hci
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-host/sources/stack/cfg
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-host/sources/hci/ambiq
|
||||
VPATH+=:$(SDKPATH)/third_party/exactle/ble-profiles/sources/apps/hidapp
|
||||
|
||||
LIBS = $(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a
|
||||
LIBS += $(BOARDPATH)/bsp/gcc/bin/libam_bsp.a
|
||||
|
||||
SRC = l2c_coc.c
|
||||
SRC += l2c_main.c
|
||||
SRC += l2c_master.c
|
||||
SRC += l2c_slave.c
|
||||
SRC += ble_freertos_tag.c
|
||||
SRC += radio_task.c
|
||||
SRC += rtos.c
|
||||
SRC += wsf_assert.c
|
||||
SRC += wsf_buf.c
|
||||
SRC += wsf_efs.c
|
||||
SRC += wsf_math.c
|
||||
SRC += wsf_msg.c
|
||||
SRC += wsf_os.c
|
||||
SRC += wsf_queue.c
|
||||
SRC += wsf_timer.c
|
||||
SRC += wsf_trace.c
|
||||
SRC += hid_main.c
|
||||
SRC += fmpl_main.c
|
||||
SRC += attc_disc.c
|
||||
SRC += attc_main.c
|
||||
SRC += attc_proc.c
|
||||
SRC += attc_read.c
|
||||
SRC += attc_sign.c
|
||||
SRC += attc_write.c
|
||||
SRC += atts_ccc.c
|
||||
SRC += atts_csf.c
|
||||
SRC += atts_dyn.c
|
||||
SRC += atts_ind.c
|
||||
SRC += atts_main.c
|
||||
SRC += atts_proc.c
|
||||
SRC += atts_read.c
|
||||
SRC += atts_sign.c
|
||||
SRC += atts_write.c
|
||||
SRC += att_main.c
|
||||
SRC += att_uuid.c
|
||||
SRC += sec_ecc.c
|
||||
SRC += app_db.c
|
||||
SRC += app_hw.c
|
||||
SRC += app_ui.c
|
||||
SRC += ui_console.c
|
||||
SRC += ui_lcd.c
|
||||
SRC += ui_main.c
|
||||
SRC += ui_platform.c
|
||||
SRC += ui_timer.c
|
||||
SRC += hci_drv_apollo3.c
|
||||
SRC += bda.c
|
||||
SRC += bstream.c
|
||||
SRC += calc128.c
|
||||
SRC += crc32.c
|
||||
SRC += print.c
|
||||
SRC += terminal.c
|
||||
SRC += wstr.c
|
||||
SRC += dm_adv.c
|
||||
SRC += dm_adv_ae.c
|
||||
SRC += dm_adv_leg.c
|
||||
SRC += dm_conn.c
|
||||
SRC += dm_conn_cte.c
|
||||
SRC += dm_conn_master.c
|
||||
SRC += dm_conn_master_ae.c
|
||||
SRC += dm_conn_master_leg.c
|
||||
SRC += dm_conn_slave.c
|
||||
SRC += dm_conn_slave_ae.c
|
||||
SRC += dm_conn_slave_leg.c
|
||||
SRC += dm_conn_sm.c
|
||||
SRC += dm_dev.c
|
||||
SRC += dm_dev_priv.c
|
||||
SRC += dm_main.c
|
||||
SRC += dm_past.c
|
||||
SRC += dm_phy.c
|
||||
SRC += dm_priv.c
|
||||
SRC += dm_scan.c
|
||||
SRC += dm_scan_ae.c
|
||||
SRC += dm_scan_leg.c
|
||||
SRC += dm_sec.c
|
||||
SRC += dm_sec_lesc.c
|
||||
SRC += dm_sec_master.c
|
||||
SRC += dm_sec_slave.c
|
||||
SRC += dm_sync_ae.c
|
||||
SRC += wdxs_au.c
|
||||
SRC += wdxs_dc.c
|
||||
SRC += wdxs_ft.c
|
||||
SRC += wdxs_main.c
|
||||
SRC += wdxs_phy.c
|
||||
SRC += wdxs_stream.c
|
||||
SRC += gatt_main.c
|
||||
SRC += gap_main.c
|
||||
SRC += uECC.c
|
||||
SRC += uECC_ll.c
|
||||
SRC += port.c
|
||||
SRC += sec_aes.c
|
||||
SRC += sec_aes_rev.c
|
||||
SRC += sec_ccm_hci.c
|
||||
SRC += sec_cmac_hci.c
|
||||
SRC += sec_ecc_debug.c
|
||||
SRC += sec_ecc_hci.c
|
||||
SRC += sec_main.c
|
||||
SRC += bas_main.c
|
||||
SRC += smpi_act.c
|
||||
SRC += smpi_sc_act.c
|
||||
SRC += smpi_sc_sm.c
|
||||
SRC += smpi_sm.c
|
||||
SRC += smpr_act.c
|
||||
SRC += smpr_sc_act.c
|
||||
SRC += smpr_sc_sm.c
|
||||
SRC += smpr_sm.c
|
||||
SRC += smp_act.c
|
||||
SRC += smp_db.c
|
||||
SRC += smp_main.c
|
||||
SRC += smp_non.c
|
||||
SRC += smp_sc_act.c
|
||||
SRC += smp_sc_main.c
|
||||
SRC += hci_main.c
|
||||
SRC += cfg_stack.c
|
||||
SRC += hci_cmd.c
|
||||
SRC += hci_cmd_ae.c
|
||||
SRC += hci_cmd_cte.c
|
||||
SRC += hci_cmd_past.c
|
||||
SRC += hci_cmd_phy.c
|
||||
SRC += hci_core.c
|
||||
SRC += hci_core_ps.c
|
||||
SRC += hci_evt.c
|
||||
SRC += hci_tr.c
|
||||
SRC += hci_vs.c
|
||||
SRC += hci_vs_ae.c
|
||||
SRC += hidapp_main.c
|
||||
SRC += am_util_ble.c
|
||||
SRC += am_util_debug.c
|
||||
SRC += am_util_delay.c
|
||||
SRC += am_util_faultisr.c
|
||||
SRC += am_util_id.c
|
||||
SRC += am_util_stdio.c
|
||||
SRC += event_groups.c
|
||||
SRC += list.c
|
||||
SRC += queue.c
|
||||
SRC += tasks.c
|
||||
SRC += timers.c
|
||||
SRC += heap_2.c
|
||||
SRC += am_devices_button.c
|
||||
SRC += am_devices_led.c
|
||||
SRC += svc_batt.c
|
||||
SRC += svc_bps.c
|
||||
SRC += svc_core.c
|
||||
SRC += svc_cps.c
|
||||
SRC += svc_cscs.c
|
||||
SRC += svc_dis.c
|
||||
SRC += svc_gls.c
|
||||
SRC += svc_gyro.c
|
||||
SRC += svc_hid.c
|
||||
SRC += svc_hrs.c
|
||||
SRC += svc_hts.c
|
||||
SRC += svc_ipss.c
|
||||
SRC += svc_plxs.c
|
||||
SRC += svc_px.c
|
||||
SRC += svc_rscs.c
|
||||
SRC += svc_scpss.c
|
||||
SRC += svc_temp.c
|
||||
SRC += svc_uricfg.c
|
||||
SRC += svc_wdxs.c
|
||||
SRC += svc_wp.c
|
||||
SRC += svc_wss.c
|
||||
SRC += tag_main.c
|
||||
SRC += app_disc.c
|
||||
SRC += app_main.c
|
||||
SRC += app_master.c
|
||||
SRC += app_master_leg.c
|
||||
SRC += app_server.c
|
||||
SRC += app_slave.c
|
||||
SRC += app_slave_leg.c
|
||||
SRC += app_terminal.c
|
||||
SRC += startup_gcc.c
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
### Bootloader Tools
|
||||
ASB_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/asb/asb.py
|
||||
SVL_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/svl/svl.py
|
||||
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
STARTUP_FILE := $(COMMONPATH)/examples/ble_freertos_tag/gcc/startup_$(COMPILERNAME).c
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
CXX = $(TOOLCHAIN)-g++
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC CXX
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Machinery
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
XSRC = $(filter %.cpp,$(SRC))
|
||||
ZSRC = $(filter %.cc,$(SRC))
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(XSRC:%.cpp=$(CONFIG)/%.o)
|
||||
OBJS+= $(ZSRC:%.cc=$(CONFIG)/%.o)
|
||||
OBJS+= $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(XSRC:%.cpp=$(CONFIG)/%.d)
|
||||
DEPS+= $(ZSRC:%.cc=$(CONFIG)/%.d)
|
||||
DEPS+= $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CSTD = -std=c99
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections -fomit-frame-pointer
|
||||
CFLAGS+= -MMD -MP $(CSTD) -Wall -g
|
||||
CFLAGS+= -O0
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
XSTD = -std=gnu++11
|
||||
|
||||
XFLAGS = $(CFLAGS)
|
||||
XFLAGS+= -fno-exceptions
|
||||
|
||||
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
LFLAGS+= -nostartfiles -static
|
||||
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
|
||||
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
|
||||
LFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
CPFLAGS = -Obinary
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Targets / Rules
|
||||
#
|
||||
#******************************************************************************
|
||||
all: asb
|
||||
asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
|
||||
directories: $(CONFIG)
|
||||
|
||||
$(CONFIG):
|
||||
@mkdir -p $@
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET)_asb.axf: LINKER_FILE := $(COMMONPATH)/examples/ble_freertos_tag/gcc/ble_freertos_tag_asb.ld
|
||||
$(CONFIG)/$(TARGET)_asb.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_svl.axf: LINKER_FILE := $(COMMONPATH)/examples/ble_freertos_tag/gcc/ble_freertos_tag_svl.ld
|
||||
$(CONFIG)/$(TARGET)_svl.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_%.bin: $(CONFIG)/$(TARGET)_%.axf
|
||||
@echo " Copying $(COMPILERNAME) $@..." ;\
|
||||
$(CP) $(CPFLAGS) $< $@ ;\
|
||||
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
|
||||
|
||||
bootload_asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
@echo "Uploading using the Ambiq Secure Bootloader"
|
||||
$(ASB_UPLOADER) --bin $(CONFIG)/$(TARGET)_asb.bin --load-address-blob 0x20000 --magic-num 0xCB -o $(CONFIG)/$(TARGET) --version 0x0 --load-address-wired 0xC000 -i 6 --options 0x1 -b $(ASB_UPLOAD_BAUD) -port $(COM_PORT) -r 2 -v
|
||||
|
||||
bootload_svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
@echo "Uploading using the SparkFun Variable Loader"
|
||||
$(SVL_UPLOADER) $(COM_PORT) -f $(CONFIG)/$(TARGET)_svl.bin -b $(SVL_UPLOAD_BAUD) -v
|
||||
|
||||
bootload: bootload_svl
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
|
||||
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map \
|
||||
$(CONFIG)/$(TARGET)_svl.bin $(CONFIG)/$(TARGET)_svl.axf \
|
||||
$(CONFIG)/$(TARGET)_svl.lst $(CONFIG)/$(TARGET)_svl.map \
|
||||
$(CONFIG)/$(TARGET)_asb.bin $(CONFIG)/$(TARGET)_asb.axf \
|
||||
$(CONFIG)/$(TARGET)_asb.lst $(CONFIG)/$(TARGET)_asb.map
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
$(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a:
|
||||
$(MAKE) -C $(SDKPATH)/mcu/apollo3/hal
|
||||
|
||||
$(BOARDPATH)/bsp/gcc/bin/libam_bsp.a:
|
||||
$(MAKE) -C $(BOARDPATH)/bsp
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories
|
||||
+63
@@ -0,0 +1,63 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* ble_freertos_tag.ld - Linker script for applications using startup_gnu.c
|
||||
*
|
||||
*****************************************************************************/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
ROMEM (rx) : ORIGIN = 0x0000C000, LENGTH = 960K
|
||||
RWMEM (rwx) : ORIGIN = 0x10000000, LENGTH = 384K
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector))
|
||||
KEEP(*(.patch))
|
||||
*(.text)
|
||||
*(.text*)
|
||||
*(.rodata)
|
||||
*(.rodata*)
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
} > ROMEM
|
||||
|
||||
/* User stack section initialized by startup code. */
|
||||
.stack (NOLOAD):
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.stack)
|
||||
*(.stack*)
|
||||
. = ALIGN(8);
|
||||
} > RWMEM
|
||||
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .;
|
||||
*(.data)
|
||||
*(.data*)
|
||||
. = ALIGN(4);
|
||||
_edata = .;
|
||||
} > RWMEM AT>ROMEM
|
||||
|
||||
/* used by startup to initialize data */
|
||||
_init_data = LOADADDR(.data);
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sbss = .;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = .;
|
||||
} > RWMEM
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
+63
@@ -0,0 +1,63 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* ble_freertos_tag.ld - Linker script for applications using startup_gnu.c
|
||||
*
|
||||
*****************************************************************************/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
ROMEM (rx) : ORIGIN = 0x00010000, LENGTH = 960K
|
||||
RWMEM (rwx) : ORIGIN = 0x10000000, LENGTH = 384K
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector))
|
||||
KEEP(*(.patch))
|
||||
*(.text)
|
||||
*(.text*)
|
||||
*(.rodata)
|
||||
*(.rodata*)
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
} > ROMEM
|
||||
|
||||
/* User stack section initialized by startup code. */
|
||||
.stack (NOLOAD):
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.stack)
|
||||
*(.stack*)
|
||||
. = ALIGN(8);
|
||||
} > RWMEM
|
||||
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .;
|
||||
*(.data)
|
||||
*(.data*)
|
||||
. = ALIGN(4);
|
||||
_edata = .;
|
||||
} > RWMEM AT>ROMEM
|
||||
|
||||
/* used by startup to initialize data */
|
||||
_init_data = LOADADDR(.data);
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sbss = .;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = .;
|
||||
} > RWMEM
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
+354
@@ -0,0 +1,354 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file startup_gcc.c
|
||||
//!
|
||||
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.3.2 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of interrupt handlers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void Reset_Handler(void) __attribute ((naked));
|
||||
extern void NMI_Handler(void) __attribute ((weak));
|
||||
extern void HardFault_Handler(void) __attribute ((weak));
|
||||
extern void MemManage_Handler(void) __attribute ((weak, alias ("HardFault_Handler")));
|
||||
extern void BusFault_Handler(void) __attribute ((weak, alias ("HardFault_Handler")));
|
||||
extern void UsageFault_Handler(void) __attribute ((weak, alias ("HardFault_Handler")));
|
||||
extern void SecureFault_Handler(void) __attribute ((weak));
|
||||
extern void SVC_Handler(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void DebugMon_Handler(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void PendSV_Handler(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void SysTick_Handler(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
|
||||
extern void am_brownout_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_watchdog_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_rtc_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_vcomp_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_ioslave_ios_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_ioslave_acc_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_iomaster0_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_iomaster1_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_iomaster2_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_iomaster3_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_iomaster4_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_iomaster5_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_ble_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_gpio_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_ctimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_uart_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_uart1_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_scard_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_adc_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_pdm0_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_mspi0_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_software0_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_stimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_stimer_cmpr0_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_stimer_cmpr1_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_stimer_cmpr2_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_stimer_cmpr3_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_stimer_cmpr4_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_stimer_cmpr5_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_stimer_cmpr6_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_stimer_cmpr7_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
extern void am_clkgen_isr(void) __attribute ((weak, alias ("am_default_isr")));
|
||||
|
||||
extern void am_default_isr(void) __attribute ((weak));
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the application.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern int main(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Reserve space for the system stack.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".stack")))
|
||||
static uint32_t g_pui32Stack[0xac0];
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The vector table. Note that the proper constructs must be placed on this to
|
||||
// ensure that it ends up at physical address 0x0000.0000.
|
||||
//
|
||||
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
|
||||
// am_usagefault_isr does not work if am_fault_isr is defined externally.
|
||||
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".isr_vector")))
|
||||
void (* const g_am_pfnVectors[])(void) =
|
||||
{
|
||||
(void (*)(void))((uint32_t)g_pui32Stack + sizeof(g_pui32Stack)),
|
||||
// The initial stack pointer
|
||||
Reset_Handler, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
MemManage_Handler, // The MemManage_Handler
|
||||
BusFault_Handler, // The BusFault_Handler
|
||||
UsageFault_Handler, // The UsageFault_Handler
|
||||
SecureFault_Handler, // The SecureFault_Handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVC_Handler, // SVCall handler
|
||||
DebugMon_Handler, // Debug monitor handler
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
//
|
||||
// Peripheral Interrupts
|
||||
//
|
||||
am_brownout_isr, // 0: Brownout (rstgen)
|
||||
am_watchdog_isr, // 1: Watchdog
|
||||
am_rtc_isr, // 2: RTC
|
||||
am_vcomp_isr, // 3: Voltage Comparator
|
||||
am_ioslave_ios_isr, // 4: I/O Slave general
|
||||
am_ioslave_acc_isr, // 5: I/O Slave access
|
||||
am_iomaster0_isr, // 6: I/O Master 0
|
||||
am_iomaster1_isr, // 7: I/O Master 1
|
||||
am_iomaster2_isr, // 8: I/O Master 2
|
||||
am_iomaster3_isr, // 9: I/O Master 3
|
||||
am_iomaster4_isr, // 10: I/O Master 4
|
||||
am_iomaster5_isr, // 11: I/O Master 5
|
||||
am_ble_isr, // 12: BLEIF
|
||||
am_gpio_isr, // 13: GPIO
|
||||
am_ctimer_isr, // 14: CTIMER
|
||||
am_uart_isr, // 15: UART0
|
||||
am_uart1_isr, // 16: UART1
|
||||
am_scard_isr, // 17: SCARD
|
||||
am_adc_isr, // 18: ADC
|
||||
am_pdm0_isr, // 19: PDM
|
||||
am_mspi0_isr, // 20: MSPI0
|
||||
am_software0_isr, // 21: SOFTWARE0
|
||||
am_stimer_isr, // 22: SYSTEM TIMER
|
||||
am_stimer_cmpr0_isr, // 23: SYSTEM TIMER COMPARE0
|
||||
am_stimer_cmpr1_isr, // 24: SYSTEM TIMER COMPARE1
|
||||
am_stimer_cmpr2_isr, // 25: SYSTEM TIMER COMPARE2
|
||||
am_stimer_cmpr3_isr, // 26: SYSTEM TIMER COMPARE3
|
||||
am_stimer_cmpr4_isr, // 27: SYSTEM TIMER COMPARE4
|
||||
am_stimer_cmpr5_isr, // 28: SYSTEM TIMER COMPARE5
|
||||
am_stimer_cmpr6_isr, // 29: SYSTEM TIMER COMPARE6
|
||||
am_stimer_cmpr7_isr, // 30: SYSTEM TIMER COMPARE7
|
||||
am_clkgen_isr, // 31: CLKGEN
|
||||
};
|
||||
|
||||
//******************************************************************************
|
||||
//
|
||||
// Place code immediately following vector table.
|
||||
//
|
||||
//******************************************************************************
|
||||
//******************************************************************************
|
||||
//
|
||||
// The Patch table.
|
||||
//
|
||||
// The patch table should pad the vector table size to a total of 64 entries
|
||||
// (16 core + 48 periph) such that code begins at offset 0x100.
|
||||
//
|
||||
//******************************************************************************
|
||||
__attribute__ ((section(".patch")))
|
||||
uint32_t const __Patchable[] =
|
||||
{
|
||||
0, // 32
|
||||
0, // 33
|
||||
0, // 34
|
||||
0, // 35
|
||||
0, // 36
|
||||
0, // 37
|
||||
0, // 38
|
||||
0, // 39
|
||||
0, // 40
|
||||
0, // 41
|
||||
0, // 42
|
||||
0, // 43
|
||||
0, // 44
|
||||
0, // 45
|
||||
0, // 46
|
||||
0, // 47
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are constructs created by the linker, indicating where the
|
||||
// the "data" and "bss" segments reside in memory. The initializers for the
|
||||
// "data" segment resides immediately following the "text" segment.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t _etext;
|
||||
extern uint32_t _sdata;
|
||||
extern uint32_t _edata;
|
||||
extern uint32_t _sbss;
|
||||
extern uint32_t _ebss;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// This is the code that gets called when the processor first starts execution
|
||||
// following a reset event. Only the absolutely necessary set is performed,
|
||||
// after which the application supplied entry() routine is called.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(__GNUC_STDC_INLINE__)
|
||||
void
|
||||
Reset_Handler(void)
|
||||
{
|
||||
//
|
||||
// Set the vector table pointer.
|
||||
//
|
||||
__asm(" ldr r0, =0xE000ED08\n"
|
||||
" ldr r1, =g_am_pfnVectors\n"
|
||||
" str r1, [r0]");
|
||||
|
||||
//
|
||||
// Set the stack pointer.
|
||||
//
|
||||
__asm(" ldr sp, [r1]");
|
||||
|
||||
#ifndef NOFPU
|
||||
//
|
||||
// Enable the FPU.
|
||||
//
|
||||
__asm("ldr r0, =0xE000ED88\n"
|
||||
"ldr r1,[r0]\n"
|
||||
"orr r1,#(0xF << 20)\n"
|
||||
"str r1,[r0]\n"
|
||||
"dsb\n"
|
||||
"isb\n");
|
||||
#endif
|
||||
//
|
||||
// Copy the data segment initializers from flash to SRAM.
|
||||
//
|
||||
__asm(" ldr r0, =_init_data\n"
|
||||
" ldr r1, =_sdata\n"
|
||||
" ldr r2, =_edata\n"
|
||||
"copy_loop:\n"
|
||||
" ldr r3, [r0], #4\n"
|
||||
" str r3, [r1], #4\n"
|
||||
" cmp r1, r2\n"
|
||||
" blt copy_loop\n");
|
||||
//
|
||||
// Zero fill the bss segment.
|
||||
//
|
||||
__asm(" ldr r0, =_sbss\n"
|
||||
" ldr r1, =_ebss\n"
|
||||
" mov r2, #0\n"
|
||||
"zero_loop:\n"
|
||||
" cmp r0, r1\n"
|
||||
" it lt\n"
|
||||
" strlt r2, [r0], #4\n"
|
||||
" blt zero_loop");
|
||||
|
||||
//
|
||||
// Call the application's entry point.
|
||||
//
|
||||
main();
|
||||
|
||||
//
|
||||
// If main returns then execute a break point instruction
|
||||
//
|
||||
__asm(" bkpt ");
|
||||
}
|
||||
#else
|
||||
#error GNU STDC inline not supported.
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// This is the code that gets called when the processor receives a NMI. This
|
||||
// simply enters an infinite loop, preserving the system state for examination
|
||||
// by a debugger.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
NMI_Handler(void)
|
||||
{
|
||||
//
|
||||
// Go into an infinite loop.
|
||||
//
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// This is the code that gets called when the processor receives a fault
|
||||
// interrupt. This simply enters an infinite loop, preserving the system state
|
||||
// for examination by a debugger.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
HardFault_Handler(void)
|
||||
{
|
||||
//
|
||||
// Go into an infinite loop.
|
||||
//
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// This is the code that gets called when the processor receives an unexpected
|
||||
// interrupt. This simply enters an infinite loop, preserving the system state
|
||||
// for examination by a debugger.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
am_default_isr(void)
|
||||
{
|
||||
//
|
||||
// Go into an infinite loop.
|
||||
//
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
+161
@@ -0,0 +1,161 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file FreeRTOSConfig.h
|
||||
//!
|
||||
//! @brief Configuration options for FreeRTOS
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.3.2 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
|
||||
#ifdef AM_PART_APOLLO
|
||||
#define configCPU_CLOCK_HZ 24000000UL
|
||||
#else
|
||||
#define configCPU_CLOCK_HZ 48000000UL
|
||||
#endif
|
||||
#define configTICK_RATE_HZ 1000
|
||||
#define configMAX_PRIORITIES 4
|
||||
#define configMINIMAL_STACK_SIZE (256)
|
||||
#define configTOTAL_HEAP_SIZE (16 * 1024)
|
||||
#define configMAX_TASK_NAME_LEN 16
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
|
||||
#define configUSE_MUTEXES 0
|
||||
#define configUSE_RECURSIVE_MUTEXES 0
|
||||
#define configUSE_COUNTING_SEMAPHORES 0
|
||||
#define configUSE_ALTERNATIVE_API 0 /* Deprecated! */
|
||||
#define configQUEUE_REGISTRY_SIZE 0
|
||||
#define configUSE_QUEUE_SETS 0
|
||||
#define configUSE_TIME_SLICING 0
|
||||
#define configUSE_NEWLIB_REENTRANT 0
|
||||
#define configENABLE_BACKWARD_COMPATIBILITY 0
|
||||
|
||||
/* Hook function related definitions. */
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configUSE_MALLOC_FAILED_HOOK 1
|
||||
|
||||
/* Run time and task stats gathering related definitions. */
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
#define configUSE_TRACE_FACILITY 0
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
|
||||
|
||||
/* Software timer related definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY 3
|
||||
#define configTIMER_QUEUE_LENGTH 5
|
||||
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
|
||||
|
||||
/* Interrupt nesting behaviour configuration. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY (0x7 << 5)
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY (0x4 << 5)
|
||||
#define NVIC_configKERNEL_INTERRUPT_PRIORITY (0x7)
|
||||
#define NVIC_configMAX_SYSCALL_INTERRUPT_PRIORITY (0x4)
|
||||
|
||||
/* Define to trap errors during development. */
|
||||
#define configASSERT(x) if (( x ) == 0) while(1);
|
||||
|
||||
/* FreeRTOS MPU specific definitions. */
|
||||
#define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0
|
||||
|
||||
/* Optional functions - most linkers will remove unused functions anyway. */
|
||||
#define INCLUDE_vTaskPrioritySet 0
|
||||
#define INCLUDE_uxTaskPriorityGet 0
|
||||
#define INCLUDE_vTaskDelete 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_xResumeFromISR 0
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 0
|
||||
#define INCLUDE_xTaskGetSchedulerState 0
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 0
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 0
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 0
|
||||
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
|
||||
#define INCLUDE_pcTaskGetTaskName 0
|
||||
#define INCLUDE_eTaskGetState 0
|
||||
#define INCLUDE_xEventGroupSetBitFromISR 1
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
|
||||
#define vPortSVCHandler SVC_Handler
|
||||
#define xPortPendSVHandler PendSV_Handler
|
||||
#define xPortSysTickHandler SysTick_Handler
|
||||
|
||||
#define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 1 // Enable non-SysTick based Tick
|
||||
#define configUSE_TICKLESS_IDLE 2 // Ambiq specific implementation for Tickless
|
||||
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
extern uint32_t am_freertos_sleep(uint32_t);
|
||||
extern void am_freertos_wakeup(uint32_t);
|
||||
|
||||
#define configPRE_SLEEP_PROCESSING( time ) \
|
||||
do { \
|
||||
(time) = am_freertos_sleep(time); \
|
||||
} while (0);
|
||||
|
||||
#define configPOST_SLEEP_PROCESSING(time) am_freertos_wakeup(time)
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
#ifndef AM_PART_APOLLO
|
||||
#define AM_FREERTOS_USE_STIMER_FOR_TICK
|
||||
#endif
|
||||
|
||||
#ifdef AM_FREERTOS_USE_STIMER_FOR_TICK
|
||||
#define configSTIMER_CLOCK_HZ 32768
|
||||
#else // Use CTimer
|
||||
#define configCTIMER_CLOCK_HZ 32768
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // FREERTOS_CONFIG_H
|
||||
|
||||
+166
@@ -0,0 +1,166 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file ble_freertos_tag.c
|
||||
//!
|
||||
//! @brief ARM Cordio BLE - Proximity Tag Example
|
||||
//!
|
||||
//! Purpose: This is a standard BLE Proximity Profile example.
|
||||
//!
|
||||
//! Printing takes place over the ITM at 1M Baud.
|
||||
//!
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.3.2 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// This application has a large number of common include files. For
|
||||
// convenience, we'll collect them all together in a single header and include
|
||||
// that everywhere.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#include "ble_freertos_tag.h"
|
||||
#include "rtos.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Enable printing to the console.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
enable_print_interface(void)
|
||||
{
|
||||
//
|
||||
// Initialize a debug printing interface.
|
||||
//
|
||||
am_bsp_itm_printf_enable();
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Main Function
|
||||
//
|
||||
//*****************************************************************************
|
||||
int
|
||||
main(void)
|
||||
{
|
||||
//
|
||||
// Set the clock frequency
|
||||
//
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
|
||||
//
|
||||
// Set the default cache configuration
|
||||
//
|
||||
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
|
||||
am_hal_cachectrl_enable();
|
||||
|
||||
#ifndef NOFPU
|
||||
//
|
||||
// Enable the floating point module, and configure the core for lazy
|
||||
// stacking.
|
||||
//
|
||||
am_hal_sysctrl_fpu_enable();
|
||||
am_hal_sysctrl_fpu_stacking_enable(true);
|
||||
#else
|
||||
am_hal_sysctrl_fpu_disable();
|
||||
#endif
|
||||
|
||||
//
|
||||
// Configure the board for low power.
|
||||
//
|
||||
am_bsp_low_power_init();
|
||||
|
||||
// Turn off unused Flash & SRAM
|
||||
|
||||
#ifdef AM_PART_APOLLO
|
||||
//
|
||||
// SRAM bank power setting.
|
||||
// Need to match up with actual SRAM usage for the program
|
||||
// Current usage is between 32K and 40K - so disabling upper 3 banks
|
||||
//
|
||||
am_hal_mcuctrl_sram_power_set(AM_HAL_MCUCTRL_SRAM_POWER_DOWN_5 |
|
||||
AM_HAL_MCUCTRL_SRAM_POWER_DOWN_6 |
|
||||
AM_HAL_MCUCTRL_SRAM_POWER_DOWN_7,
|
||||
AM_HAL_MCUCTRL_SRAM_POWER_DOWN_5 |
|
||||
AM_HAL_MCUCTRL_SRAM_POWER_DOWN_6 |
|
||||
AM_HAL_MCUCTRL_SRAM_POWER_DOWN_7);
|
||||
|
||||
#if 0 // Not turning off the Flash as it may be needed to download the image
|
||||
//
|
||||
// Flash bank power set.
|
||||
//
|
||||
am_hal_mcuctrl_flash_power_set(AM_HAL_MCUCTRL_FLASH_POWER_DOWN_1);
|
||||
#endif
|
||||
#endif // AM_PART_APOLLO
|
||||
|
||||
#ifdef AM_PART_APOLLO2
|
||||
#if 0 // Not turning off the Flash as it may be needed to download the image
|
||||
am_hal_pwrctrl_memory_enable(AM_HAL_PWRCTRL_MEMEN_FLASH512K);
|
||||
#endif
|
||||
am_hal_pwrctrl_memory_enable(AM_HAL_PWRCTRL_MEMEN_SRAM64K);
|
||||
#endif // AM_PART_APOLLO2
|
||||
|
||||
//
|
||||
// Enable printing to the console.
|
||||
//
|
||||
#ifdef AM_DEBUG_PRINTF
|
||||
enable_print_interface();
|
||||
#endif
|
||||
|
||||
//
|
||||
// Initialize plotting interface.
|
||||
//
|
||||
am_util_debug_printf("FreeRTOS Tag Example\n");
|
||||
|
||||
//
|
||||
// Run the application.
|
||||
//
|
||||
run_tasks();
|
||||
|
||||
//
|
||||
// We shouldn't ever get here.
|
||||
//
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
+89
@@ -0,0 +1,89 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file ble_freertos_tag.h
|
||||
//!
|
||||
//! @brief Global includes for the ble_freertos_tag app.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.3.2 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef BLE_FREERTOS_TAG_H
|
||||
#define BLE_FREERTOS_TAG_H
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Required built-ins.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Standard AmbiqSuite includes.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// FreeRTOS include files.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "portmacro.h"
|
||||
#include "portable.h"
|
||||
#include "semphr.h"
|
||||
#include "event_groups.h"
|
||||
//#include "rtos.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Task include files.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#include "radio_task.h"
|
||||
|
||||
#endif // FREERTOS_FIT_H
|
||||
+77
@@ -0,0 +1,77 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file hci_apollo_config.h
|
||||
//!
|
||||
//! @brief This file describes the physical aspects of the HCI conection.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.3.2 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include <stdint.h>
|
||||
#include "am_bsp.h"
|
||||
|
||||
#ifndef HCI_APOLLO_CONFIG_H
|
||||
#define HCI_APOLLO_CONFIG_H
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Pin numbers and configuration.
|
||||
//
|
||||
// NOTE: RTS, CTS, and RESET are implemented as GPIOs, so no "CFG" field is
|
||||
// needed.
|
||||
//
|
||||
//*****************************************************************************
|
||||
//#define HCI_APOLLO_POWER_PIN AM_BSP_GPIO_EM9304_POWER
|
||||
//#define HCI_APOLLO_POWER_CFG AM_BSP_GPIO_CFG_EM9304_POWER
|
||||
|
||||
#define HCI_APOLLO_RESET_PIN AM_BSP_GPIO_EM9304_RESET
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Other options.
|
||||
//
|
||||
// These options are provided in case your board setup is a little more
|
||||
// unusual. Most boards shouldn't need these features. If in doubt, leave all
|
||||
// of these features disabled.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HCI_APOLLO_CFG_OVERRIDE_ISR 1 // Override the exactle UART ISR
|
||||
|
||||
#endif // HCI_APOLLO_CONFIG_H
|
||||
+401
@@ -0,0 +1,401 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file radio_task.c
|
||||
//!
|
||||
//! @brief Task to handle radio operation.
|
||||
//!
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.3.2 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Global includes for this project.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#include "ble_freertos_tag.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// WSF standard includes.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#include "wsf_types.h"
|
||||
#include "wsf_trace.h"
|
||||
#include "wsf_buf.h"
|
||||
#include "wsf_timer.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Includes for operating the ExactLE stack.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#include "hci_handler.h"
|
||||
#include "dm_handler.h"
|
||||
#include "l2c_handler.h"
|
||||
#include "att_handler.h"
|
||||
#include "smp_handler.h"
|
||||
#include "l2c_api.h"
|
||||
#include "att_api.h"
|
||||
#include "smp_api.h"
|
||||
#include "app_api.h"
|
||||
#include "hci_core.h"
|
||||
#include "hci_drv.h"
|
||||
#include "hci_drv_apollo.h"
|
||||
#include "hci_drv_apollo3.h"
|
||||
#include "hci_apollo_config.h"
|
||||
|
||||
#include "wsf_msg.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//
|
||||
//*****************************************************************************
|
||||
#include "tag_api.h"
|
||||
#include "app_ui.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Radio task handle.
|
||||
//
|
||||
//*****************************************************************************
|
||||
TaskHandle_t radio_task_handle;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Function prototypes
|
||||
//
|
||||
//*****************************************************************************
|
||||
void exactle_stack_init(void);
|
||||
void button_handler(wsfEventMask_t event, wsfMsgHdr_t *pMsg);
|
||||
void setup_buttons(void);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Timer for buttons.
|
||||
//
|
||||
//*****************************************************************************
|
||||
wsfHandlerId_t ButtonHandlerId;
|
||||
wsfTimer_t ButtonTimer;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// WSF buffer pools.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define WSF_BUF_POOLS 4
|
||||
|
||||
// Important note: the size of g_pui32BufMem should includes both overhead of internal
|
||||
// buffer management structure, wsfBufPool_t (up to 16 bytes for each pool), and pool
|
||||
// description (e.g. g_psPoolDescriptors below).
|
||||
|
||||
// Memory for the buffer pool
|
||||
// extra AMOTA_PACKET_SIZE bytes for OTA handling
|
||||
static uint32_t g_pui32BufMem[
|
||||
(WSF_BUF_POOLS*16
|
||||
+ 16*8 + 32*4 + 64*6 + 280*8) / sizeof(uint32_t)];
|
||||
|
||||
// Default pool descriptor.
|
||||
static wsfBufPoolDesc_t g_psPoolDescriptors[WSF_BUF_POOLS] =
|
||||
{
|
||||
{ 16, 8 },
|
||||
{ 32, 4 },
|
||||
{ 64, 6 },
|
||||
{ 280, 8 }
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Tracking variable for the scheduler timer.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
void radio_timer_handler(void);
|
||||
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Poll the buttons.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
button_handler(wsfEventMask_t event, wsfMsgHdr_t *pMsg)
|
||||
{
|
||||
//
|
||||
// Restart the button timer.
|
||||
//
|
||||
WsfTimerStartMs(&ButtonTimer, 10);
|
||||
|
||||
#ifdef AM_BSP_NUM_BUTTONS
|
||||
//
|
||||
// Every time we get a button timer tick, check all of our buttons.
|
||||
//
|
||||
am_devices_button_array_tick(am_bsp_psButtons, AM_BSP_NUM_BUTTONS);
|
||||
|
||||
//
|
||||
// If we got a a press, do something with it.
|
||||
//
|
||||
if ( am_devices_button_released(am_bsp_psButtons[0]) )
|
||||
{
|
||||
am_util_debug_printf("Got Button 0 Press\n");
|
||||
AppUiBtnTest(APP_UI_BTN_1_SHORT);
|
||||
}
|
||||
|
||||
if ( am_devices_button_released(am_bsp_psButtons[1]) )
|
||||
{
|
||||
am_util_debug_printf("Got Button 1 Press\n");
|
||||
AppUiBtnTest(APP_UI_BTN_1_SHORT);
|
||||
}
|
||||
|
||||
if ( am_devices_button_released(am_bsp_psButtons[2]) )
|
||||
{
|
||||
am_util_debug_printf("Got Button 2 Press\n");
|
||||
}
|
||||
#endif // AM_BSP_NUM_BUTTONS
|
||||
}
|
||||
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Sets up a button interface.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
setup_buttons(void)
|
||||
{
|
||||
#ifdef AM_BSP_NUM_BUTTONS
|
||||
//
|
||||
// Enable the buttons for user interaction.
|
||||
//
|
||||
am_devices_button_array_init(am_bsp_psButtons, AM_BSP_NUM_BUTTONS);
|
||||
|
||||
//
|
||||
// Start a timer.
|
||||
//
|
||||
ButtonTimer.handlerId = ButtonHandlerId;
|
||||
WsfTimerStartSec(&ButtonTimer, 2);
|
||||
#endif // AM_BSP_NUM_BUTTONS
|
||||
}
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Initialization for the ExactLE stack.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
exactle_stack_init(void)
|
||||
{
|
||||
wsfHandlerId_t handlerId;
|
||||
uint16_t wsfBufMemLen;
|
||||
//
|
||||
// Set up timers for the WSF scheduler.
|
||||
//
|
||||
WsfOsInit();
|
||||
WsfTimerInit();
|
||||
|
||||
//
|
||||
// Initialize a buffer pool for WSF dynamic memory needs.
|
||||
//
|
||||
wsfBufMemLen = WsfBufInit(sizeof(g_pui32BufMem), (uint8_t *)g_pui32BufMem, WSF_BUF_POOLS,
|
||||
g_psPoolDescriptors);
|
||||
|
||||
if (wsfBufMemLen > sizeof(g_pui32BufMem))
|
||||
{
|
||||
am_util_debug_printf("Memory pool is too small by %d\r\n",
|
||||
wsfBufMemLen - sizeof(g_pui32BufMem));
|
||||
}
|
||||
|
||||
//
|
||||
// Initialize the WSF security service.
|
||||
//
|
||||
SecInit();
|
||||
SecAesInit();
|
||||
SecCmacInit();
|
||||
SecEccInit();
|
||||
|
||||
//
|
||||
// Set up callback functions for the various layers of the ExactLE stack.
|
||||
//
|
||||
handlerId = WsfOsSetNextHandler(HciHandler);
|
||||
HciHandlerInit(handlerId);
|
||||
|
||||
handlerId = WsfOsSetNextHandler(DmHandler);
|
||||
DmDevVsInit(0);
|
||||
DmAdvInit();
|
||||
DmConnInit();
|
||||
DmConnSlaveInit();
|
||||
DmSecInit();
|
||||
DmSecLescInit();
|
||||
DmPrivInit();
|
||||
DmHandlerInit(handlerId);
|
||||
|
||||
handlerId = WsfOsSetNextHandler(L2cSlaveHandler);
|
||||
L2cSlaveHandlerInit(handlerId);
|
||||
L2cInit();
|
||||
L2cSlaveInit();
|
||||
|
||||
handlerId = WsfOsSetNextHandler(AttHandler);
|
||||
AttHandlerInit(handlerId);
|
||||
AttsInit();
|
||||
AttsIndInit();
|
||||
AttcInit();
|
||||
|
||||
handlerId = WsfOsSetNextHandler(SmpHandler);
|
||||
SmpHandlerInit(handlerId);
|
||||
SmprInit();
|
||||
SmprScInit();
|
||||
HciSetMaxRxAclLen(251);
|
||||
|
||||
handlerId = WsfOsSetNextHandler(AppHandler);
|
||||
AppHandlerInit(handlerId);
|
||||
|
||||
handlerId = WsfOsSetNextHandler(TagHandler);
|
||||
TagHandlerInit(handlerId);
|
||||
|
||||
ButtonHandlerId = WsfOsSetNextHandler(button_handler);
|
||||
|
||||
handlerId = WsfOsSetNextHandler(HciDrvHandler);
|
||||
HciDrvHandlerInit(handlerId);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART interrupt handler.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
am_uart_isr(void)
|
||||
{
|
||||
uint32_t ui32Status;
|
||||
|
||||
//
|
||||
// Read and save the interrupt status, but clear out the status register.
|
||||
//
|
||||
ui32Status = UARTn(0)->MIS;
|
||||
UARTn(0)->IEC = ui32Status;
|
||||
|
||||
//
|
||||
// Allow the HCI driver to respond to the interrupt.
|
||||
//
|
||||
//HciDrvUartISR(ui32Status);
|
||||
|
||||
// Signal radio task to run
|
||||
|
||||
WsfTaskSetReady(0, 0);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Interrupt handler for BLE
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
am_ble_isr(void)
|
||||
{
|
||||
|
||||
HciDrvIntService();
|
||||
|
||||
// Signal radio task to run
|
||||
|
||||
WsfTaskSetReady(0, 0);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Perform initial setup for the radio task.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
RadioTaskSetup(void)
|
||||
{
|
||||
am_util_debug_printf("RadioTask: setup\r\n");
|
||||
|
||||
|
||||
NVIC_SetPriority(BLE_IRQn, NVIC_configMAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
|
||||
//
|
||||
// Boot the radio.
|
||||
//
|
||||
HciDrvRadioBoot(1);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Short Description.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
RadioTask(void *pvParameters)
|
||||
{
|
||||
#if WSF_TRACE_ENABLED == TRUE
|
||||
//
|
||||
// Enable ITM
|
||||
//
|
||||
am_util_debug_printf("Starting wicentric trace:\n\n");
|
||||
#endif
|
||||
|
||||
//
|
||||
// Initialize the main ExactLE stack.
|
||||
//
|
||||
exactle_stack_init();
|
||||
|
||||
//
|
||||
// Prep the buttons for use
|
||||
//
|
||||
|
||||
setup_buttons();
|
||||
|
||||
//
|
||||
// Start the "Tag" profile.
|
||||
//
|
||||
TagStart();
|
||||
|
||||
while (1)
|
||||
{
|
||||
|
||||
//
|
||||
// Calculate the elapsed time from our free-running timer, and update
|
||||
// the software timers in the WSF scheduler.
|
||||
//
|
||||
wsfOsDispatcher();
|
||||
|
||||
}
|
||||
}
|
||||
+65
@@ -0,0 +1,65 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file radio_task.h
|
||||
//!
|
||||
//! @brief Functions and variables related to the radio task.
|
||||
//!
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.3.2 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef RADIO_TASK_H
|
||||
#define RADIO_TASK_H
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Radio task handle.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern TaskHandle_t radio_task_handle;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External function definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void RadioTaskSetup(void);
|
||||
extern void RadioTask(void *pvParameters);
|
||||
|
||||
#endif // RADIO_TASK_H
|
||||
+214
@@ -0,0 +1,214 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file rtos.c
|
||||
//!
|
||||
//! @brief Essential functions to make the RTOS run correctly.
|
||||
//!
|
||||
//! These functions are required by the RTOS for ticking, sleeping, and basic
|
||||
//! error checking.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.3.2 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "queue.h"
|
||||
#include "portmacro.h"
|
||||
#include "portable.h"
|
||||
#include "ble_freertos_tag.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Task handle for the initial setup task.
|
||||
//
|
||||
//*****************************************************************************
|
||||
TaskHandle_t xSetupTask;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Interrupt handler for the CTIMER module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
am_ctimer_isr(void)
|
||||
{
|
||||
uint32_t ui32Status;
|
||||
|
||||
//
|
||||
// Check the timer interrupt status.
|
||||
//
|
||||
ui32Status = am_hal_ctimer_int_status_get(false);
|
||||
am_hal_ctimer_int_clear(ui32Status);
|
||||
|
||||
//
|
||||
// Run handlers for the various possible timer events.
|
||||
//
|
||||
am_hal_ctimer_int_service(ui32Status);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Sleep function called from FreeRTOS IDLE task.
|
||||
// Do necessary application specific Power down operations here
|
||||
// Return 0 if this function also incorporates the WFI, else return value same
|
||||
// as idleTime
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t am_freertos_sleep(uint32_t idleTime)
|
||||
{
|
||||
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
|
||||
return 0;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Recovery function called from FreeRTOS IDLE task, after waking up from Sleep
|
||||
// Do necessary 'wakeup' operations here, e.g. to power up/enable peripherals etc.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void am_freertos_wakeup(uint32_t idleTime)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// FreeRTOS debugging functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
vApplicationMallocFailedHook(void)
|
||||
{
|
||||
//
|
||||
// Called if a call to pvPortMalloc() fails because there is insufficient
|
||||
// free memory available in the FreeRTOS heap. pvPortMalloc() is called
|
||||
// internally by FreeRTOS API functions that create tasks, queues, software
|
||||
// timers, and semaphores. The size of the FreeRTOS heap is set by the
|
||||
// configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h.
|
||||
//
|
||||
while (1);
|
||||
}
|
||||
|
||||
void
|
||||
vApplicationStackOverflowHook(TaskHandle_t pxTask, char *pcTaskName)
|
||||
{
|
||||
(void) pcTaskName;
|
||||
(void) pxTask;
|
||||
|
||||
//
|
||||
// Run time stack overflow checking is performed if
|
||||
// configconfigCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook
|
||||
// function is called if a stack overflow is detected.
|
||||
//
|
||||
while (1)
|
||||
{
|
||||
__asm("BKPT #0\n") ; // Break into the debugger
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// High priority task to run immediately after the scheduler starts.
|
||||
//
|
||||
// This task is used for any global initialization that must occur after the
|
||||
// scheduler starts, but before any functional tasks are running. This can be
|
||||
// useful for enabling events, semaphores, and other global, RTOS-specific
|
||||
// features.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
setup_task(void *pvParameters)
|
||||
{
|
||||
//
|
||||
// Print a debug message.
|
||||
//
|
||||
am_util_debug_printf("Running setup tasks...\r\n");
|
||||
|
||||
//
|
||||
// Run setup functions.
|
||||
//
|
||||
RadioTaskSetup();
|
||||
|
||||
//
|
||||
// Create the functional tasks
|
||||
//
|
||||
xTaskCreate(RadioTask, "RadioTask", 512, 0, 3, &radio_task_handle);
|
||||
|
||||
//
|
||||
// The setup operations are complete, so suspend the setup task now.
|
||||
//
|
||||
vTaskSuspend(NULL);
|
||||
|
||||
while (1);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Initializes all tasks
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
run_tasks(void)
|
||||
{
|
||||
//
|
||||
// Set some interrupt priorities before we create tasks or start the scheduler.
|
||||
//
|
||||
// Note: Timer priority is handled by the FreeRTOS kernel, so we won't
|
||||
// touch it here.
|
||||
//
|
||||
|
||||
//
|
||||
// Create essential tasks.
|
||||
//
|
||||
xTaskCreate(setup_task, "Setup", 512, 0, 3, &xSetupTask);
|
||||
|
||||
//
|
||||
// Start the scheduler.
|
||||
//
|
||||
vTaskStartScheduler();
|
||||
}
|
||||
|
||||
+75
@@ -0,0 +1,75 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file rtos.h
|
||||
//!
|
||||
//! @brief Essential functions to make the RTOS run
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.3.2 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef RTOS_H
|
||||
#define RTOS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macro definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
// External variable definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External function definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void run_tasks(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // RTOS_H
|
||||
|
||||
@@ -0,0 +1,401 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# This is an example makefile for SparkFun Apollo3 boards as used in the
|
||||
# AmbiqSuite SDK.
|
||||
#
|
||||
# Recommended usage
|
||||
# make
|
||||
# make bootload_svl (uses the SparkFun Variable Loader to upload code)
|
||||
# make bootload_asb (uses the Ambiq Secure Bootlaoder to upload code)
|
||||
# make clean
|
||||
#
|
||||
# Filepaths
|
||||
# You can relocate this makefile easily by providing the path to the root of
|
||||
# the AmbiqSuite SDK. If that path is not specified then this file will
|
||||
# assume that it is located in
|
||||
# <AmbiqSDKRoot>/boards/<your_board>/examples/<your_example>/gcc
|
||||
# and use relative paths
|
||||
#
|
||||
# User Configuration
|
||||
# You must also specify which COM_PORT to use if you want to use the
|
||||
# 'bootlaoder' targets.
|
||||
# Windows example: COM_PORT=COM4
|
||||
# *nix example: COM_PORT=/dev/usbserialxxxx
|
||||
#
|
||||
# Python vs. Executable
|
||||
# For simplicity the upload tools are called as Python scripts by default.
|
||||
# Make sure PYTHON is set to the appropriate command to run Python3 from the
|
||||
# command line.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Options
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# You can override these values on the command line e.g. make bootload COM_PORT=/dev/cu***
|
||||
# COM_PORT is the serial port to use for uploading. For example COM#### on Windows or /dev/cu.usbserial-#### on *nix
|
||||
COM_PORT ?=
|
||||
# ASB_UPLOAD_BAUD is the baud rate setting of the Ambiq Secue Bootloader (ASB) as it is configured on the Apollo3. Defautls to 115200 if unset
|
||||
ASB_UPLOAD_BAUD ?=
|
||||
# SVL_UPLOAD_BAUD is the baud rate setting of the SparkFun Variable Loader (SVL). Defaults to 921600 if unset
|
||||
SVL_UPLOAD_BAUD ?=
|
||||
# PYTHON3 should evaluate to a call to the Python3 executable on your machine
|
||||
PYTHON3 ?=
|
||||
|
||||
# *Optionally* specify absolute paths to the SDK and the BSP
|
||||
# You can do this on the command line - e.g. make bootload SDKPATH=~/$AMBIQ_SDK_ROOT_PATH
|
||||
# Make sure to use / instead of \ when on Windows
|
||||
SDKPATH ?=# Set as the path to the SDK root if not located at ../../../../..
|
||||
COMMONPATH ?=# Set as the path to the BSP common folder if not located at ../../../../common
|
||||
BOARDPATH ?=# Set as the path to the board if not located at ../../..
|
||||
PROJECTPATH ?=# Set as the path to the project if not located at ..
|
||||
BOARD ?=# If using a SparkFun board you can simply provide the name e.g. redboard_artemis_atp
|
||||
|
||||
### Project Settings
|
||||
TARGET := blinky
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := blinky_gcc
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
ifeq ($(BOARD),)
|
||||
$(warning warning: no BOARD specified, will fall back to BOARDPATH for arbitrary bsp locations)
|
||||
else
|
||||
BOARDPATH=../../../../$(BOARD)
|
||||
$(warning Using BOARD=$(BOARD) at $(BOARDPATH))
|
||||
endif
|
||||
|
||||
ifeq ($(COM_PORT),)
|
||||
COM_PORT=COM4
|
||||
$(warning warning: you have not defined COM_PORT. Assuming it is COM4)
|
||||
endif
|
||||
ifeq ($(PYTHON3),)
|
||||
PYTHON3=python3
|
||||
$(warning warning: you have not defined PYTHON3. assuming it is accessible by 'python3')
|
||||
endif
|
||||
ifeq ($(ASB_UPLOAD_BAUD),)
|
||||
ASB_UPLOAD_BAUD=115200
|
||||
$(warning defaulting to 115200 baud for ASB)
|
||||
endif
|
||||
ifeq ($(SVL_UPLOAD_BAUD),)
|
||||
SVL_UPLOAD_BAUD=921600
|
||||
$(warning defaulting to 921600 baud for SVL)
|
||||
endif
|
||||
|
||||
ifeq ($(SDKPATH),)
|
||||
SDKPATH =../../../../..
|
||||
$(warning warning: you have not defined SDKPATH so will continue assuming that the SDK root is at $(SDKPATH))
|
||||
else
|
||||
# When the SDKPATH is given export it
|
||||
export SDKPATH
|
||||
endif
|
||||
|
||||
ifeq ($(COMMONPATH),)
|
||||
COMMONPATH =../../../../common
|
||||
$(warning warning: you have not defined COMMONPATH so will continue assuming that the COMMON root is at $(COMMONPATH))
|
||||
else
|
||||
# When the COMMONPATH is given export it
|
||||
export COMMONPATH
|
||||
endif
|
||||
|
||||
ifeq ($(BOARDPATH),)
|
||||
$(error Error: BOARDPATH must be provided)
|
||||
else
|
||||
# Ensure that boardpath does not include a trailing '/'
|
||||
ifeq ($(notdir $(BOARDPATH)),)
|
||||
override BOARDPATH:=$(patsubst %/, %,$(BOARDPATH))
|
||||
$(warning BOARDPATH had a trivial 'notdir' so we tried changing it to: $(BOARDPATH))
|
||||
endif
|
||||
BOARD=$(notdir $(BOARDPATH))
|
||||
# When the BOARDPATH is given export it
|
||||
export BOARDPATH
|
||||
endif
|
||||
|
||||
ifeq ($(PROJECTPATH),)
|
||||
PROJECTPATH =..
|
||||
$(warning warning: you have not defined PROJECTPATH so will continue assuming that the PROJECT root is at $(PROJECTPATH))
|
||||
else
|
||||
# When the PROJECTPATH is given export it
|
||||
export PROJECTPATH
|
||||
endif
|
||||
|
||||
CONFIG := $(PROJECTPATH)/gcc/$(BOARD)/bin
|
||||
$(warning CONFIG=$(CONFIG))
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Defines / Includes / Sources / Libraries
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Global Defines
|
||||
DEFINES= -DPART_$(PART)
|
||||
DEFINES+= -DAM_CUSTOM_BDADDR
|
||||
DEFINES+= -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -DAM_DEBUG_PRINTF
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
DEFINES+=
|
||||
|
||||
# Includes (Add paths to where example header files are located)
|
||||
INCLUDES=
|
||||
INCLUDES+= -I$(PROJECTPATH)/src
|
||||
INCLUDES+= -I$(BOARDPATH)/bsp
|
||||
INCLUDES+= -I$(SDKPATH)
|
||||
INCLUDES+= -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
INCLUDES+=
|
||||
|
||||
# Compilation Units (Add all the .c files you need to compile)
|
||||
SRC=
|
||||
SRC+= main.c
|
||||
SRC+= startup_gcc.c
|
||||
SRC+= am_util_delay.c
|
||||
SRC+= am_util_faultisr.c
|
||||
SRC+= am_util_stdio.c
|
||||
SRC+= am_devices_led.c
|
||||
SRC+=
|
||||
|
||||
# VPATH (Add paths to where your source files are located)
|
||||
VPATH=
|
||||
VPATH+= $(PROJECTPATH)/src
|
||||
VPATH+= $(SDKPATH)/utils
|
||||
VPATH+= $(SDKPATH)/devices
|
||||
VPATH+= $(COMMONPATH)/examples/blinky
|
||||
VPATH+= $(COMMONPATH)/tools_sfe/templates
|
||||
VPATH+=
|
||||
|
||||
# LIBS (Precompiled libraries to include in the linker step)
|
||||
LIBS=
|
||||
LIBS+= $(BOARDPATH)/bsp/gcc/bin/libam_bsp.a
|
||||
LIBS+= $(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a
|
||||
LIBS+=
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
### Bootloader Tools
|
||||
ASB_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/asb/asb.py
|
||||
SVL_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/svl/svl.py
|
||||
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
STARTUP_FILE := ./startup_$(COMPILERNAME).c
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
CXX = $(TOOLCHAIN)-g++
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC CXX
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Machinery
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
XSRC = $(filter %.cpp,$(SRC))
|
||||
ZSRC = $(filter %.cc,$(SRC))
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(XSRC:%.cpp=$(CONFIG)/%.o)
|
||||
OBJS+= $(ZSRC:%.cc=$(CONFIG)/%.o)
|
||||
OBJS+= $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(XSRC:%.cpp=$(CONFIG)/%.d)
|
||||
DEPS+= $(ZSRC:%.cc=$(CONFIG)/%.d)
|
||||
DEPS+= $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CSTD = -std=c99
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP $(CSTD) -Wall -g
|
||||
CFLAGS+= -O0
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
XSTD = -std=gnu++11
|
||||
|
||||
XFLAGS = $(CFLAGS)
|
||||
XFLAGS+= -fno-exceptions
|
||||
|
||||
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
LFLAGS+= -nostartfiles -static
|
||||
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
|
||||
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
|
||||
LFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
CPFLAGS = -Obinary
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Targets / Rules
|
||||
#
|
||||
#******************************************************************************
|
||||
all: asb
|
||||
asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.cpp $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.cc $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET)_asb.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_linker.ld
|
||||
$(CONFIG)/$(TARGET)_asb.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_svl.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_svl_linker.ld
|
||||
$(CONFIG)/$(TARGET)_svl.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_%.bin: $(CONFIG)/$(TARGET)_%.axf
|
||||
@echo " Copying $(COMPILERNAME) $@..." ;\
|
||||
$(CP) $(CPFLAGS) $< $@ ;\
|
||||
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
|
||||
|
||||
bootload_asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
$(ASB_UPLOADER) --bin $(CONFIG)/$(TARGET)_asb.bin --load-address-blob 0x20000 --magic-num 0xCB -o $(CONFIG)/$(TARGET) --version 0x0 --load-address-wired 0xC000 -i 6 --options 0x1 -b $(ASB_UPLOAD_BAUD) -port $(COM_PORT) -r 2 -v
|
||||
|
||||
bootload_svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
$(SVL_UPLOADER) $(COM_PORT) -f $(CONFIG)/$(TARGET)_svl.bin -b $(SVL_UPLOAD_BAUD) -v
|
||||
|
||||
bootload: bootload_svl
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
|
||||
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map \
|
||||
$(CONFIG)/$(TARGET)_svl.bin $(CONFIG)/$(TARGET)_svl.axf \
|
||||
$(CONFIG)/$(TARGET)_svl.lst $(CONFIG)/$(TARGET)_svl.map \
|
||||
$(CONFIG)/$(TARGET)_asb.bin $(CONFIG)/$(TARGET)_asb.axf \
|
||||
$(CONFIG)/$(TARGET)_asb.lst $(CONFIG)/$(TARGET)_asb.map
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
$(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a:
|
||||
$(MAKE) -C $(SDKPATH)/mcu/apollo3/hal/gcc
|
||||
|
||||
$(SDKPATH)/third_party/uecc/gcc/bin/lib_uecc.a:
|
||||
$(MAKE) -C $(SDKPATH)/third_party/uecc
|
||||
|
||||
$(BOARDPATH)/bsp/gcc/bin/libam_bsp.a:
|
||||
$(MAKE) -C $(BOARDPATH)/bsp/gcc
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories bootload bootload_asb bootload_svl
|
||||
@@ -0,0 +1,84 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file main.c
|
||||
//!
|
||||
//! @brief A simple LED blinking example.
|
||||
//!
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
/*
|
||||
Copyright (c) 2019 SparkFun Electronics
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in all
|
||||
copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
|
||||
#define BLINK_PERIOD 500
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Main
|
||||
//
|
||||
//*****************************************************************************
|
||||
int
|
||||
main(void)
|
||||
{
|
||||
// Set the clock frequency.
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
|
||||
// Set the default cache configuration
|
||||
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
|
||||
am_hal_cachectrl_enable();
|
||||
|
||||
// Configure the board for low power operation.
|
||||
am_bsp_low_power_init();
|
||||
|
||||
// Set up BSP leds
|
||||
#ifdef AM_BSP_NUM_LEDS
|
||||
uint32_t ux, ui32GPIONumber;
|
||||
for (ux = 0; ux < AM_BSP_NUM_LEDS; ux++) {
|
||||
ui32GPIONumber = am_bsp_psLEDs[ux].ui32GPIONumber;
|
||||
am_hal_gpio_pinconfig(ui32GPIONumber, g_AM_HAL_GPIO_OUTPUT);
|
||||
am_devices_led_off(am_bsp_psLEDs, ux);
|
||||
}
|
||||
#endif // AM_BSP_NUM_LEDS
|
||||
|
||||
bool led_state = false;
|
||||
|
||||
// Blink forever
|
||||
while (1)
|
||||
{
|
||||
// Toggle LEDs
|
||||
#ifdef AM_BSP_NUM_LEDS
|
||||
led_state = !led_state;
|
||||
uint32_t ux;
|
||||
for (ux = 0; ux < AM_BSP_NUM_LEDS; ux++) {
|
||||
ui32GPIONumber = am_bsp_psLEDs[ux].ui32GPIONumber;
|
||||
(led_state) ? am_devices_led_on(am_bsp_psLEDs, ux) : am_devices_led_off(am_bsp_psLEDs, ux);
|
||||
}
|
||||
#endif // AM_BSP_NUM_LEDS
|
||||
|
||||
// Delay
|
||||
am_util_delay_ms(BLINK_PERIOD);
|
||||
}
|
||||
}
|
||||
+401
@@ -0,0 +1,401 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# This is an example makefile for SparkFun Apollo3 boards as used in the
|
||||
# AmbiqSuite SDK.
|
||||
#
|
||||
# Recommended usage
|
||||
# make
|
||||
# make bootload_svl (uses the SparkFun Variable Loader to upload code)
|
||||
# make bootload_asb (uses the Ambiq Secure Bootlaoder to upload code)
|
||||
# make clean
|
||||
#
|
||||
# Filepaths
|
||||
# You can relocate this makefile easily by providing the path to the root of
|
||||
# the AmbiqSuite SDK. If that path is not specified then this file will
|
||||
# assume that it is located in
|
||||
# <AmbiqSDKRoot>/boards/<your_board>/examples/<your_example>/gcc
|
||||
# and use relative paths
|
||||
#
|
||||
# User Configuration
|
||||
# You must also specify which COM_PORT to use if you want to use the
|
||||
# 'bootlaoder' targets.
|
||||
# Windows example: COM_PORT=COM4
|
||||
# *nix example: COM_PORT=/dev/usbserialxxxx
|
||||
#
|
||||
# Python vs. Executable
|
||||
# For simplicity the upload tools are called as Python scripts by default.
|
||||
# Make sure PYTHON is set to the appropriate command to run Python3 from the
|
||||
# command line.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Options
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# You can override these values on the command line e.g. make bootload COM_PORT=/dev/cu***
|
||||
# COM_PORT is the serial port to use for uploading. For example COM#### on Windows or /dev/cu.usbserial-#### on *nix
|
||||
COM_PORT ?=
|
||||
# ASB_UPLOAD_BAUD is the baud rate setting of the Ambiq Secue Bootloader (ASB) as it is configured on the Apollo3. Defautls to 115200 if unset
|
||||
ASB_UPLOAD_BAUD ?=
|
||||
# SVL_UPLOAD_BAUD is the baud rate setting of the SparkFun Variable Loader (SVL). Defaults to 921600 if unset
|
||||
SVL_UPLOAD_BAUD ?=
|
||||
# PYTHON3 should evaluate to a call to the Python3 executable on your machine
|
||||
PYTHON3 ?=
|
||||
|
||||
# *Optionally* specify absolute paths to the SDK and the BSP
|
||||
# You can do this on the command line - e.g. make bootload SDKPATH=~/$AMBIQ_SDK_ROOT_PATH
|
||||
# Make sure to use / instead of \ when on Windows
|
||||
SDKPATH ?=# Set as the path to the SDK root if not located at ../../../../..
|
||||
COMMONPATH ?=# Set as the path to the BSP common folder if not located at ../../../../common
|
||||
BOARDPATH ?=# Set as the path to the board if not located at ../../..
|
||||
PROJECTPATH ?=# Set as the path to the project if not located at ..
|
||||
BOARD ?=# If using a SparkFun board you can simply provide the name e.g. redboard_artemis_atp
|
||||
|
||||
### Project Settings
|
||||
TARGET := hello_world_uart
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := $(TARGET)_gcc
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
ifeq ($(BOARD),)
|
||||
$(warning warning: no BOARD specified, will fall back to BOARDPATH for arbitrary bsp locations)
|
||||
else
|
||||
BOARDPATH=../../../../$(BOARD)
|
||||
$(warning Using BOARD=$(BOARD) at $(BOARDPATH))
|
||||
endif
|
||||
|
||||
ifeq ($(COM_PORT),)
|
||||
COM_PORT=COM4
|
||||
$(warning warning: you have not defined COM_PORT. Assuming it is COM4)
|
||||
endif
|
||||
ifeq ($(PYTHON3),)
|
||||
PYTHON3=python3
|
||||
$(warning warning: you have not defined PYTHON3. assuming it is accessible by 'python3')
|
||||
endif
|
||||
ifeq ($(ASB_UPLOAD_BAUD),)
|
||||
ASB_UPLOAD_BAUD=115200
|
||||
$(warning defaulting to 115200 baud for ASB)
|
||||
endif
|
||||
ifeq ($(SVL_UPLOAD_BAUD),)
|
||||
SVL_UPLOAD_BAUD=921600
|
||||
$(warning defaulting to 921600 baud for SVL)
|
||||
endif
|
||||
|
||||
ifeq ($(SDKPATH),)
|
||||
SDKPATH =../../../../..
|
||||
$(warning warning: you have not defined SDKPATH so will continue assuming that the SDK root is at $(SDKPATH))
|
||||
else
|
||||
# When the SDKPATH is given export it
|
||||
export SDKPATH
|
||||
endif
|
||||
|
||||
ifeq ($(COMMONPATH),)
|
||||
COMMONPATH =../../../../common
|
||||
$(warning warning: you have not defined COMMONPATH so will continue assuming that the COMMON root is at $(COMMONPATH))
|
||||
else
|
||||
# When the COMMONPATH is given export it
|
||||
export COMMONPATH
|
||||
endif
|
||||
|
||||
ifeq ($(BOARDPATH),)
|
||||
$(error Error: BOARDPATH must be provided)
|
||||
else
|
||||
# Ensure that boardpath does not include a trailing '/'
|
||||
ifeq ($(notdir $(BOARDPATH)),)
|
||||
override BOARDPATH:=$(patsubst %/, %,$(BOARDPATH))
|
||||
$(warning BOARDPATH had a trivial 'notdir' so we tried changing it to: $(BOARDPATH))
|
||||
endif
|
||||
BOARD=$(notdir $(BOARDPATH))
|
||||
# When the BOARDPATH is given export it
|
||||
export BOARDPATH
|
||||
endif
|
||||
|
||||
ifeq ($(PROJECTPATH),)
|
||||
PROJECTPATH =..
|
||||
$(warning warning: you have not defined PROJECTPATH so will continue assuming that the PROJECT root is at $(PROJECTPATH))
|
||||
else
|
||||
# When the PROJECTPATH is given export it
|
||||
export PROJECTPATH
|
||||
endif
|
||||
|
||||
CONFIG := $(PROJECTPATH)/gcc/$(BOARD)/bin
|
||||
$(warning CONFIG=$(CONFIG))
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Defines / Includes / Sources / Libraries
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Global Defines
|
||||
DEFINES= -DPART_$(PART)
|
||||
DEFINES+= -DAM_CUSTOM_BDADDR
|
||||
DEFINES+= -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -DAM_DEBUG_PRINTF
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
DEFINES+=
|
||||
|
||||
# Includes (Add paths to where example header files are located)
|
||||
INCLUDES=
|
||||
INCLUDES+= -I$(PROJECTPATH)/src
|
||||
INCLUDES+= -I$(BOARDPATH)/bsp
|
||||
INCLUDES+= -I$(SDKPATH)
|
||||
INCLUDES+= -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
INCLUDES+=
|
||||
|
||||
# Compilation Units (Add all the .c files you need to compile)
|
||||
SRC=
|
||||
SRC+= main.c
|
||||
SRC+= startup_gcc.c
|
||||
SRC+= am_util_delay.c
|
||||
SRC+= am_util_faultisr.c
|
||||
SRC+= am_util_id.c
|
||||
SRC+= am_util_stdio.c
|
||||
SRC+=
|
||||
|
||||
# VPATH (Add paths to where your source files are located)
|
||||
VPATH=
|
||||
VPATH+= $(PROJECTPATH)/src
|
||||
VPATH+= $(SDKPATH)/utils
|
||||
VPATH+= $(COMMONPATH)/examples/hello_world_uart
|
||||
VPATH+= $(COMMONPATH)/tools_sfe/templates
|
||||
VPATH+=
|
||||
|
||||
# LIBS (Precompiled libraries to include in the linker step)
|
||||
LIBS=
|
||||
LIBS+= $(BOARDPATH)/bsp/gcc/bin/libam_bsp.a
|
||||
LIBS+= $(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a
|
||||
LIBS+=
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
### Bootloader Tools
|
||||
ASB_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/asb/asb.py
|
||||
SVL_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/svl/svl.py
|
||||
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
STARTUP_FILE := ./startup_$(COMPILERNAME).c
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
CXX = $(TOOLCHAIN)-g++
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC CXX
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Machinery
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
XSRC = $(filter %.cpp,$(SRC))
|
||||
ZSRC = $(filter %.cc,$(SRC))
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(XSRC:%.cpp=$(CONFIG)/%.o)
|
||||
OBJS+= $(ZSRC:%.cc=$(CONFIG)/%.o)
|
||||
OBJS+= $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(XSRC:%.cpp=$(CONFIG)/%.d)
|
||||
DEPS+= $(ZSRC:%.cc=$(CONFIG)/%.d)
|
||||
DEPS+= $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CSTD = -std=c99
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP $(CSTD) -Wall -g
|
||||
CFLAGS+= -O0
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
XSTD = -std=gnu++11
|
||||
|
||||
XFLAGS = $(CFLAGS)
|
||||
XFLAGS+= -fno-exceptions
|
||||
|
||||
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
LFLAGS+= -nostartfiles -static
|
||||
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
|
||||
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
|
||||
LFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
CPFLAGS = -Obinary
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Targets / Rules
|
||||
#
|
||||
#******************************************************************************
|
||||
all: asb
|
||||
asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.cpp $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.cc $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET)_asb.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_linker.ld
|
||||
$(CONFIG)/$(TARGET)_asb.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_svl.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_svl_linker.ld
|
||||
$(CONFIG)/$(TARGET)_svl.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_%.bin: $(CONFIG)/$(TARGET)_%.axf
|
||||
@echo " Copying $(COMPILERNAME) $@..." ;\
|
||||
$(CP) $(CPFLAGS) $< $@ ;\
|
||||
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
|
||||
|
||||
bootload_asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
$(ASB_UPLOADER) --bin $(CONFIG)/$(TARGET)_asb.bin --load-address-blob 0x20000 --magic-num 0xCB -o $(CONFIG)/$(TARGET) --version 0x0 --load-address-wired 0xC000 -i 6 --options 0x1 -b $(ASB_UPLOAD_BAUD) -port $(COM_PORT) -r 2 -v
|
||||
|
||||
bootload_svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
$(SVL_UPLOADER) $(COM_PORT) -f $(CONFIG)/$(TARGET)_svl.bin -b $(SVL_UPLOAD_BAUD) -v
|
||||
|
||||
bootload: bootload_svl
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
|
||||
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map \
|
||||
$(CONFIG)/$(TARGET)_svl.bin $(CONFIG)/$(TARGET)_svl.axf \
|
||||
$(CONFIG)/$(TARGET)_svl.lst $(CONFIG)/$(TARGET)_svl.map \
|
||||
$(CONFIG)/$(TARGET)_asb.bin $(CONFIG)/$(TARGET)_asb.axf \
|
||||
$(CONFIG)/$(TARGET)_asb.lst $(CONFIG)/$(TARGET)_asb.map
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
$(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a:
|
||||
$(MAKE) -C $(SDKPATH)/mcu/apollo3/hal/gcc
|
||||
|
||||
$(SDKPATH)/third_party/uecc/gcc/bin/lib_uecc.a:
|
||||
$(MAKE) -C $(SDKPATH)/third_party/uecc
|
||||
|
||||
$(BOARDPATH)/bsp/gcc/bin/libam_bsp.a:
|
||||
$(MAKE) -C $(BOARDPATH)/bsp/gcc
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories bootload bootload_asb bootload_svl
|
||||
@@ -0,0 +1,332 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file hello_world_uart.c
|
||||
//!
|
||||
//! @brief A simple "Hello World" example using the UART peripheral.
|
||||
//!
|
||||
//! Purpose: This example prints a "Hello World" message with some device info
|
||||
//! over UART at 115200 baud. To see the output of this program, run AMFlash,
|
||||
//! and configure the console for UART. The example sleeps after it is done
|
||||
//! printing.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision v2.2.0-7-g63f7c2ba1 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART handle.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void *phUART;
|
||||
|
||||
#define CHECK_ERRORS(x) \
|
||||
if ((x) != AM_HAL_STATUS_SUCCESS) \
|
||||
{ \
|
||||
error_handler(x); \
|
||||
}
|
||||
|
||||
volatile uint32_t ui32LastError;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Catch HAL errors.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
error_handler(uint32_t ui32ErrorStatus)
|
||||
{
|
||||
ui32LastError = ui32ErrorStatus;
|
||||
|
||||
while (1);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART buffers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint8_t g_pui8TxBuffer[256];
|
||||
uint8_t g_pui8RxBuffer[2];
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART configuration.
|
||||
//
|
||||
//*****************************************************************************
|
||||
const am_hal_uart_config_t g_sUartConfig =
|
||||
{
|
||||
//
|
||||
// Standard UART settings: 115200-8-N-1
|
||||
//
|
||||
.ui32BaudRate = 115200,
|
||||
.ui32DataBits = AM_HAL_UART_DATA_BITS_8,
|
||||
.ui32Parity = AM_HAL_UART_PARITY_NONE,
|
||||
.ui32StopBits = AM_HAL_UART_ONE_STOP_BIT,
|
||||
.ui32FlowControl = AM_HAL_UART_FLOW_CTRL_NONE,
|
||||
|
||||
//
|
||||
// Set TX and RX FIFOs to interrupt at half-full.
|
||||
//
|
||||
.ui32FifoLevels = (AM_HAL_UART_TX_FIFO_1_2 |
|
||||
AM_HAL_UART_RX_FIFO_1_2),
|
||||
|
||||
//
|
||||
// Buffers
|
||||
//
|
||||
.pui8TxBuffer = g_pui8TxBuffer,
|
||||
.ui32TxBufferSize = sizeof(g_pui8TxBuffer),
|
||||
.pui8RxBuffer = g_pui8RxBuffer,
|
||||
.ui32RxBufferSize = sizeof(g_pui8RxBuffer),
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART0 interrupt handler.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
am_uart_isr(void)
|
||||
{
|
||||
//
|
||||
// Service the FIFOs as necessary, and clear the interrupts.
|
||||
//
|
||||
uint32_t ui32Status, ui32Idle;
|
||||
am_hal_uart_interrupt_status_get(phUART, &ui32Status, true);
|
||||
am_hal_uart_interrupt_clear(phUART, ui32Status);
|
||||
am_hal_uart_interrupt_service(phUART, ui32Status, &ui32Idle);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART print string
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
uart_print(char *pcStr)
|
||||
{
|
||||
uint32_t ui32StrLen = 0;
|
||||
uint32_t ui32BytesWritten = 0;
|
||||
|
||||
//
|
||||
// Measure the length of the string.
|
||||
//
|
||||
while (pcStr[ui32StrLen] != 0)
|
||||
{
|
||||
ui32StrLen++;
|
||||
}
|
||||
|
||||
//
|
||||
// Print the string via the UART.
|
||||
//
|
||||
const am_hal_uart_transfer_t sUartWrite =
|
||||
{
|
||||
.ui32Direction = AM_HAL_UART_WRITE,
|
||||
.pui8Data = (uint8_t *) pcStr,
|
||||
.ui32NumBytes = ui32StrLen,
|
||||
.ui32TimeoutMs = 0,
|
||||
.pui32BytesTransferred = &ui32BytesWritten,
|
||||
};
|
||||
|
||||
CHECK_ERRORS(am_hal_uart_transfer(phUART, &sUartWrite));
|
||||
|
||||
if (ui32BytesWritten != ui32StrLen)
|
||||
{
|
||||
//
|
||||
// Couldn't send the whole string!!
|
||||
//
|
||||
while(1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Main
|
||||
//
|
||||
//*****************************************************************************
|
||||
int
|
||||
main(void)
|
||||
{
|
||||
am_util_id_t sIdDevice;
|
||||
uint32_t ui32StrBuf;
|
||||
|
||||
//
|
||||
// Set the clock frequency.
|
||||
//
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
|
||||
//
|
||||
// Set the default cache configuration
|
||||
//
|
||||
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
|
||||
am_hal_cachectrl_enable();
|
||||
|
||||
//
|
||||
// Configure the board for low power operation.
|
||||
//
|
||||
am_bsp_low_power_init();
|
||||
|
||||
//
|
||||
// Initialize the printf interface for UART output.
|
||||
//
|
||||
CHECK_ERRORS(am_hal_uart_initialize(0, &phUART));
|
||||
CHECK_ERRORS(am_hal_uart_power_control(phUART, AM_HAL_SYSCTRL_WAKE, false));
|
||||
CHECK_ERRORS(am_hal_uart_configure(phUART, &g_sUartConfig));
|
||||
|
||||
//
|
||||
// Enable the UART pins.
|
||||
//
|
||||
am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_TX, g_AM_BSP_GPIO_COM_UART_TX);
|
||||
am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_RX, g_AM_BSP_GPIO_COM_UART_RX);
|
||||
|
||||
//
|
||||
// Enable interrupts.
|
||||
//
|
||||
NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + AM_BSP_UART_PRINT_INST));
|
||||
am_hal_interrupt_master_enable();
|
||||
|
||||
//
|
||||
// Set the main print interface to use the UART print function we defined.
|
||||
//
|
||||
am_util_stdio_printf_init(uart_print);
|
||||
|
||||
//
|
||||
// Print the banner.
|
||||
//
|
||||
am_util_stdio_terminal_clear();
|
||||
am_util_stdio_printf("Hello World!\n\n");
|
||||
|
||||
//
|
||||
// Print the device info.
|
||||
//
|
||||
am_util_id_device(&sIdDevice);
|
||||
am_util_stdio_printf("Vendor Name: %s\n", sIdDevice.pui8VendorName);
|
||||
am_util_stdio_printf("Device type: %s\n", sIdDevice.pui8DeviceName);
|
||||
|
||||
am_util_stdio_printf("Qualified: %s\n",
|
||||
sIdDevice.sMcuCtrlDevice.ui32Qualified ?
|
||||
"Yes" : "No");
|
||||
|
||||
am_util_stdio_printf("Device Info:\n"
|
||||
"\tPart number: 0x%08X\n"
|
||||
"\tChip ID0: 0x%08X\n"
|
||||
"\tChip ID1: 0x%08X\n"
|
||||
"\tRevision: 0x%08X (Rev%c%c)\n",
|
||||
sIdDevice.sMcuCtrlDevice.ui32ChipPN,
|
||||
sIdDevice.sMcuCtrlDevice.ui32ChipID0,
|
||||
sIdDevice.sMcuCtrlDevice.ui32ChipID1,
|
||||
sIdDevice.sMcuCtrlDevice.ui32ChipRev,
|
||||
sIdDevice.ui8ChipRevMaj, sIdDevice.ui8ChipRevMin );
|
||||
|
||||
//
|
||||
// If not a multiple of 1024 bytes, append a plus sign to the KB.
|
||||
//
|
||||
ui32StrBuf = ( sIdDevice.sMcuCtrlDevice.ui32FlashSize % 1024 ) ? '+' : 0;
|
||||
am_util_stdio_printf("\tFlash size: %7d (%d KB%s)\n",
|
||||
sIdDevice.sMcuCtrlDevice.ui32FlashSize,
|
||||
sIdDevice.sMcuCtrlDevice.ui32FlashSize / 1024,
|
||||
&ui32StrBuf);
|
||||
|
||||
ui32StrBuf = ( sIdDevice.sMcuCtrlDevice.ui32SRAMSize % 1024 ) ? '+' : 0;
|
||||
am_util_stdio_printf("\tSRAM size: %7d (%d KB%s)\n\n",
|
||||
sIdDevice.sMcuCtrlDevice.ui32SRAMSize,
|
||||
sIdDevice.sMcuCtrlDevice.ui32SRAMSize / 1024,
|
||||
&ui32StrBuf);
|
||||
|
||||
//
|
||||
// Print the compiler version.
|
||||
//
|
||||
am_hal_uart_tx_flush(phUART);
|
||||
am_util_stdio_printf("App Compiler: %s\n", COMPILER_VERSION);
|
||||
#ifdef AM_PART_APOLLO3
|
||||
am_util_stdio_printf("HAL Compiler: %s\n", g_ui8HALcompiler);
|
||||
am_util_stdio_printf("HAL SDK version: %d.%d.%d\n",
|
||||
g_ui32HALversion.s.Major,
|
||||
g_ui32HALversion.s.Minor,
|
||||
g_ui32HALversion.s.Revision);
|
||||
am_util_stdio_printf("HAL compiled with %s-style registers\n",
|
||||
g_ui32HALversion.s.bAMREGS ? "AM_REG" : "CMSIS");
|
||||
|
||||
am_hal_security_info_t secInfo;
|
||||
char sINFO[32];
|
||||
uint32_t ui32Status;
|
||||
ui32Status = am_hal_security_get_info(&secInfo);
|
||||
if (ui32Status == AM_HAL_STATUS_SUCCESS)
|
||||
{
|
||||
if ( secInfo.bInfo0Valid )
|
||||
{
|
||||
am_util_stdio_sprintf(sINFO, "INFO0 valid, ver 0x%X", secInfo.info0Version);
|
||||
}
|
||||
else
|
||||
{
|
||||
am_util_stdio_sprintf(sINFO, "INFO0 invalid");
|
||||
}
|
||||
|
||||
am_util_stdio_printf("SBL ver: 0x%x - 0x%x, %s\n",
|
||||
secInfo.sblVersion, secInfo.sblVersionAddInfo, sINFO);
|
||||
}
|
||||
else
|
||||
{
|
||||
am_util_stdio_printf("am_hal_security_get_info failed 0x%X\n", ui32Status);
|
||||
}
|
||||
#endif // AM_PART_APOLLO3
|
||||
|
||||
//
|
||||
// We are done printing.
|
||||
// Disable the UART and interrupts
|
||||
//
|
||||
am_hal_uart_tx_flush(phUART);
|
||||
CHECK_ERRORS(am_hal_uart_power_control(phUART, AM_HAL_SYSCTRL_DEEPSLEEP, false));
|
||||
|
||||
//
|
||||
// Loop forever while sleeping.
|
||||
//
|
||||
while (1)
|
||||
{
|
||||
//
|
||||
// Go to Deep Sleep.
|
||||
//
|
||||
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
|
||||
}
|
||||
}
|
||||
+401
@@ -0,0 +1,401 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# This is an example makefile for SparkFun Apollo3 boards as used in the
|
||||
# AmbiqSuite SDK.
|
||||
#
|
||||
# Recommended usage
|
||||
# make
|
||||
# make bootload_svl (uses the SparkFun Variable Loader to upload code)
|
||||
# make bootload_asb (uses the Ambiq Secure Bootlaoder to upload code)
|
||||
# make clean
|
||||
#
|
||||
# Filepaths
|
||||
# You can relocate this makefile easily by providing the path to the root of
|
||||
# the AmbiqSuite SDK. If that path is not specified then this file will
|
||||
# assume that it is located in
|
||||
# <AmbiqSDKRoot>/boards/<your_board>/examples/<your_example>/gcc
|
||||
# and use relative paths
|
||||
#
|
||||
# User Configuration
|
||||
# You must also specify which COM_PORT to use if you want to use the
|
||||
# 'bootlaoder' targets.
|
||||
# Windows example: COM_PORT=COM4
|
||||
# *nix example: COM_PORT=/dev/usbserialxxxx
|
||||
#
|
||||
# Python vs. Executable
|
||||
# For simplicity the upload tools are called as Python scripts by default.
|
||||
# Make sure PYTHON is set to the appropriate command to run Python3 from the
|
||||
# command line.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Options
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# You can override these values on the command line e.g. make bootload COM_PORT=/dev/cu***
|
||||
# COM_PORT is the serial port to use for uploading. For example COM#### on Windows or /dev/cu.usbserial-#### on *nix
|
||||
COM_PORT ?=
|
||||
# ASB_UPLOAD_BAUD is the baud rate setting of the Ambiq Secue Bootloader (ASB) as it is configured on the Apollo3. Defautls to 115200 if unset
|
||||
ASB_UPLOAD_BAUD ?=
|
||||
# SVL_UPLOAD_BAUD is the baud rate setting of the SparkFun Variable Loader (SVL). Defaults to 921600 if unset
|
||||
SVL_UPLOAD_BAUD ?=
|
||||
# PYTHON3 should evaluate to a call to the Python3 executable on your machine
|
||||
PYTHON3 ?=
|
||||
|
||||
# *Optionally* specify absolute paths to the SDK and the BSP
|
||||
# You can do this on the command line - e.g. make bootload SDKPATH=~/$AMBIQ_SDK_ROOT_PATH
|
||||
# Make sure to use / instead of \ when on Windows
|
||||
SDKPATH ?=# Set as the path to the SDK root if not located at ../../../../..
|
||||
COMMONPATH ?=# Set as the path to the BSP common folder if not located at ../../../../common
|
||||
BOARDPATH ?=# Set as the path to the board if not located at ../../..
|
||||
PROJECTPATH ?=# Set as the path to the project if not located at ..
|
||||
BOARD ?=# If using a SparkFun board you can simply provide the name e.g. redboard_artemis_atp
|
||||
|
||||
### Project Settings
|
||||
TARGET := hello_world_uart_cpp
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := $(TARGET)_gcc
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
ifeq ($(BOARD),)
|
||||
$(warning warning: no BOARD specified, will fall back to BOARDPATH for arbitrary bsp locations)
|
||||
else
|
||||
BOARDPATH=../../../../$(BOARD)
|
||||
$(warning Using BOARD=$(BOARD) at $(BOARDPATH))
|
||||
endif
|
||||
|
||||
ifeq ($(COM_PORT),)
|
||||
COM_PORT=COM4
|
||||
$(warning warning: you have not defined COM_PORT. Assuming it is COM4)
|
||||
endif
|
||||
ifeq ($(PYTHON3),)
|
||||
PYTHON3=python3
|
||||
$(warning warning: you have not defined PYTHON3. assuming it is accessible by 'python3')
|
||||
endif
|
||||
ifeq ($(ASB_UPLOAD_BAUD),)
|
||||
ASB_UPLOAD_BAUD=115200
|
||||
$(warning defaulting to 115200 baud for ASB)
|
||||
endif
|
||||
ifeq ($(SVL_UPLOAD_BAUD),)
|
||||
SVL_UPLOAD_BAUD=921600
|
||||
$(warning defaulting to 921600 baud for SVL)
|
||||
endif
|
||||
|
||||
ifeq ($(SDKPATH),)
|
||||
SDKPATH =../../../../..
|
||||
$(warning warning: you have not defined SDKPATH so will continue assuming that the SDK root is at $(SDKPATH))
|
||||
else
|
||||
# When the SDKPATH is given export it
|
||||
export SDKPATH
|
||||
endif
|
||||
|
||||
ifeq ($(COMMONPATH),)
|
||||
COMMONPATH =../../../../common
|
||||
$(warning warning: you have not defined COMMONPATH so will continue assuming that the COMMON root is at $(COMMONPATH))
|
||||
else
|
||||
# When the COMMONPATH is given export it
|
||||
export COMMONPATH
|
||||
endif
|
||||
|
||||
ifeq ($(BOARDPATH),)
|
||||
$(error Error: BOARDPATH must be provided)
|
||||
else
|
||||
# Ensure that boardpath does not include a trailing '/'
|
||||
ifeq ($(notdir $(BOARDPATH)),)
|
||||
override BOARDPATH:=$(patsubst %/, %,$(BOARDPATH))
|
||||
$(warning BOARDPATH had a trivial 'notdir' so we tried changing it to: $(BOARDPATH))
|
||||
endif
|
||||
BOARD=$(notdir $(BOARDPATH))
|
||||
# When the BOARDPATH is given export it
|
||||
export BOARDPATH
|
||||
endif
|
||||
|
||||
ifeq ($(PROJECTPATH),)
|
||||
PROJECTPATH =..
|
||||
$(warning warning: you have not defined PROJECTPATH so will continue assuming that the PROJECT root is at $(PROJECTPATH))
|
||||
else
|
||||
# When the PROJECTPATH is given export it
|
||||
export PROJECTPATH
|
||||
endif
|
||||
|
||||
CONFIG := $(PROJECTPATH)/gcc/$(BOARD)/bin
|
||||
$(warning CONFIG=$(CONFIG))
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Defines / Includes / Sources / Libraries
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Global Defines
|
||||
DEFINES= -DPART_$(PART)
|
||||
DEFINES+= -DAM_CUSTOM_BDADDR
|
||||
DEFINES+= -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -DAM_DEBUG_PRINTF
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
DEFINES+=
|
||||
|
||||
# Includes (Add paths to where example header files are located)
|
||||
INCLUDES=
|
||||
INCLUDES+= -I$(PROJECTPATH)/src
|
||||
INCLUDES+= -I$(BOARDPATH)/bsp
|
||||
INCLUDES+= -I$(SDKPATH)
|
||||
INCLUDES+= -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
INCLUDES+=
|
||||
|
||||
# Compilation Units (Add all the .c files you need to compile)
|
||||
SRC=
|
||||
SRC+= main.cpp
|
||||
SRC+= startup_gcc.c
|
||||
SRC+= am_util_delay.c
|
||||
SRC+= am_util_faultisr.c
|
||||
SRC+= am_util_id.c
|
||||
SRC+= am_util_stdio.c
|
||||
SRC+=
|
||||
|
||||
# VPATH (Add paths to where your source files are located)
|
||||
VPATH=
|
||||
VPATH+= $(PROJECTPATH)/src
|
||||
VPATH+= $(SDKPATH)/utils
|
||||
VPATH+= $(COMMONPATH)/examples/hello_world_uart_cpp
|
||||
VPATH+= $(COMMONPATH)/tools_sfe/templates
|
||||
VPATH+=
|
||||
|
||||
# LIBS (Precompiled libraries to include in the linker step)
|
||||
LIBS=
|
||||
LIBS+= $(BOARDPATH)/bsp/gcc/bin/libam_bsp.a
|
||||
LIBS+= $(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a
|
||||
LIBS+=
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
### Bootloader Tools
|
||||
ASB_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/asb/asb.py
|
||||
SVL_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/svl/svl.py
|
||||
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
STARTUP_FILE := ./startup_$(COMPILERNAME).c
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
CXX = $(TOOLCHAIN)-g++
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC CXX
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Machinery
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
XSRC = $(filter %.cpp,$(SRC))
|
||||
ZSRC = $(filter %.cc,$(SRC))
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(XSRC:%.cpp=$(CONFIG)/%.o)
|
||||
OBJS+= $(ZSRC:%.cc=$(CONFIG)/%.o)
|
||||
OBJS+= $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(XSRC:%.cpp=$(CONFIG)/%.d)
|
||||
DEPS+= $(ZSRC:%.cc=$(CONFIG)/%.d)
|
||||
DEPS+= $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CSTD = -std=c99
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP $(CSTD) -Wall -g
|
||||
CFLAGS+= -O0
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
XSTD = -std=gnu++11
|
||||
|
||||
XFLAGS = $(CFLAGS)
|
||||
XFLAGS+= -fno-exceptions
|
||||
|
||||
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
LFLAGS+= -nostartfiles -static
|
||||
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
|
||||
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
|
||||
LFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
CPFLAGS = -Obinary
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Targets / Rules
|
||||
#
|
||||
#******************************************************************************
|
||||
all: asb
|
||||
asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.cpp $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.cc $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET)_asb.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_linker.ld
|
||||
$(CONFIG)/$(TARGET)_asb.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_svl.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_svl_linker.ld
|
||||
$(CONFIG)/$(TARGET)_svl.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_%.bin: $(CONFIG)/$(TARGET)_%.axf
|
||||
@echo " Copying $(COMPILERNAME) $@..." ;\
|
||||
$(CP) $(CPFLAGS) $< $@ ;\
|
||||
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
|
||||
|
||||
bootload_asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
$(ASB_UPLOADER) --bin $(CONFIG)/$(TARGET)_asb.bin --load-address-blob 0x20000 --magic-num 0xCB -o $(CONFIG)/$(TARGET) --version 0x0 --load-address-wired 0xC000 -i 6 --options 0x1 -b $(ASB_UPLOAD_BAUD) -port $(COM_PORT) -r 2 -v
|
||||
|
||||
bootload_svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
$(SVL_UPLOADER) $(COM_PORT) -f $(CONFIG)/$(TARGET)_svl.bin -b $(SVL_UPLOAD_BAUD) -v
|
||||
|
||||
bootload: bootload_svl
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
|
||||
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map \
|
||||
$(CONFIG)/$(TARGET)_svl.bin $(CONFIG)/$(TARGET)_svl.axf \
|
||||
$(CONFIG)/$(TARGET)_svl.lst $(CONFIG)/$(TARGET)_svl.map \
|
||||
$(CONFIG)/$(TARGET)_asb.bin $(CONFIG)/$(TARGET)_asb.axf \
|
||||
$(CONFIG)/$(TARGET)_asb.lst $(CONFIG)/$(TARGET)_asb.map
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
$(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a:
|
||||
$(MAKE) -C $(SDKPATH)/mcu/apollo3/hal/gcc
|
||||
|
||||
$(SDKPATH)/third_party/uecc/gcc/bin/lib_uecc.a:
|
||||
$(MAKE) -C $(SDKPATH)/third_party/uecc
|
||||
|
||||
$(BOARDPATH)/bsp/gcc/bin/libam_bsp.a:
|
||||
$(MAKE) -C $(BOARDPATH)/bsp/gcc
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories bootload bootload_asb bootload_svl
|
||||
+345
@@ -0,0 +1,345 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file hello_world_uart.cpp
|
||||
//!
|
||||
//! @brief A simple "Hello World" example using the UART peripheral.
|
||||
//!
|
||||
//! Purpose: This example prints a "Hello World" message with some device info
|
||||
//! over UART at 115200 baud. To see the output of this program, run AMFlash,
|
||||
//! and configure the console for UART. The example sleeps after it is done
|
||||
//! printing.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision v2.2.0-7-g63f7c2ba1 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
extern "C" { // extern "C" is required because Release 2.2.0 of the
|
||||
#include "am_mcu_apollo.h" // AmbiqSuite SDK still has some HAL headers without
|
||||
} // this CPP guard built in
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// C++ Functionality demonstration
|
||||
//
|
||||
//*****************************************************************************
|
||||
class CPPPrinter {
|
||||
private:
|
||||
protected:
|
||||
public:
|
||||
uint8_t value;
|
||||
|
||||
CPPPrinter( uint8_t _value ) : value(_value) {};
|
||||
|
||||
void printValue( void ){
|
||||
am_util_stdio_printf("I am a CPPPrinter and my value is %d\n\n", value);
|
||||
}
|
||||
};
|
||||
|
||||
CPPPrinter myCPPPrinter(12);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART handle.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void *phUART;
|
||||
|
||||
#define CHECK_ERRORS(x) \
|
||||
if ((x) != AM_HAL_STATUS_SUCCESS) \
|
||||
{ \
|
||||
error_handler(x); \
|
||||
}
|
||||
|
||||
volatile uint32_t ui32LastError;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Catch HAL errors.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
error_handler(uint32_t ui32ErrorStatus)
|
||||
{
|
||||
ui32LastError = ui32ErrorStatus;
|
||||
|
||||
while (1);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART buffers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint8_t g_pui8TxBuffer[256];
|
||||
uint8_t g_pui8RxBuffer[2];
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART configuration.
|
||||
//
|
||||
//*****************************************************************************
|
||||
am_hal_uart_config_t g_sUartConfig = {0};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART0 interrupt handler.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" void am_uart_isr(void)
|
||||
{
|
||||
//
|
||||
// Service the FIFOs as necessary, and clear the interrupts.
|
||||
//
|
||||
uint32_t ui32Status, ui32Idle;
|
||||
am_hal_uart_interrupt_status_get(phUART, &ui32Status, true);
|
||||
am_hal_uart_interrupt_clear(phUART, ui32Status);
|
||||
am_hal_uart_interrupt_service(phUART, ui32Status, &ui32Idle);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// UART print string
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
uart_print(char *pcStr)
|
||||
{
|
||||
uint32_t ui32StrLen = 0;
|
||||
uint32_t ui32BytesWritten = 0;
|
||||
|
||||
//
|
||||
// Measure the length of the string.
|
||||
//
|
||||
while (pcStr[ui32StrLen] != 0)
|
||||
{
|
||||
ui32StrLen++;
|
||||
}
|
||||
|
||||
//
|
||||
// Print the string via the UART.
|
||||
//
|
||||
const am_hal_uart_transfer_t sUartWrite =
|
||||
{
|
||||
.ui32Direction = AM_HAL_UART_WRITE,
|
||||
.pui8Data = (uint8_t *) pcStr,
|
||||
.ui32NumBytes = ui32StrLen,
|
||||
.ui32TimeoutMs = 0,
|
||||
.pui32BytesTransferred = &ui32BytesWritten,
|
||||
};
|
||||
|
||||
CHECK_ERRORS(am_hal_uart_transfer(phUART, &sUartWrite));
|
||||
|
||||
if (ui32BytesWritten != ui32StrLen)
|
||||
{
|
||||
//
|
||||
// Couldn't send the whole string!!
|
||||
//
|
||||
while(1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Main
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" int main(void)
|
||||
{
|
||||
am_util_id_t sIdDevice;
|
||||
uint32_t ui32StrBuf;
|
||||
|
||||
// Initialize Uart Configuration Structure
|
||||
g_sUartConfig.ui32BaudRate = 115200;
|
||||
g_sUartConfig.ui32DataBits = AM_HAL_UART_DATA_BITS_8;
|
||||
g_sUartConfig.ui32Parity = AM_HAL_UART_PARITY_NONE;
|
||||
g_sUartConfig.ui32StopBits = AM_HAL_UART_ONE_STOP_BIT;
|
||||
g_sUartConfig.ui32FlowControl = AM_HAL_UART_FLOW_CTRL_NONE;
|
||||
g_sUartConfig.ui32FifoLevels = (AM_HAL_UART_TX_FIFO_1_2 | AM_HAL_UART_RX_FIFO_1_2);
|
||||
g_sUartConfig.pui8TxBuffer = g_pui8TxBuffer;
|
||||
g_sUartConfig.ui32TxBufferSize = sizeof(g_pui8TxBuffer);
|
||||
g_sUartConfig.pui8RxBuffer = g_pui8RxBuffer;
|
||||
g_sUartConfig.ui32RxBufferSize = sizeof(g_pui8RxBuffer);
|
||||
|
||||
//
|
||||
// Set the clock frequency.
|
||||
//
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
|
||||
//
|
||||
// Set the default cache configuration
|
||||
//
|
||||
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
|
||||
am_hal_cachectrl_enable();
|
||||
|
||||
//
|
||||
// Configure the board for low power operation.
|
||||
//
|
||||
am_bsp_low_power_init();
|
||||
|
||||
//
|
||||
// Initialize the printf interface for UART output.
|
||||
//
|
||||
CHECK_ERRORS(am_hal_uart_initialize(0, &phUART));
|
||||
CHECK_ERRORS(am_hal_uart_power_control(phUART, AM_HAL_SYSCTRL_WAKE, false));
|
||||
CHECK_ERRORS(am_hal_uart_configure(phUART, &g_sUartConfig));
|
||||
|
||||
//
|
||||
// Enable the UART pins.
|
||||
//
|
||||
am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_TX, g_AM_BSP_GPIO_COM_UART_TX);
|
||||
am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_RX, g_AM_BSP_GPIO_COM_UART_RX);
|
||||
|
||||
//
|
||||
// Enable interrupts.
|
||||
//
|
||||
NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + AM_BSP_UART_PRINT_INST));
|
||||
am_hal_interrupt_master_enable();
|
||||
|
||||
//
|
||||
// Set the main print interface to use the UART print function we defined.
|
||||
//
|
||||
am_util_stdio_printf_init(uart_print);
|
||||
|
||||
//
|
||||
// Print the banner.
|
||||
//
|
||||
am_util_stdio_terminal_clear();
|
||||
am_util_stdio_printf("Hello World!\n\n");
|
||||
|
||||
//
|
||||
// Test CPPPrinter
|
||||
//
|
||||
myCPPPrinter.printValue();
|
||||
|
||||
//
|
||||
// Print the device info.
|
||||
//
|
||||
am_util_id_device(&sIdDevice);
|
||||
am_util_stdio_printf("Vendor Name: %s\n", sIdDevice.pui8VendorName);
|
||||
am_util_stdio_printf("Device type: %s\n", sIdDevice.pui8DeviceName);
|
||||
|
||||
am_util_stdio_printf("Qualified: %s\n",
|
||||
sIdDevice.sMcuCtrlDevice.ui32Qualified ?
|
||||
"Yes" : "No");
|
||||
|
||||
am_util_stdio_printf("Device Info:\n"
|
||||
"\tPart number: 0x%08X\n"
|
||||
"\tChip ID0: 0x%08X\n"
|
||||
"\tChip ID1: 0x%08X\n"
|
||||
"\tRevision: 0x%08X (Rev%c%c)\n",
|
||||
sIdDevice.sMcuCtrlDevice.ui32ChipPN,
|
||||
sIdDevice.sMcuCtrlDevice.ui32ChipID0,
|
||||
sIdDevice.sMcuCtrlDevice.ui32ChipID1,
|
||||
sIdDevice.sMcuCtrlDevice.ui32ChipRev,
|
||||
sIdDevice.ui8ChipRevMaj, sIdDevice.ui8ChipRevMin );
|
||||
|
||||
//
|
||||
// If not a multiple of 1024 bytes, append a plus sign to the KB.
|
||||
//
|
||||
ui32StrBuf = ( sIdDevice.sMcuCtrlDevice.ui32FlashSize % 1024 ) ? '+' : 0;
|
||||
am_util_stdio_printf("\tFlash size: %7d (%d KB%s)\n",
|
||||
sIdDevice.sMcuCtrlDevice.ui32FlashSize,
|
||||
sIdDevice.sMcuCtrlDevice.ui32FlashSize / 1024,
|
||||
&ui32StrBuf);
|
||||
|
||||
ui32StrBuf = ( sIdDevice.sMcuCtrlDevice.ui32SRAMSize % 1024 ) ? '+' : 0;
|
||||
am_util_stdio_printf("\tSRAM size: %7d (%d KB%s)\n\n",
|
||||
sIdDevice.sMcuCtrlDevice.ui32SRAMSize,
|
||||
sIdDevice.sMcuCtrlDevice.ui32SRAMSize / 1024,
|
||||
&ui32StrBuf);
|
||||
|
||||
//
|
||||
// Print the compiler version.
|
||||
//
|
||||
am_hal_uart_tx_flush(phUART);
|
||||
am_util_stdio_printf("App Compiler: %s\n", COMPILER_VERSION);
|
||||
#ifdef AM_PART_APOLLO3
|
||||
am_util_stdio_printf("HAL Compiler: %s\n", g_ui8HALcompiler);
|
||||
am_util_stdio_printf("HAL SDK version: %d.%d.%d\n",
|
||||
g_ui32HALversion.s.Major,
|
||||
g_ui32HALversion.s.Minor,
|
||||
g_ui32HALversion.s.Revision);
|
||||
am_util_stdio_printf("HAL compiled with %s-style registers\n",
|
||||
g_ui32HALversion.s.bAMREGS ? "AM_REG" : "CMSIS");
|
||||
|
||||
am_hal_security_info_t secInfo;
|
||||
char sINFO[32];
|
||||
uint32_t ui32Status;
|
||||
ui32Status = am_hal_security_get_info(&secInfo);
|
||||
if (ui32Status == AM_HAL_STATUS_SUCCESS)
|
||||
{
|
||||
if ( secInfo.bInfo0Valid )
|
||||
{
|
||||
am_util_stdio_sprintf(sINFO, "INFO0 valid, ver 0x%X", secInfo.info0Version);
|
||||
}
|
||||
else
|
||||
{
|
||||
am_util_stdio_sprintf(sINFO, "INFO0 invalid");
|
||||
}
|
||||
|
||||
am_util_stdio_printf("SBL ver: 0x%x - 0x%x, %s\n",
|
||||
secInfo.sblVersion, secInfo.sblVersionAddInfo, sINFO);
|
||||
}
|
||||
else
|
||||
{
|
||||
am_util_stdio_printf("am_hal_security_get_info failed 0x%X\n", ui32Status);
|
||||
}
|
||||
#endif // AM_PART_APOLLO3
|
||||
|
||||
//
|
||||
// We are done printing.
|
||||
// Disable the UART and interrupts
|
||||
//
|
||||
am_hal_uart_tx_flush(phUART);
|
||||
CHECK_ERRORS(am_hal_uart_power_control(phUART, AM_HAL_SYSCTRL_DEEPSLEEP, false));
|
||||
|
||||
//
|
||||
// Loop forever while sleeping.
|
||||
//
|
||||
while (1)
|
||||
{
|
||||
//
|
||||
// Go to Deep Sleep.
|
||||
//
|
||||
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
|
||||
}
|
||||
}
|
||||
+404
@@ -0,0 +1,404 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# This is an example makefile for SparkFun Apollo3 boards as used in the
|
||||
# AmbiqSuite SDK.
|
||||
#
|
||||
# Recommended usage
|
||||
# make
|
||||
# make bootload_svl (uses the SparkFun Variable Loader to upload code)
|
||||
# make bootload_asb (uses the Ambiq Secure Bootlaoder to upload code)
|
||||
# make clean
|
||||
#
|
||||
# Filepaths
|
||||
# You can relocate this makefile easily by providing the path to the root of
|
||||
# the AmbiqSuite SDK. If that path is not specified then this file will
|
||||
# assume that it is located in
|
||||
# <AmbiqSDKRoot>/boards/<your_board>/examples/<your_example>/gcc
|
||||
# and use relative paths
|
||||
#
|
||||
# User Configuration
|
||||
# You must also specify which COM_PORT to use if you want to use the
|
||||
# 'bootlaoder' targets.
|
||||
# Windows example: COM_PORT=COM4
|
||||
# *nix example: COM_PORT=/dev/usbserialxxxx
|
||||
#
|
||||
# Python vs. Executable
|
||||
# For simplicity the upload tools are called as Python scripts by default.
|
||||
# Make sure PYTHON is set to the appropriate command to run Python3 from the
|
||||
# command line.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Options
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# You can override these values on the command line e.g. make bootload COM_PORT=/dev/cu***
|
||||
# COM_PORT is the serial port to use for uploading. For example COM#### on Windows or /dev/cu.usbserial-#### on *nix
|
||||
COM_PORT ?=
|
||||
# ASB_UPLOAD_BAUD is the baud rate setting of the Ambiq Secue Bootloader (ASB) as it is configured on the Apollo3. Defautls to 115200 if unset
|
||||
ASB_UPLOAD_BAUD ?=
|
||||
# SVL_UPLOAD_BAUD is the baud rate setting of the SparkFun Variable Loader (SVL). Defaults to 921600 if unset
|
||||
SVL_UPLOAD_BAUD ?=
|
||||
# PYTHON3 should evaluate to a call to the Python3 executable on your machine
|
||||
PYTHON3 ?=
|
||||
|
||||
# *Optionally* specify absolute paths to the SDK and the BSP
|
||||
# You can do this on the command line - e.g. make bootload SDKPATH=~/$AMBIQ_SDK_ROOT_PATH
|
||||
# Make sure to use / instead of \ when on Windows
|
||||
SDKPATH ?=# Set as the path to the SDK root if not located at ../../../../..
|
||||
COMMONPATH ?=# Set as the path to the BSP common folder if not located at ../../../../common
|
||||
BOARDPATH ?=# Set as the path to the board if not located at ../../..
|
||||
PROJECTPATH ?=# Set as the path to the project if not located at ..
|
||||
BOARD ?=# If using a SparkFun board you can simply provide the name e.g. redboard_artemis_atp
|
||||
|
||||
### Project Settings
|
||||
TARGET := hm01b0_camera_uart
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := $(TARGET)_gcc
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
ifeq ($(BOARD),)
|
||||
$(warning warning: no BOARD specified, will fall back to BOARDPATH for arbitrary bsp locations)
|
||||
else
|
||||
BOARDPATH=../../../../$(BOARD)
|
||||
$(warning Using BOARD=$(BOARD) at $(BOARDPATH))
|
||||
endif
|
||||
|
||||
ifeq ($(COM_PORT),)
|
||||
COM_PORT=COM4
|
||||
$(warning warning: you have not defined COM_PORT. Assuming it is COM4)
|
||||
endif
|
||||
ifeq ($(PYTHON3),)
|
||||
PYTHON3=python3
|
||||
$(warning warning: you have not defined PYTHON3. assuming it is accessible by 'python3')
|
||||
endif
|
||||
ifeq ($(ASB_UPLOAD_BAUD),)
|
||||
ASB_UPLOAD_BAUD=115200
|
||||
$(warning defaulting to 115200 baud for ASB)
|
||||
endif
|
||||
ifeq ($(SVL_UPLOAD_BAUD),)
|
||||
SVL_UPLOAD_BAUD=921600
|
||||
$(warning defaulting to 921600 baud for SVL)
|
||||
endif
|
||||
|
||||
ifeq ($(SDKPATH),)
|
||||
SDKPATH =../../../../..
|
||||
$(warning warning: you have not defined SDKPATH so will continue assuming that the SDK root is at $(SDKPATH))
|
||||
else
|
||||
# When the SDKPATH is given export it
|
||||
export SDKPATH
|
||||
endif
|
||||
|
||||
ifeq ($(COMMONPATH),)
|
||||
COMMONPATH =../../../../common
|
||||
$(warning warning: you have not defined COMMONPATH so will continue assuming that the COMMON root is at $(COMMONPATH))
|
||||
else
|
||||
# When the COMMONPATH is given export it
|
||||
export COMMONPATH
|
||||
endif
|
||||
|
||||
ifeq ($(BOARDPATH),)
|
||||
$(error Error: BOARDPATH must be provided)
|
||||
else
|
||||
# Ensure that boardpath does not include a trailing '/'
|
||||
ifeq ($(notdir $(BOARDPATH)),)
|
||||
override BOARDPATH:=$(patsubst %/, %,$(BOARDPATH))
|
||||
$(warning BOARDPATH had a trivial 'notdir' so we tried changing it to: $(BOARDPATH))
|
||||
endif
|
||||
BOARD=$(notdir $(BOARDPATH))
|
||||
# When the BOARDPATH is given export it
|
||||
export BOARDPATH
|
||||
endif
|
||||
|
||||
ifeq ($(PROJECTPATH),)
|
||||
PROJECTPATH =..
|
||||
$(warning warning: you have not defined PROJECTPATH so will continue assuming that the PROJECT root is at $(PROJECTPATH))
|
||||
else
|
||||
# When the PROJECTPATH is given export it
|
||||
export PROJECTPATH
|
||||
endif
|
||||
|
||||
CONFIG := $(PROJECTPATH)/gcc/$(BOARD)/bin
|
||||
$(warning CONFIG=$(CONFIG))
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Defines / Includes / Sources / Libraries
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Global Defines
|
||||
DEFINES= -DPART_$(PART)
|
||||
DEFINES+= -DAM_CUSTOM_BDADDR
|
||||
DEFINES+= -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -DAM_DEBUG_PRINTF
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
DEFINES+=
|
||||
|
||||
# Includes (Add paths to where example header files are located)
|
||||
INCLUDES=
|
||||
INCLUDES+= -I$(PROJECTPATH)/src
|
||||
INCLUDES+= -I$(BOARDPATH)/bsp
|
||||
INCLUDES+= -I$(SDKPATH)
|
||||
INCLUDES+= -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
INCLUDES+= -I$(COMMONPATH)/third_party/hm01b0
|
||||
INCLUDES+=
|
||||
|
||||
# Compilation Units (Add all the .c files you need to compile)
|
||||
SRC=
|
||||
SRC+= main.cpp
|
||||
SRC+= startup_gcc.c
|
||||
SRC+= am_util_delay.c
|
||||
SRC+= am_util_faultisr.c
|
||||
SRC+= am_util_id.c
|
||||
SRC+= am_util_stdio.c
|
||||
SRC+= HM01B0.c
|
||||
SRC+=
|
||||
|
||||
# VPATH (Add paths to where your source files are located)
|
||||
VPATH=
|
||||
VPATH+= $(PROJECTPATH)/src
|
||||
VPATH+= $(SDKPATH)/utils
|
||||
VPATH+= $(COMMONPATH)/examples/hm01b0_camera_uart
|
||||
VPATH+= $(COMMONPATH)/tools_sfe/templates
|
||||
VPATH+= $(COMMONPATH)/third_party/hm01b0
|
||||
VPATH+=
|
||||
|
||||
# LIBS (Precompiled libraries to include in the linker step)
|
||||
LIBS=
|
||||
LIBS+= $(BOARDPATH)/bsp/gcc/bin/libam_bsp.a
|
||||
LIBS+= $(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a
|
||||
LIBS+=
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
### Bootloader Tools
|
||||
ASB_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/asb/asb.py
|
||||
SVL_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/svl/svl.py
|
||||
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
STARTUP_FILE := ./startup_$(COMPILERNAME).c
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
CXX = $(TOOLCHAIN)-g++
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC CXX
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Machinery
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
XSRC = $(filter %.cpp,$(SRC))
|
||||
ZSRC = $(filter %.cc,$(SRC))
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(XSRC:%.cpp=$(CONFIG)/%.o)
|
||||
OBJS+= $(ZSRC:%.cc=$(CONFIG)/%.o)
|
||||
OBJS+= $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(XSRC:%.cpp=$(CONFIG)/%.d)
|
||||
DEPS+= $(ZSRC:%.cc=$(CONFIG)/%.d)
|
||||
DEPS+= $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CSTD = -std=c99
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP $(CSTD) -Wall -g
|
||||
CFLAGS+= -O0
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
XSTD = -std=gnu++11
|
||||
|
||||
XFLAGS = $(CFLAGS)
|
||||
XFLAGS+= -fno-exceptions
|
||||
|
||||
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
LFLAGS+= -nostartfiles -static
|
||||
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
|
||||
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
|
||||
LFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
CPFLAGS = -Obinary
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Targets / Rules
|
||||
#
|
||||
#******************************************************************************
|
||||
all: asb
|
||||
asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.cpp $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.cc $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET)_asb.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_linker.ld
|
||||
$(CONFIG)/$(TARGET)_asb.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_svl.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_svl_linker.ld
|
||||
$(CONFIG)/$(TARGET)_svl.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_%.bin: $(CONFIG)/$(TARGET)_%.axf
|
||||
@echo " Copying $(COMPILERNAME) $@..." ;\
|
||||
$(CP) $(CPFLAGS) $< $@ ;\
|
||||
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
|
||||
|
||||
bootload_asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
$(ASB_UPLOADER) --bin $(CONFIG)/$(TARGET)_asb.bin --load-address-blob 0x20000 --magic-num 0xCB -o $(CONFIG)/$(TARGET) --version 0x0 --load-address-wired 0xC000 -i 6 --options 0x1 -b $(ASB_UPLOAD_BAUD) -port $(COM_PORT) -r 2 -v
|
||||
|
||||
bootload_svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
$(SVL_UPLOADER) $(COM_PORT) -f $(CONFIG)/$(TARGET)_svl.bin -b $(SVL_UPLOAD_BAUD) -v
|
||||
|
||||
bootload: bootload_svl
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
|
||||
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map \
|
||||
$(CONFIG)/$(TARGET)_svl.bin $(CONFIG)/$(TARGET)_svl.axf \
|
||||
$(CONFIG)/$(TARGET)_svl.lst $(CONFIG)/$(TARGET)_svl.map \
|
||||
$(CONFIG)/$(TARGET)_asb.bin $(CONFIG)/$(TARGET)_asb.axf \
|
||||
$(CONFIG)/$(TARGET)_asb.lst $(CONFIG)/$(TARGET)_asb.map
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
$(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a:
|
||||
$(MAKE) -C $(SDKPATH)/mcu/apollo3/hal/gcc
|
||||
|
||||
$(SDKPATH)/third_party/uecc/gcc/bin/lib_uecc.a:
|
||||
$(MAKE) -C $(SDKPATH)/third_party/uecc
|
||||
|
||||
$(BOARDPATH)/bsp/gcc/bin/libam_bsp.a:
|
||||
$(MAKE) -C $(BOARDPATH)/bsp/gcc
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories bootload bootload_asb bootload_svl
|
||||
+356
@@ -0,0 +1,356 @@
|
||||
// based on demo from Himax
|
||||
|
||||
/*
|
||||
Copyright (c) 2019 SparkFun Electronics
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in all
|
||||
copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
#include "HM01B0.h"
|
||||
#include "HM01B0_RAW8_QVGA_8bits_lsb_5fps.h"
|
||||
#include "platform.h"
|
||||
|
||||
|
||||
//#define DEMO_HM01B0_TEST_MODE_ENABLE
|
||||
#define DEMO_HM01B0_FRAMEBUFFER_DUMP_ENABLE
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// HM01B0 Configuration
|
||||
//
|
||||
//*****************************************************************************
|
||||
static hm01b0_cfg_t s_HM01B0Cfg =
|
||||
{
|
||||
// i2c settings
|
||||
.ui16SlvAddr = HM01B0_DEFAULT_ADDRESS,
|
||||
.eIOMMode = HM01B0_IOM_MODE,
|
||||
.ui32IOMModule = HM01B0_IOM_MODULE,
|
||||
.sIOMCfg =
|
||||
{
|
||||
.eInterfaceMode = HM01B0_IOM_MODE,
|
||||
.ui32ClockFreq = HM01B0_I2C_CLOCK_FREQ,
|
||||
},
|
||||
.pIOMHandle = NULL,
|
||||
.ui8PinSCL = HM01B0_PIN_SCL,
|
||||
.ui8PinSDA = HM01B0_PIN_SDA,
|
||||
|
||||
// MCLK settings
|
||||
.ui32CTimerModule = HM01B0_MCLK_GENERATOR_MOD,
|
||||
.ui32CTimerSegment = HM01B0_MCLK_GENERATOR_SEG,
|
||||
.ui32CTimerOutputPin = HM01B0_PIN_MCLK,
|
||||
|
||||
// data interface
|
||||
.ui8PinD0 = HM01B0_PIN_D0,
|
||||
.ui8PinD1 = HM01B0_PIN_D1,
|
||||
.ui8PinD2 = HM01B0_PIN_D2,
|
||||
.ui8PinD3 = HM01B0_PIN_D3,
|
||||
.ui8PinD4 = HM01B0_PIN_D4,
|
||||
.ui8PinD5 = HM01B0_PIN_D5,
|
||||
.ui8PinD6 = HM01B0_PIN_D6,
|
||||
.ui8PinD7 = HM01B0_PIN_D7,
|
||||
.ui8PinVSYNC = HM01B0_PIN_VSYNC,
|
||||
.ui8PinHSYNC = HM01B0_PIN_HSYNC,
|
||||
.ui8PinPCLK = HM01B0_PIN_PCLK,
|
||||
|
||||
#ifdef HM01B0_PIN_TRIG
|
||||
.ui8PinTrig = HM01B0_PIN_TRIG,
|
||||
#endif // HM01B0_PIN_TRIG
|
||||
|
||||
#ifdef HM01B0_PIN_INT
|
||||
.ui8PinInt = HM01B0_PIN_INT,
|
||||
#endif // HM01B0_PIN_INT
|
||||
|
||||
.pfnGpioIsr = NULL,
|
||||
};
|
||||
|
||||
static uint8_t s_ui8FrameBuffer[HM01B0_PIXEL_X_NUM * HM01B0_PIXEL_Y_NUM];
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declarations
|
||||
//
|
||||
//*****************************************************************************
|
||||
void boost_mode_enable(bool bEnable);
|
||||
void am_gpio_isr(void);
|
||||
void framebuffer_dump(uint8_t *pui8Buffer, uint32_t ui32BufferLen);
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// High Speed UART Configuration
|
||||
//
|
||||
//*****************************************************************************
|
||||
static const am_hal_uart_config_t g_sBspUartConfigHS =
|
||||
{
|
||||
//
|
||||
// Standard UART settings: 115200-8-N-1
|
||||
//
|
||||
.ui32BaudRate = 115200,
|
||||
.ui32DataBits = AM_HAL_UART_DATA_BITS_8,
|
||||
.ui32Parity = AM_HAL_UART_PARITY_NONE,
|
||||
.ui32StopBits = AM_HAL_UART_ONE_STOP_BIT,
|
||||
.ui32FlowControl = AM_HAL_UART_FLOW_CTRL_NONE,
|
||||
|
||||
//
|
||||
// Set TX and RX FIFOs to interrupt at half-full.
|
||||
//
|
||||
.ui32FifoLevels = (AM_HAL_UART_TX_FIFO_1_2 |
|
||||
AM_HAL_UART_RX_FIFO_1_2),
|
||||
|
||||
//
|
||||
// The default interface will just use polling instead of buffers.
|
||||
//
|
||||
.pui8TxBuffer = 0,
|
||||
.ui32TxBufferSize = 0,
|
||||
.pui8RxBuffer = 0,
|
||||
.ui32RxBufferSize = 0,
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Main function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
int main(void)
|
||||
{
|
||||
|
||||
uint32_t ui32Err = HM01B0_ERR_OK;
|
||||
uint16_t ui16ModelId = 0x0000;
|
||||
uint8_t ui8Mode = 0xFF;
|
||||
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
|
||||
//
|
||||
// Set the default cache configuration
|
||||
//
|
||||
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
|
||||
am_hal_cachectrl_enable();
|
||||
|
||||
//
|
||||
// Configure the board for low power operation.
|
||||
//
|
||||
am_bsp_low_power_init();
|
||||
|
||||
#ifdef AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN
|
||||
//
|
||||
// Turn on the camera regulator
|
||||
//
|
||||
am_hal_gpio_pinconfig(AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN, g_AM_HAL_GPIO_OUTPUT_12);
|
||||
am_hal_gpio_output_set(AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN);
|
||||
#endif // AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN
|
||||
|
||||
//
|
||||
// Enable the UART print interface at high speed
|
||||
//
|
||||
am_bsp_uart_printf_enable_custom(&g_sBspUartConfigHS);
|
||||
|
||||
//
|
||||
// Clear the terminal and print the banner.
|
||||
//
|
||||
am_util_stdio_terminal_clear();
|
||||
am_util_stdio_printf("HM01B0 Demo\n");
|
||||
am_util_stdio_printf(" SCL:\tPin %d\n", s_HM01B0Cfg.ui8PinSCL);
|
||||
am_util_stdio_printf(" SDA:\tPin %d\n", s_HM01B0Cfg.ui8PinSDA);
|
||||
am_util_stdio_printf(" MCLK:\tPin %d\n", s_HM01B0Cfg.ui32CTimerOutputPin);
|
||||
am_util_stdio_printf(" VSYNC:\tPin %d\n", s_HM01B0Cfg.ui8PinVSYNC);
|
||||
am_util_stdio_printf(" HSYNC\tPin %d\n", s_HM01B0Cfg.ui8PinHSYNC);
|
||||
am_util_stdio_printf(" PCLK:\tPin %d\n", s_HM01B0Cfg.ui8PinPCLK);
|
||||
am_util_stdio_printf(" D0:\tPin %d\n", s_HM01B0Cfg.ui8PinD0);
|
||||
am_util_stdio_printf(" D1:\tPin %d\n", s_HM01B0Cfg.ui8PinD1);
|
||||
am_util_stdio_printf(" D2:\tPin %d\n", s_HM01B0Cfg.ui8PinD2);
|
||||
am_util_stdio_printf(" D3:\tPin %d\n", s_HM01B0Cfg.ui8PinD3);
|
||||
am_util_stdio_printf(" D4:\tPin %d\n", s_HM01B0Cfg.ui8PinD4);
|
||||
am_util_stdio_printf(" D5:\tPin %d\n", s_HM01B0Cfg.ui8PinD5);
|
||||
am_util_stdio_printf(" D6:\tPin %d\n", s_HM01B0Cfg.ui8PinD6);
|
||||
am_util_stdio_printf(" D7:\tPin %d\n", s_HM01B0Cfg.ui8PinD7);
|
||||
|
||||
//
|
||||
// Enable interrupts so we can receive messages from the boot host.
|
||||
//
|
||||
am_hal_interrupt_master_enable();
|
||||
|
||||
boost_mode_enable(true);
|
||||
|
||||
hm01b0_power_up(&s_HM01B0Cfg);
|
||||
|
||||
// todo: check the delay time to just fit the spec.
|
||||
am_util_delay_ms(1);
|
||||
|
||||
hm01b0_mclk_enable(&s_HM01B0Cfg);
|
||||
|
||||
// todo: check the delay time to just fit the spec.
|
||||
am_util_delay_ms(1);
|
||||
|
||||
hm01b0_init_if(&s_HM01B0Cfg);
|
||||
|
||||
hm01b0_get_modelid(&s_HM01B0Cfg, &ui16ModelId);
|
||||
|
||||
am_util_stdio_printf("HM01B0 Model ID 0x%04X\n", ui16ModelId);
|
||||
|
||||
hm01b0_init_system(&s_HM01B0Cfg, (hm_script_t *)sHM01B0InitScript, sizeof(sHM01B0InitScript)/sizeof(hm_script_t));
|
||||
|
||||
#ifdef DEMO_HM01B0_TEST_MODE_ENABLE
|
||||
am_util_stdio_printf("HM01B0 Enable walking 1s test mode\n");
|
||||
hm01b0_test_walking1s(&s_HM01B0Cfg);
|
||||
#else
|
||||
hm01b0_cal_ae(&s_HM01B0Cfg, 10, s_ui8FrameBuffer, sizeof(s_ui8FrameBuffer));
|
||||
#endif
|
||||
|
||||
while(1)
|
||||
{
|
||||
hm01b0_ae_cfg_t sAECfg;
|
||||
|
||||
hm01b0_get_mode(&s_HM01B0Cfg, &ui8Mode);
|
||||
|
||||
am_util_stdio_printf("HM01B0 current mode %d\n", ui8Mode);
|
||||
|
||||
ui32Err = hm01b0_get_ae(&s_HM01B0Cfg, &sAECfg);
|
||||
am_util_stdio_printf("AE convergance(0x%02X) TargetMean 0x%02X, ConvergeInTh 0x%02X, AEMean 0x%02X\n", ui32Err, sAECfg.ui8AETargetMean, sAECfg.ui8ConvergeInTh, sAECfg.ui8AEMean);
|
||||
|
||||
hm01b0_cmd_update(&s_HM01B0Cfg);
|
||||
|
||||
hm01b0_set_mode(&s_HM01B0Cfg, HM01B0_REG_MODE_SELECT_STREAMING_NFRAMES, 1);
|
||||
|
||||
hm01b0_blocking_read_oneframe(&s_HM01B0Cfg, s_ui8FrameBuffer, sizeof(s_ui8FrameBuffer));
|
||||
|
||||
#ifdef DEMO_HM01B0_TEST_MODE_ENABLE
|
||||
hm01b0_test_walking1s_check_data_sanity(s_ui8FrameBuffer, sizeof(s_ui8FrameBuffer), 10);
|
||||
am_util_delay_ms(3000);
|
||||
#endif
|
||||
|
||||
#ifdef DEMO_HM01B0_FRAMEBUFFER_DUMP_ENABLE
|
||||
framebuffer_dump(s_ui8FrameBuffer, sizeof(s_ui8FrameBuffer));
|
||||
#endif
|
||||
memset(s_ui8FrameBuffer, 0x00, sizeof(s_ui8FrameBuffer));
|
||||
|
||||
// give some time for user to stop the external itm logging.
|
||||
am_util_delay_ms(5000);
|
||||
|
||||
}
|
||||
|
||||
hm01b0_deinit_if(&s_HM01B0Cfg);
|
||||
|
||||
hm01b0_mclk_disable(&s_HM01B0Cfg);
|
||||
|
||||
hm01b0_power_down(&s_HM01B0Cfg);
|
||||
|
||||
boost_mode_enable(false);
|
||||
|
||||
//
|
||||
// Loop forever.
|
||||
//
|
||||
while (1)
|
||||
{
|
||||
//
|
||||
// Go to Deep Sleep.
|
||||
//
|
||||
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Helper Functions
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
// GPIO ISR
|
||||
void
|
||||
am_gpio_isr(void)
|
||||
{
|
||||
if (s_HM01B0Cfg.pfnGpioIsr)
|
||||
s_HM01B0Cfg.pfnGpioIsr();
|
||||
}
|
||||
|
||||
// frame buffer dump
|
||||
void framebuffer_dump(uint8_t *pui8Buffer, uint32_t ui32BufferLen)
|
||||
{
|
||||
am_util_stdio_printf("+++ frame +++");
|
||||
|
||||
for (uint32_t ui32Idx = 0; ui32Idx < ui32BufferLen; ui32Idx++)
|
||||
{
|
||||
if ((ui32Idx & 0xF) == 0x00)
|
||||
{
|
||||
am_util_stdio_printf("\n0x%08X ", ui32Idx);
|
||||
// this delay is to let itm have time to flush out data.
|
||||
am_util_delay_ms(1);
|
||||
}
|
||||
|
||||
am_util_stdio_printf("%02X ", *(pui8Buffer + ui32Idx));
|
||||
}
|
||||
|
||||
am_util_stdio_printf("\n--- frame ---\n");
|
||||
am_util_delay_ms(1);
|
||||
}
|
||||
|
||||
// burst mode enable
|
||||
void boost_mode_enable(bool bEnable){
|
||||
am_hal_burst_avail_e eBurstModeAvailable;
|
||||
am_hal_burst_mode_e eBurstMode;
|
||||
|
||||
// Check that the Burst Feature is available.
|
||||
if (AM_HAL_STATUS_SUCCESS == am_hal_burst_mode_initialize(&eBurstModeAvailable)){
|
||||
if (AM_HAL_BURST_AVAIL == eBurstModeAvailable){
|
||||
am_util_stdio_printf("Apollo3 Burst Mode is Available\n");
|
||||
}
|
||||
else{
|
||||
am_util_stdio_printf("Apollo3 Burst Mode is Not Available\n");
|
||||
while(1){};
|
||||
}
|
||||
}
|
||||
else{
|
||||
am_util_stdio_printf("Failed to Initialize for Burst Mode operation\n");
|
||||
}
|
||||
|
||||
// Make sure we are in "Normal" mode.
|
||||
if (AM_HAL_STATUS_SUCCESS == am_hal_burst_mode_disable(&eBurstMode)){
|
||||
if (AM_HAL_NORMAL_MODE == eBurstMode){
|
||||
am_util_stdio_printf("Apollo3 operating in Normal Mode (48MHz)\n");
|
||||
}
|
||||
}
|
||||
else{
|
||||
am_util_stdio_printf("Failed to Disable Burst Mode operation\n");
|
||||
}
|
||||
|
||||
// Put the MCU into "Burst" mode.
|
||||
if (bEnable)
|
||||
{
|
||||
if (AM_HAL_STATUS_SUCCESS == am_hal_burst_mode_enable(&eBurstMode)){
|
||||
if (AM_HAL_BURST_MODE == eBurstMode){
|
||||
am_util_stdio_printf("Apollo3 operating in Burst Mode (96MHz)\n");
|
||||
}
|
||||
}
|
||||
else{
|
||||
am_util_stdio_printf("Failed to Enable Burst Mode operation\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
+95
@@ -0,0 +1,95 @@
|
||||
#!/usr/bin/python
|
||||
|
||||
import os
|
||||
import sys
|
||||
import argparse
|
||||
import os.path
|
||||
from array import *
|
||||
|
||||
VERSION = 0
|
||||
SUBVERSION = 1
|
||||
|
||||
HIMAX_CMD_OFFSET_OP = 0
|
||||
HIMAX_CMD_OFFSET_ADDR = 1
|
||||
HIMAX_CMD_OFFSET_REGADDR = 2
|
||||
HIMAX_CMD_OFFSET_REGVALUE = 3
|
||||
|
||||
dict_DeviceDefaultAddress = {
|
||||
'HM01B0': '24',
|
||||
}
|
||||
|
||||
def check_file_existence(x):
|
||||
if not os.path.isfile(x):
|
||||
# Argparse uses the ArgumentTypeError to give a rejection message like:
|
||||
# error: argument input: x does not exist
|
||||
raise argparse.ArgumentTypeError("{0} does not exist".format(x))
|
||||
return x
|
||||
|
||||
def create_outputfile(args):
|
||||
|
||||
path = os.path.dirname(os.path.abspath(args.ifile))
|
||||
basename = os.path.split(os.path.splitext(args.ifile)[0])[-1]
|
||||
outputfile = os.path.join(path, basename + '.h')
|
||||
|
||||
return outputfile
|
||||
|
||||
def do_convert(args, ofilename):
|
||||
ofile = open(ofilename, 'w')
|
||||
ofile.write("\n")
|
||||
ofile.write("#include \"%s.h\"\n" % args.model)
|
||||
ofile.write("\n")
|
||||
ofile.write("const hm_script_t s%sInitScript[] =\n" % args.model)
|
||||
ofile.write("{\n")
|
||||
|
||||
with open(args.ifile, 'r') as ifile:
|
||||
for line in ifile:
|
||||
items = line.split()
|
||||
ofile.write("// %s\n" % (' '.join(items)))
|
||||
print("// %s" % (' '.join(items)))
|
||||
if len(items) > 1:
|
||||
if items[HIMAX_CMD_OFFSET_OP] == 'W' and items[HIMAX_CMD_OFFSET_ADDR] == dict_DeviceDefaultAddress.get(args.model):
|
||||
print(" {0x%s, 0x%s,}," % (items[HIMAX_CMD_OFFSET_REGADDR], items[HIMAX_CMD_OFFSET_REGVALUE]))
|
||||
ofile.write(" {0x%s, 0x%s,},\n" % (items[HIMAX_CMD_OFFSET_REGADDR], items[HIMAX_CMD_OFFSET_REGVALUE]))
|
||||
|
||||
ofile.write("};\n")
|
||||
ofile.close()
|
||||
|
||||
def main():
|
||||
parser = argparse.ArgumentParser(
|
||||
description = 'This program converts a given Himax Script into a c header file.')
|
||||
|
||||
parser.add_argument('-i', '--input',
|
||||
dest = 'ifile',
|
||||
required = True,
|
||||
help = 'input file',
|
||||
metavar = 'FILE',
|
||||
type = check_file_existence)
|
||||
|
||||
parser.add_argument('-m', '--model',
|
||||
dest = 'model',
|
||||
required = True,
|
||||
help = 'Himax Sensor Model',
|
||||
choices = ['HM01B0'],
|
||||
default = 'HM01B0',
|
||||
)
|
||||
|
||||
|
||||
parser.add_argument('-v', '--version',
|
||||
help = 'show the program version',
|
||||
action = 'version',
|
||||
version = '%(prog)s {ver}'.format(ver = 'v%d.%d' %\
|
||||
(VERSION, SUBVERSION)))
|
||||
|
||||
args = parser.parse_args()
|
||||
|
||||
ofilename = create_outputfile(args)
|
||||
|
||||
# print('%s' % ofile)
|
||||
|
||||
do_convert(args, ofilename)
|
||||
|
||||
print "done!"
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
+177
@@ -0,0 +1,177 @@
|
||||
#!/usr/bin/python3
|
||||
|
||||
import os
|
||||
import sys
|
||||
import argparse
|
||||
import os.path
|
||||
from array import *
|
||||
|
||||
from PIL import Image
|
||||
import numpy as np
|
||||
import re
|
||||
|
||||
dict_Resolutions = {
|
||||
'QVGA': (324, 244),
|
||||
}
|
||||
|
||||
# height = 244
|
||||
# width = 324
|
||||
|
||||
VERSION = 0
|
||||
SUBVERSION = 1
|
||||
|
||||
class RawData:
|
||||
ui8Array = None
|
||||
|
||||
def __init__(self):
|
||||
self.ui8Array = array('B')
|
||||
|
||||
|
||||
def check_file_existence(x):
|
||||
if not os.path.isfile(x):
|
||||
# Argparse uses the ArgumentTypeError to give a rejection message like:
|
||||
# error: argument input: x does not exist
|
||||
raise argparse.ArgumentTypeError("{0} does not exist".format(x))
|
||||
return x
|
||||
|
||||
def create_bmp(args, framelist):
|
||||
|
||||
(width, height) = dict_Resolutions.get(args.resolution, ("Resolution not supported", 0, 0))
|
||||
|
||||
for idx, frame in enumerate(framelist):
|
||||
bitmap = np.zeros((height, width), dtype=np.uint8)
|
||||
|
||||
h_idx = height - 1
|
||||
w_idx = 0
|
||||
|
||||
# fill up bitmap array
|
||||
for pixel in frame.ui8Array:
|
||||
bitmap[h_idx, w_idx] = pixel
|
||||
if w_idx == width - 1:
|
||||
w_idx = 0
|
||||
h_idx -= 1
|
||||
else:
|
||||
w_idx += 1
|
||||
|
||||
|
||||
|
||||
# h_idx = height - 1
|
||||
# w_idx = width - 1
|
||||
|
||||
# # fill up bitmap array
|
||||
# for pixel in frame.ui8Array:
|
||||
# bitmap[h_idx, w_idx] = pixel
|
||||
# if w_idx == 0:
|
||||
# w_idx = width - 1
|
||||
# h_idx -= 1
|
||||
# else:
|
||||
# w_idx -= 1
|
||||
|
||||
|
||||
|
||||
# h_idx = 0
|
||||
# w_idx = 0
|
||||
|
||||
# # fill up bitmap array
|
||||
# for pixel in frame.ui8Array:
|
||||
# bitmap[h_idx, w_idx] = pixel
|
||||
# if w_idx == width - 1:
|
||||
# w_idx = 0
|
||||
# h_idx += 1
|
||||
# else:
|
||||
# w_idx += 1
|
||||
|
||||
|
||||
|
||||
path = os.path.dirname(os.path.abspath(args.inputfile))
|
||||
basename = os.path.split(os.path.splitext(args.inputfile)[0])[-1]
|
||||
outputfile = os.path.join(path, basename + '_' + str(idx) + '.bmp')
|
||||
|
||||
# print (bitmap)
|
||||
img = Image.fromarray(bitmap, 'L')
|
||||
img.save(outputfile)
|
||||
img.show()
|
||||
|
||||
print ("%s created" % (basename + '_' + str(idx) + '.bmp'))
|
||||
|
||||
def do_convert(args):
|
||||
|
||||
(width, height) = dict_Resolutions.get(args.resolution, ("Resolution not supported", 0, 0))
|
||||
|
||||
with open(args.inputfile) as f:
|
||||
h_idx = 0
|
||||
w_idx = 0
|
||||
rawdata = None
|
||||
framestart = False
|
||||
framestop = False
|
||||
framelist = list()
|
||||
|
||||
# collect all pixel data into an int array
|
||||
for line in f:
|
||||
if line == "+++ frame +++\n":
|
||||
framestart = True
|
||||
rawdata = RawData()
|
||||
continue
|
||||
elif line == '--- frame ---\n':
|
||||
framestop = True
|
||||
|
||||
if framestart == True and framestop == False:
|
||||
linelist = re.findall(r"[\w']+", line)
|
||||
|
||||
if len(linelist) != 17:
|
||||
# drop this frame
|
||||
framestart = False
|
||||
continue
|
||||
|
||||
for item in linelist[1 : ]:
|
||||
rawdata.ui8Array.append(int(item, base=16))
|
||||
|
||||
elif framestart == True and framestop == True:
|
||||
|
||||
(address, length) = rawdata.ui8Array.buffer_info()
|
||||
|
||||
if (length * rawdata.ui8Array.itemsize) != (height * width):
|
||||
print ("Incorrect total data length %d" % length * rawdata.ui8Array.itemsize)
|
||||
else:
|
||||
framelist.append(rawdata)
|
||||
framestart = False
|
||||
framestop = False
|
||||
|
||||
create_bmp(args, framelist)
|
||||
|
||||
def main():
|
||||
parser = argparse.ArgumentParser(
|
||||
description = 'This program converts raw data from HM01B0 to a bmp file.')
|
||||
|
||||
parser.add_argument('-i', '--input',
|
||||
dest = 'inputfile',
|
||||
required = True,
|
||||
help = 'input file',
|
||||
metavar = 'FILE',
|
||||
type = check_file_existence
|
||||
)
|
||||
|
||||
parser.add_argument('-r', '--resolution',
|
||||
dest = 'resolution',
|
||||
required = False,
|
||||
help = 'Resolution',
|
||||
choices = ['QVGA'],
|
||||
default = 'QVGA',
|
||||
)
|
||||
|
||||
parser.add_argument('-v', '--version',
|
||||
help = 'Program version',
|
||||
action = 'version',
|
||||
version = '%(prog)s {ver}'.format(ver = 'v%d.%d' %\
|
||||
(VERSION, SUBVERSION))
|
||||
)
|
||||
|
||||
args = parser.parse_args()
|
||||
|
||||
do_convert(args)
|
||||
|
||||
print ("done!")
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
@@ -0,0 +1,439 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# This is an example makefile for SparkFun Apollo3 boards as used in the
|
||||
# AmbiqSuite SDK.
|
||||
#
|
||||
# Recommended usage
|
||||
# make
|
||||
# make bootload_svl (uses the SparkFun Variable Loader to upload code)
|
||||
# make bootload_asb (uses the Ambiq Secure Bootlaoder to upload code)
|
||||
# make clean
|
||||
#
|
||||
# Filepaths
|
||||
# You can relocate this makefile easily by providing the path to the root of
|
||||
# the AmbiqSuite SDK. If that path is not specified then this file will
|
||||
# assume that it is located in
|
||||
# <AmbiqSDKRoot>/boards/<your_board>/examples/<your_example>/gcc
|
||||
# and use relative paths
|
||||
#
|
||||
# User Configuration
|
||||
# You must also specify which COM_PORT to use if you want to use the
|
||||
# 'bootlaoder' targets.
|
||||
# Windows example: COM_PORT=COM4
|
||||
# *nix example: COM_PORT=/dev/usbserialxxxx
|
||||
#
|
||||
# Python vs. Executable
|
||||
# For simplicity the upload tools are called as Python scripts by default.
|
||||
# Make sure PYTHON is set to the appropriate command to run Python3 from the
|
||||
# command line.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Options
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# You can override these values on the command line e.g. make bootload COM_PORT=/dev/cu***
|
||||
# COM_PORT is the serial port to use for uploading. For example COM#### on Windows or /dev/cu.usbserial-#### on *nix
|
||||
COM_PORT ?=
|
||||
# ASB_UPLOAD_BAUD is the baud rate setting of the Ambiq Secue Bootloader (ASB) as it is configured on the Apollo3. Defautls to 115200 if unset
|
||||
ASB_UPLOAD_BAUD ?=
|
||||
# SVL_UPLOAD_BAUD is the baud rate setting of the SparkFun Variable Loader (SVL). Defaults to 921600 if unset
|
||||
SVL_UPLOAD_BAUD ?=
|
||||
# PYTHON3 should evaluate to a call to the Python3 executable on your machine
|
||||
PYTHON3 ?=
|
||||
|
||||
# *Optionally* specify absolute paths to the SDK and the BSP
|
||||
# You can do this on the command line - e.g. make bootload SDKPATH=~/$AMBIQ_SDK_ROOT_PATH
|
||||
# Make sure to use / instead of \ when on Windows
|
||||
SDKPATH ?=# Set as the path to the SDK root if not located at ../../../../..
|
||||
COMMONPATH ?=# Set as the path to the BSP common folder if not located at ../../../../common
|
||||
BOARDPATH ?=# Set as the path to the board if not located at ../../..
|
||||
PROJECTPATH ?=# Set as the path to the project if not located at ..
|
||||
BOARD ?=# If using a SparkFun board you can simply provide the name e.g. redboard_artemis_atp
|
||||
|
||||
### Project Settings
|
||||
TARGET := i2c
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := i2c_gcc
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
ifeq ($(BOARD),)
|
||||
$(warning warning: no BOARD specified, will fall back to BOARDPATH for arbitrary bsp locations)
|
||||
else
|
||||
BOARDPATH=../../../../$(BOARD)
|
||||
$(warning Using BOARD=$(BOARD) at $(BOARDPATH))
|
||||
endif
|
||||
|
||||
ifeq ($(COM_PORT),)
|
||||
COM_PORT=COM4
|
||||
$(warning warning: you have not defined COM_PORT. Assuming it is COM4)
|
||||
endif
|
||||
ifeq ($(PYTHON3),)
|
||||
PYTHON3=python3
|
||||
$(warning warning: you have not defined PYTHON3. assuming it is accessible by 'python3')
|
||||
endif
|
||||
ifeq ($(ASB_UPLOAD_BAUD),)
|
||||
ASB_UPLOAD_BAUD=115200
|
||||
$(warning defaulting to 115200 baud for ASB)
|
||||
endif
|
||||
ifeq ($(SVL_UPLOAD_BAUD),)
|
||||
SVL_UPLOAD_BAUD=921600
|
||||
$(warning defaulting to 921600 baud for SVL)
|
||||
endif
|
||||
|
||||
ifeq ($(SDKPATH),)
|
||||
SDKPATH =../../../../..
|
||||
$(warning warning: you have not defined SDKPATH so will continue assuming that the SDK root is at $(SDKPATH))
|
||||
else
|
||||
# When the SDKPATH is given export it
|
||||
export SDKPATH
|
||||
endif
|
||||
|
||||
ifeq ($(COMMONPATH),)
|
||||
COMMONPATH =../../../../common
|
||||
$(warning warning: you have not defined COMMONPATH so will continue assuming that the COMMON root is at $(COMMONPATH))
|
||||
else
|
||||
# When the COMMONPATH is given export it
|
||||
export COMMONPATH
|
||||
endif
|
||||
|
||||
ifeq ($(BOARDPATH),)
|
||||
$(error Error: BOARDPATH must be provided)
|
||||
else
|
||||
# Ensure that boardpath does not include a trailing '/'
|
||||
ifeq ($(notdir $(BOARDPATH)),)
|
||||
override BOARDPATH:=$(patsubst %/, %,$(BOARDPATH))
|
||||
$(warning BOARDPATH had a trivial 'notdir' so we tried changing it to: $(BOARDPATH))
|
||||
endif
|
||||
BOARD=$(notdir $(BOARDPATH))
|
||||
# When the BOARDPATH is given export it
|
||||
export BOARDPATH
|
||||
endif
|
||||
|
||||
ifeq ($(PROJECTPATH),)
|
||||
PROJECTPATH =..
|
||||
$(warning warning: you have not defined PROJECTPATH so will continue assuming that the PROJECT root is at $(PROJECTPATH))
|
||||
else
|
||||
# When the PROJECTPATH is given export it
|
||||
export PROJECTPATH
|
||||
endif
|
||||
|
||||
CONFIG := $(PROJECTPATH)/gcc/$(BOARD)/bin
|
||||
$(warning CONFIG=$(CONFIG))
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Defines / Includes / Sources / Libraries
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Global Defines
|
||||
DEFINES= -DPART_$(PART)
|
||||
DEFINES+= -DAM_CUSTOM_BDADDR
|
||||
DEFINES+= -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -DAM_DEBUG_PRINTF
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
DEFINES+= -DAM_UTIL_FAULTISR_PRINT
|
||||
DEFINES+= -DUNITY_INCLUDE_CONFIG_H
|
||||
DEFINES+= -D__FPU_PRESENT
|
||||
DEFINES+=
|
||||
|
||||
# Includes (Add paths to where example header files are located)
|
||||
INCLUDES=
|
||||
INCLUDES+= -I$(PROJECTPATH)/src
|
||||
INCLUDES+= -I$(BOARDPATH)/bsp
|
||||
INCLUDES+= -I$(SDKPATH)
|
||||
INCLUDES+= -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
INCLUDES+=
|
||||
|
||||
# Compilation Units (Add all the .c files you need to compile)
|
||||
SRC=
|
||||
SRC+= main.c
|
||||
SRC+= startup_gcc.c
|
||||
SRC+= am_util_delay.c
|
||||
SRC+= am_util_faultisr.c
|
||||
SRC+= am_util_stdio.c
|
||||
|
||||
SRC+= am_hal_ble_patch.c
|
||||
SRC+= am_hal_ble.c
|
||||
SRC+= am_hal_ble_patch_b0.c
|
||||
SRC+= am_hal_burst.c
|
||||
SRC+= am_hal_cachectrl.c
|
||||
SRC+= am_hal_adc.c
|
||||
SRC+= am_hal_clkgen.c
|
||||
SRC+= am_hal_cmdq.c
|
||||
SRC+= am_hal_ctimer.c
|
||||
SRC+= am_hal_debug.c
|
||||
SRC+= am_hal_flash.c
|
||||
SRC+= am_hal_global.c
|
||||
SRC+= am_hal_gpio.c
|
||||
SRC+= am_hal_interrupt.c
|
||||
SRC+= am_hal_iom.c
|
||||
SRC+= am_hal_ios.c
|
||||
SRC+= am_hal_itm.c
|
||||
SRC+= am_hal_mcuctrl.c
|
||||
SRC+= am_hal_mspi.c
|
||||
SRC+= am_hal_pdm.c
|
||||
SRC+= am_hal_pwrctrl.c
|
||||
SRC+= am_hal_queue.c
|
||||
SRC+= am_hal_reset.c
|
||||
SRC+= am_hal_rtc.c
|
||||
SRC+= am_hal_scard.c
|
||||
SRC+= am_hal_secure_ota.c
|
||||
SRC+= am_hal_security.c
|
||||
SRC+= am_hal_stimer.c
|
||||
SRC+= am_hal_sysctrl.c
|
||||
SRC+= am_hal_systick.c
|
||||
SRC+= am_hal_tpiu.c
|
||||
SRC+= am_hal_uart.c
|
||||
SRC+= am_hal_wdt.c
|
||||
|
||||
SRC+=
|
||||
|
||||
# VPATH (Add paths to where your source files are located)
|
||||
VPATH=
|
||||
VPATH+= $(PROJECTPATH)/src
|
||||
VPATH+= $(SDKPATH)/utils
|
||||
VPATH+= $(COMMONPATH)/examples/i2c
|
||||
VPATH+= $(COMMONPATH)/tools_sfe/templates
|
||||
VPATH+= $(SDKPATH)/mcu/apollo3/hal
|
||||
VPATH+=
|
||||
|
||||
# LIBS (Precompiled libraries to include in the linker step)
|
||||
LIBS=
|
||||
LIBS+= $(BOARDPATH)/bsp/gcc/bin/libam_bsp.a
|
||||
# LIBS+= $(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a
|
||||
LIBS+= $(SDKPATH)/CMSIS/ARM/Lib/ARM/libarm_cortexM4lf_math.a
|
||||
LIBS+=
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
### Bootloader Tools
|
||||
ASB_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/asb/asb.py
|
||||
SVL_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/svl/svl.py
|
||||
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
STARTUP_FILE := ./startup_$(COMPILERNAME).c
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
CXX = $(TOOLCHAIN)-g++
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC CXX
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Machinery
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
XSRC = $(filter %.cpp,$(SRC))
|
||||
ZSRC = $(filter %.cc,$(SRC))
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(XSRC:%.cpp=$(CONFIG)/%.o)
|
||||
OBJS+= $(ZSRC:%.cc=$(CONFIG)/%.o)
|
||||
OBJS+= $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(XSRC:%.cpp=$(CONFIG)/%.d)
|
||||
DEPS+= $(ZSRC:%.cc=$(CONFIG)/%.d)
|
||||
DEPS+= $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CSTD = -std=c99
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP $(CSTD) -Wall -g
|
||||
CFLAGS+= -O0
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
XSTD = -std=gnu++11
|
||||
|
||||
XFLAGS = $(CFLAGS)
|
||||
XFLAGS+= -fno-exceptions
|
||||
|
||||
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
LFLAGS+= -nostartfiles -static
|
||||
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
|
||||
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
|
||||
LFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
CPFLAGS = -Obinary
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Targets / Rules
|
||||
#
|
||||
#******************************************************************************
|
||||
all: asb
|
||||
asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.cpp $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.cc $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET)_asb.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_linker.ld
|
||||
$(CONFIG)/$(TARGET)_asb.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_svl.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_svl_linker.ld
|
||||
$(CONFIG)/$(TARGET)_svl.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_%.bin: $(CONFIG)/$(TARGET)_%.axf
|
||||
@echo " Copying $(COMPILERNAME) $@..." ;\
|
||||
$(CP) $(CPFLAGS) $< $@ ;\
|
||||
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
|
||||
|
||||
bootload_asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
$(ASB_UPLOADER) --bin $(CONFIG)/$(TARGET)_asb.bin --load-address-blob 0x20000 --magic-num 0xCB -o $(CONFIG)/$(TARGET) --version 0x0 --load-address-wired 0xC000 -i 6 --options 0x1 -b $(ASB_UPLOAD_BAUD) -port $(COM_PORT) -r 2 -v
|
||||
|
||||
bootload_svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
$(SVL_UPLOADER) $(COM_PORT) -f $(CONFIG)/$(TARGET)_svl.bin -b $(SVL_UPLOAD_BAUD) -v
|
||||
|
||||
bootload: bootload_svl
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
|
||||
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map \
|
||||
$(CONFIG)/$(TARGET)_svl.bin $(CONFIG)/$(TARGET)_svl.axf \
|
||||
$(CONFIG)/$(TARGET)_svl.lst $(CONFIG)/$(TARGET)_svl.map \
|
||||
$(CONFIG)/$(TARGET)_asb.bin $(CONFIG)/$(TARGET)_asb.axf \
|
||||
$(CONFIG)/$(TARGET)_asb.lst $(CONFIG)/$(TARGET)_asb.map
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
$(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a:
|
||||
$(MAKE) -C $(SDKPATH)/mcu/apollo3/hal/gcc
|
||||
|
||||
$(SDKPATH)/third_party/uecc/gcc/bin/lib_uecc.a:
|
||||
$(MAKE) -C $(SDKPATH)/third_party/uecc
|
||||
|
||||
$(BOARDPATH)/bsp/gcc/bin/libam_bsp.a:
|
||||
$(MAKE) -C $(BOARDPATH)/bsp/gcc
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories bootload bootload_asb bootload_svl
|
||||
@@ -0,0 +1,166 @@
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
|
||||
// #define ASYNCH // comment out to use blocking methods
|
||||
|
||||
#define DEVICE_ADDR (0xEE)
|
||||
#define DEVICE_ADDR_R (DEVICE_ADDR | 0x01)
|
||||
#define DEVICE_ADDR_W (DEVICE_ADDR & 0xFE)
|
||||
|
||||
#define IOMN (2)
|
||||
#define I2C_FREQ (AM_HAL_IOM_400KHZ)
|
||||
void* iom_handle = NULL;
|
||||
am_hal_iom_config_t iom_cfg = {0};
|
||||
am_hal_iom_transfer_t xfer = {0};
|
||||
|
||||
#define report(s) am_util_stdio_printf("status: 0x%08X (function: %s, file: %s, line: %d)\n", s, __PRETTY_FUNCTION__, __FILE__, __LINE__)
|
||||
|
||||
volatile bool xfer_complete = false;
|
||||
volatile uint32_t txn_stat = 0;
|
||||
void xfer_complete_callback(void *pCallbackCtxt, uint32_t transactionStatus){
|
||||
(void)pCallbackCtxt;
|
||||
xfer_complete = true;
|
||||
txn_stat = transactionStatus;
|
||||
}
|
||||
|
||||
void init_iom( void ){
|
||||
uint32_t status = AM_HAL_STATUS_SUCCESS;
|
||||
|
||||
iom_cfg.eInterfaceMode = AM_HAL_IOM_I2C_MODE;
|
||||
iom_cfg.ui32ClockFreq = I2C_FREQ;
|
||||
iom_cfg.pNBTxnBuf = NULL;
|
||||
iom_cfg.ui32NBTxnBufLength = 0;
|
||||
|
||||
#ifdef ASYNCH
|
||||
// iom_cfg.pNMTxnBuf = ???
|
||||
// iom_cfg.ui32NBTxnBufLength = ???
|
||||
#endif // ASYNCH
|
||||
|
||||
status = am_hal_iom_initialize(IOMN, &iom_handle);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
|
||||
status = am_hal_iom_power_ctrl(iom_handle, AM_HAL_SYSCTRL_WAKE, false);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
|
||||
status = am_hal_iom_configure(iom_handle, &iom_cfg);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
|
||||
status = am_hal_iom_enable(iom_handle);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
|
||||
// config pins
|
||||
status = am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_SCL, g_AM_BSP_GPIO_IOM2_SCL);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
|
||||
status = am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_SDA, g_AM_BSP_GPIO_IOM2_SDA);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
}
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Main
|
||||
//
|
||||
//*****************************************************************************
|
||||
int
|
||||
main(void)
|
||||
{
|
||||
uint32_t status = AM_HAL_STATUS_SUCCESS;
|
||||
|
||||
//
|
||||
// Perform the standard initialzation for clocks, cache settings, and
|
||||
// board-level low-power operation.
|
||||
//
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
|
||||
am_hal_cachectrl_enable();
|
||||
am_bsp_low_power_init();
|
||||
|
||||
//
|
||||
// Initialize the printf interface for UART output
|
||||
//
|
||||
am_bsp_uart_printf_enable();
|
||||
|
||||
//
|
||||
// Print the banner.
|
||||
//
|
||||
am_util_stdio_terminal_clear();
|
||||
am_util_stdio_printf("I2C Testing\n\n");
|
||||
|
||||
|
||||
// do i2c stuff
|
||||
init_iom();
|
||||
|
||||
char cmd[2];
|
||||
|
||||
cmd[0] = 0x01;
|
||||
cmd[1] = 0x00;
|
||||
// i2c.write(addr8bit, cmd, 2);
|
||||
|
||||
xfer.uPeerInfo.ui32I2CDevAddr = DEVICE_ADDR_W;
|
||||
xfer.ui32InstrLen = 0;
|
||||
xfer.ui32Instr = 0;
|
||||
xfer.ui32NumBytes = 2;
|
||||
xfer.eDirection = AM_HAL_IOM_TX;
|
||||
xfer.pui32TxBuffer = (uint32_t*)cmd;
|
||||
xfer.pui32RxBuffer = NULL;
|
||||
xfer.bContinue = false;
|
||||
xfer.ui8RepeatCount = 0;
|
||||
xfer.ui8Priority = 1;
|
||||
xfer.ui32PauseCondition = 0;
|
||||
xfer.ui32StatusSetClr = 0;
|
||||
|
||||
|
||||
#ifndef AM_HAL_DISABLE_API_VALIDATION
|
||||
am_util_stdio_printf("API Validation is enabled\n");
|
||||
#else
|
||||
am_util_stdio_printf("API Validation DISabled\n");
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef ASYNCH
|
||||
status = am_hal_iom_nonblocking_transfer(iom_handle, &xfer, xfer_complete_callback, NULL);
|
||||
report(status);
|
||||
|
||||
while(!xfer_complete){
|
||||
static uint32_t count = 0;
|
||||
am_util_stdio_printf("waiting for xfer to complete... %d\n", count++);
|
||||
if(count > 0x0000FFFF){
|
||||
am_util_stdio_printf("!TIME OUT!\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
#else
|
||||
status = am_hal_iom_blocking_transfer(iom_handle, &xfer);
|
||||
report(status);
|
||||
#endif // ASYNCH
|
||||
|
||||
const char* stat_msg = NULL;
|
||||
switch(status){
|
||||
case AM_HAL_STATUS_SUCCESS : stat_msg = "success"; break;
|
||||
case AM_HAL_IOM_ERR_I2C_NAK : stat_msg = "NAK"; break;
|
||||
case AM_HAL_IOM_ERR_I2C_ARB : stat_msg = "ARB"; break;
|
||||
|
||||
default:
|
||||
stat_msg = "UNKNOWN ERROR";
|
||||
break;
|
||||
}
|
||||
am_util_stdio_printf("I2C write result: %s\n", stat_msg);
|
||||
|
||||
// cmd[0] = 0x00;
|
||||
// i2c.write(addr8bit, cmd, 1);
|
||||
// i2c.read(addr8bit, cmd, 2);
|
||||
|
||||
|
||||
//
|
||||
// Loop forever while sleeping.
|
||||
//
|
||||
while (1)
|
||||
{
|
||||
//
|
||||
// Go to Deep Sleep.
|
||||
//
|
||||
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
|
||||
}
|
||||
}
|
||||
+412
@@ -0,0 +1,412 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# This is an example makefile for SparkFun Apollo3 boards as used in the
|
||||
# AmbiqSuite SDK.
|
||||
#
|
||||
# Recommended usage
|
||||
# make
|
||||
# make bootload_svl (uses the SparkFun Variable Loader to upload code)
|
||||
# make bootload_asb (uses the Ambiq Secure Bootlaoder to upload code)
|
||||
# make clean
|
||||
#
|
||||
# Filepaths
|
||||
# You can relocate this makefile easily by providing the path to the root of
|
||||
# the AmbiqSuite SDK. If that path is not specified then this file will
|
||||
# assume that it is located in
|
||||
# <AmbiqSDKRoot>/boards/<your_board>/examples/<your_example>/gcc
|
||||
# and use relative paths
|
||||
#
|
||||
# User Configuration
|
||||
# You must also specify which COM_PORT to use if you want to use the
|
||||
# 'bootlaoder' targets.
|
||||
# Windows example: COM_PORT=COM4
|
||||
# *nix example: COM_PORT=/dev/usbserialxxxx
|
||||
#
|
||||
# Python vs. Executable
|
||||
# For simplicity the upload tools are called as Python scripts by default.
|
||||
# Make sure PYTHON is set to the appropriate command to run Python3 from the
|
||||
# command line.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Options
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# You can override these values on the command line e.g. make bootload COM_PORT=/dev/cu***
|
||||
# COM_PORT is the serial port to use for uploading. For example COM#### on Windows or /dev/cu.usbserial-#### on *nix
|
||||
COM_PORT ?=
|
||||
# ASB_UPLOAD_BAUD is the baud rate setting of the Ambiq Secue Bootloader (ASB) as it is configured on the Apollo3. Defautls to 115200 if unset
|
||||
ASB_UPLOAD_BAUD ?=
|
||||
# SVL_UPLOAD_BAUD is the baud rate setting of the SparkFun Variable Loader (SVL). Defaults to 921600 if unset
|
||||
SVL_UPLOAD_BAUD ?=
|
||||
# PYTHON3 should evaluate to a call to the Python3 executable on your machine
|
||||
PYTHON3 ?=
|
||||
|
||||
# *Optionally* specify absolute paths to the SDK and the BSP
|
||||
# You can do this on the command line - e.g. make bootload SDKPATH=~/$AMBIQ_SDK_ROOT_PATH
|
||||
# Make sure to use / instead of \ when on Windows
|
||||
SDKPATH ?=# Set as the path to the SDK root if not located at ../../../../..
|
||||
COMMONPATH ?=# Set as the path to the BSP common folder if not located at ../../../../common
|
||||
BOARDPATH ?=# Set as the path to the board if not located at ../../..
|
||||
PROJECTPATH ?=# Set as the path to the project if not located at ..
|
||||
BOARD ?=# If using a SparkFun board you can simply provide the name e.g. redboard_artemis_atp
|
||||
|
||||
### Project Settings
|
||||
TARGET := linker_tests
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := $(TARGET)_gcc
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
ifeq ($(BOARD),)
|
||||
$(warning warning: no BOARD specified, will fall back to BOARDPATH for arbitrary bsp locations)
|
||||
else
|
||||
BOARDPATH=../../../../$(BOARD)
|
||||
$(warning Using BOARD=$(BOARD) at $(BOARDPATH))
|
||||
endif
|
||||
|
||||
ifeq ($(COM_PORT),)
|
||||
COM_PORT=COM4
|
||||
$(warning warning: you have not defined COM_PORT. Assuming it is COM4)
|
||||
endif
|
||||
ifeq ($(PYTHON3),)
|
||||
PYTHON3=python3
|
||||
$(warning warning: you have not defined PYTHON3. assuming it is accessible by 'python3')
|
||||
endif
|
||||
ifeq ($(ASB_UPLOAD_BAUD),)
|
||||
ASB_UPLOAD_BAUD=115200
|
||||
$(warning defaulting to 115200 baud for ASB)
|
||||
endif
|
||||
ifeq ($(SVL_UPLOAD_BAUD),)
|
||||
SVL_UPLOAD_BAUD=921600
|
||||
$(warning defaulting to 921600 baud for SVL)
|
||||
endif
|
||||
|
||||
ifeq ($(SDKPATH),)
|
||||
SDKPATH =../../../../..
|
||||
$(warning warning: you have not defined SDKPATH so will continue assuming that the SDK root is at $(SDKPATH))
|
||||
else
|
||||
# When the SDKPATH is given export it
|
||||
export SDKPATH
|
||||
endif
|
||||
|
||||
ifeq ($(COMMONPATH),)
|
||||
COMMONPATH =../../../../common
|
||||
$(warning warning: you have not defined COMMONPATH so will continue assuming that the COMMON root is at $(COMMONPATH))
|
||||
else
|
||||
# When the COMMONPATH is given export it
|
||||
export COMMONPATH
|
||||
endif
|
||||
|
||||
ifeq ($(BOARDPATH),)
|
||||
$(error Error: BOARDPATH must be provided)
|
||||
else
|
||||
# Ensure that boardpath does not include a trailing '/'
|
||||
ifeq ($(notdir $(BOARDPATH)),)
|
||||
override BOARDPATH:=$(patsubst %/, %,$(BOARDPATH))
|
||||
$(warning BOARDPATH had a trivial 'notdir' so we tried changing it to: $(BOARDPATH))
|
||||
endif
|
||||
BOARD=$(notdir $(BOARDPATH))
|
||||
# When the BOARDPATH is given export it
|
||||
export BOARDPATH
|
||||
endif
|
||||
|
||||
ifeq ($(PROJECTPATH),)
|
||||
PROJECTPATH =..
|
||||
$(warning warning: you have not defined PROJECTPATH so will continue assuming that the PROJECT root is at $(PROJECTPATH))
|
||||
else
|
||||
# When the PROJECTPATH is given export it
|
||||
export PROJECTPATH
|
||||
endif
|
||||
|
||||
CONFIG := $(PROJECTPATH)/gcc/$(BOARD)/bin
|
||||
$(warning CONFIG=$(CONFIG))
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Defines / Includes / Sources / Libraries
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Global Defines
|
||||
DEFINES= -DPART_$(PART)
|
||||
DEFINES+= -DAM_CUSTOM_BDADDR
|
||||
DEFINES+= -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -DAM_DEBUG_PRINTF
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
DEFINES+=
|
||||
|
||||
# Includes (Add paths to where example header files are located)
|
||||
INCLUDES=
|
||||
INCLUDES+= -I$(PROJECTPATH)/src
|
||||
INCLUDES+= -I$(BOARDPATH)/bsp
|
||||
INCLUDES+= -I$(SDKPATH)
|
||||
INCLUDES+= -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/linker_tests
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/linker_tests/test_framework
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/linker_tests/tests
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/linker_tests/tests/heap
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/linker_tests/tests/stack
|
||||
INCLUDES+=
|
||||
|
||||
# Compilation Units (Add all the .c files you need to compile)
|
||||
SRC=
|
||||
SRC+= main.cpp
|
||||
SRC+= am_util_stdio.c
|
||||
SRC+= startup_gcc.c
|
||||
SRC+= system.c
|
||||
SRC+= test_framework.cpp
|
||||
SRC+= tests.cpp
|
||||
SRC+= test_heap.cpp
|
||||
SRC+= test_stack.cpp
|
||||
SRC+=
|
||||
|
||||
# VPATH (Add paths to where your source files are located)
|
||||
VPATH=
|
||||
VPATH+= $(PROJECTPATH)/src
|
||||
VPATH+= $(SDKPATH)/utils
|
||||
VPATH+= $(COMMONPATH)/tools_sfe/templates
|
||||
VPATH+= $(COMMONPATH)/examples/linker_tests
|
||||
VPATH+= $(COMMONPATH)/examples/linker_tests/test_framework
|
||||
VPATH+= $(COMMONPATH)/examples/linker_tests/tests
|
||||
VPATH+= $(COMMONPATH)/examples/linker_tests/tests/heap
|
||||
VPATH+= $(COMMONPATH)/examples/linker_tests/tests/stack
|
||||
VPATH+=
|
||||
|
||||
# LIBS (Precompiled libraries to include in the linker step)
|
||||
LIBS=
|
||||
LIBS+= $(BOARDPATH)/bsp/gcc/bin/libam_bsp.a
|
||||
LIBS+= $(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a
|
||||
LIBS+=
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
### Bootloader Tools
|
||||
ASB_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/asb/asb.py
|
||||
SVL_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/svl/svl.py
|
||||
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
STARTUP_FILE := ./startup_$(COMPILERNAME).c
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
CXX = $(TOOLCHAIN)-g++
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC CXX
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Machinery
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
XSRC = $(filter %.cpp,$(SRC))
|
||||
ZSRC = $(filter %.cc,$(SRC))
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(XSRC:%.cpp=$(CONFIG)/%.o)
|
||||
OBJS+= $(ZSRC:%.cc=$(CONFIG)/%.o)
|
||||
OBJS+= $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(XSRC:%.cpp=$(CONFIG)/%.d)
|
||||
DEPS+= $(ZSRC:%.cc=$(CONFIG)/%.d)
|
||||
DEPS+= $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CSTD = -std=c99
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP -Wall -g
|
||||
CFLAGS+= -O0
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
XSTD = -std=gnu++11
|
||||
|
||||
XFLAGS = $(CFLAGS)
|
||||
XFLAGS+= -fno-exceptions -fno-threadsafe-statics # added -fno-threadsafe-statics to allow static local contructors
|
||||
|
||||
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
LFLAGS+= -nostartfiles -static
|
||||
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
|
||||
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
|
||||
LFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
CPFLAGS = -Obinary
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Targets / Rules
|
||||
#
|
||||
#******************************************************************************
|
||||
all: asb
|
||||
asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.cpp $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.cc $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET)_asb.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_linker.ld
|
||||
$(CONFIG)/$(TARGET)_asb.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_svl.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_svl_linker.ld
|
||||
$(CONFIG)/$(TARGET)_svl.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_%.bin: $(CONFIG)/$(TARGET)_%.axf
|
||||
@echo " Copying $(COMPILERNAME) $@..." ;\
|
||||
$(CP) $(CPFLAGS) $< $@ ;\
|
||||
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
|
||||
|
||||
bootload_asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
$(ASB_UPLOADER) --bin $(CONFIG)/$(TARGET)_asb.bin --load-address-blob 0x20000 --magic-num 0xCB -o $(CONFIG)/$(TARGET) --version 0x0 --load-address-wired 0xC000 -i 6 --options 0x1 -b $(ASB_UPLOAD_BAUD) -port $(COM_PORT) -r 2 -v
|
||||
|
||||
bootload_svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
$(SVL_UPLOADER) $(COM_PORT) -f $(CONFIG)/$(TARGET)_svl.bin -b $(SVL_UPLOAD_BAUD) -v
|
||||
|
||||
bootload: bootload_svl
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
|
||||
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map \
|
||||
$(CONFIG)/$(TARGET)_svl.bin $(CONFIG)/$(TARGET)_svl.axf \
|
||||
$(CONFIG)/$(TARGET)_svl.lst $(CONFIG)/$(TARGET)_svl.map \
|
||||
$(CONFIG)/$(TARGET)_asb.bin $(CONFIG)/$(TARGET)_asb.axf \
|
||||
$(CONFIG)/$(TARGET)_asb.lst $(CONFIG)/$(TARGET)_asb.map
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
$(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a:
|
||||
$(MAKE) -C $(SDKPATH)/mcu/apollo3/hal/gcc
|
||||
|
||||
$(SDKPATH)/third_party/uecc/gcc/bin/lib_uecc.a:
|
||||
$(MAKE) -C $(SDKPATH)/third_party/uecc
|
||||
|
||||
$(BOARDPATH)/bsp/gcc/bin/libam_bsp.a:
|
||||
$(MAKE) -C $(BOARDPATH)/bsp/gcc
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories bootload bootload_asb bootload_svl
|
||||
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
Tests / verifies linker
|
||||
|
||||
Checks:
|
||||
- heap allocation
|
||||
- stack allocation
|
||||
*/
|
||||
|
||||
#include "main.h"
|
||||
#include "test_framework.h"
|
||||
#include "tests.h"
|
||||
|
||||
// main
|
||||
int main()
|
||||
{
|
||||
// Setup system clocks
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
|
||||
// Set the default cache configuration
|
||||
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
|
||||
am_hal_cachectrl_enable();
|
||||
|
||||
// Configure the board for low power operation.
|
||||
am_bsp_low_power_init();
|
||||
|
||||
// Enable the UART print interface.
|
||||
am_bsp_uart_printf_enable();
|
||||
|
||||
// Clear the terminal and print the banner.
|
||||
am_util_stdio_terminal_clear();
|
||||
am_util_stdio_printf("Linker Tests\n");
|
||||
am_util_stdio_printf("=============\n");
|
||||
am_util_stdio_printf("\n");
|
||||
|
||||
// run tests
|
||||
run_tests(tests);
|
||||
|
||||
// Loop forever while sleeping.
|
||||
while (1){
|
||||
// Go to Deep Sleep.
|
||||
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,9 @@
|
||||
#ifndef _MAIN_H_
|
||||
#define _MAIN_H_
|
||||
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
#include <stdbool.h>
|
||||
|
||||
#endif // _MAIN_H_
|
||||
+18
@@ -0,0 +1,18 @@
|
||||
#include "test_framework.h"
|
||||
|
||||
void print_test_info( test_info_t* info ){
|
||||
am_util_stdio_printf("Test Name: %s\n", (info->name != NULL) ? info->name : "N/A");
|
||||
am_util_stdio_printf("==========\n");
|
||||
am_util_stdio_printf("metric: %s\n", (info->metric != NULL) ? info->metric : "N/A");
|
||||
am_util_stdio_printf("value: %d\n", info->value);
|
||||
am_util_stdio_printf("\n");
|
||||
}
|
||||
void run_tests(test_fn* tests){
|
||||
test_info_t* info;
|
||||
while(*tests != NULL){
|
||||
(*tests)(&info);
|
||||
print_test_info(info);
|
||||
tests++;
|
||||
}
|
||||
am_util_stdio_printf("\n\nAll tests complete\n");
|
||||
}
|
||||
+16
@@ -0,0 +1,16 @@
|
||||
#ifndef _TEST_FRAMEWORK_H_
|
||||
#define _TEST_FRAMEWORK_H_
|
||||
|
||||
#include "main.h"
|
||||
#include <stdlib.h>
|
||||
|
||||
typedef struct _test_info_t {
|
||||
char* name;
|
||||
char* metric;
|
||||
uint32_t value;
|
||||
} test_info_t;
|
||||
typedef void (*test_fn)( test_info_t** info );
|
||||
void print_test_info( test_info_t* info );
|
||||
void run_tests(test_fn* tests);
|
||||
|
||||
#endif // _TEST_FRAMEWORK_H_
|
||||
+23
@@ -0,0 +1,23 @@
|
||||
#include "test_heap.h"
|
||||
|
||||
//
|
||||
// test_heap
|
||||
void test_heap( test_info_t** info ){
|
||||
static test_info_t test_heap_info;
|
||||
static char* test_heap_name = "Heap Allocation";
|
||||
test_heap_info.name = test_heap_name;
|
||||
*(info) = &test_heap_info;
|
||||
|
||||
void* mem = NULL;
|
||||
size_t len = 0;
|
||||
// boost_mode_enable(true);
|
||||
do {
|
||||
len++;
|
||||
mem = (void*)malloc( len * sizeof(uint8_t));
|
||||
free(mem);
|
||||
} while (mem != NULL);
|
||||
// boost_mode_enable(false);
|
||||
|
||||
test_heap_info.metric = "largest allocated space";
|
||||
test_heap_info.value = len;
|
||||
}
|
||||
+8
@@ -0,0 +1,8 @@
|
||||
#ifndef _TEST_HEAP_H_
|
||||
#define _TEST_HEAP_H_
|
||||
|
||||
#include "tests.h"
|
||||
|
||||
void test_heap( test_info_t** info );
|
||||
|
||||
#endif // _TEST_HEAP_H_
|
||||
+58
@@ -0,0 +1,58 @@
|
||||
#include "test_stack.h"
|
||||
|
||||
|
||||
#define MEMORY_HEADSPACE 4096
|
||||
|
||||
// Globals
|
||||
uint32_t stack_pointer;
|
||||
uint32_t min_stack_pointer = 0xFFFFFFFF;
|
||||
uint32_t free_mem;
|
||||
uint32_t min_free_mem = 0xFFFFFFFF;
|
||||
bool go_deeper = true;
|
||||
uint32_t max_depth = 0;
|
||||
|
||||
extern unsigned char _sheap;
|
||||
uint32_t free_memory( void ){
|
||||
// Without an implementation of _sbrk (heap management) we are assuming
|
||||
// that the heap has zero size. If there was heap management then you
|
||||
// would compute the distance to the program break (the end of the heap)
|
||||
void* local;
|
||||
return (((uint32_t)&local) - ((uint32_t)&_sheap));
|
||||
}
|
||||
|
||||
void update_stack_info( void ){
|
||||
void* local;
|
||||
stack_pointer = (uint32_t)(&local);
|
||||
free_mem = free_memory();
|
||||
min_free_mem = (free_mem < min_free_mem) ? free_mem : min_free_mem;
|
||||
min_stack_pointer = (stack_pointer < min_stack_pointer) ? stack_pointer : min_stack_pointer;
|
||||
}
|
||||
|
||||
void deep_horizon( void ){
|
||||
update_stack_info();
|
||||
if(free_memory() < MEMORY_HEADSPACE){
|
||||
go_deeper = false;
|
||||
return;
|
||||
}
|
||||
if( go_deeper ){
|
||||
deep_horizon();
|
||||
}
|
||||
max_depth++;
|
||||
}
|
||||
|
||||
//
|
||||
// test_stack
|
||||
void test_stack( test_info_t** info ){
|
||||
static test_info_t test_stack_info;
|
||||
static char* test_stack_name = "Stack Allocation";
|
||||
test_stack_info.name = test_stack_name;
|
||||
*(info) = &test_stack_info;
|
||||
|
||||
go_deeper = true;
|
||||
min_free_mem = 0xFFFFFFFF;
|
||||
max_depth = 0;
|
||||
deep_horizon();
|
||||
|
||||
test_stack_info.metric = "recursion depth";
|
||||
test_stack_info.value = max_depth;
|
||||
}
|
||||
+8
@@ -0,0 +1,8 @@
|
||||
#ifndef _TEST_STACK_H_
|
||||
#define _TEST_STACK_H_
|
||||
|
||||
#include "tests.h"
|
||||
|
||||
void test_stack( test_info_t** info );
|
||||
|
||||
#endif // _TEST_STACK_H_
|
||||
+30
@@ -0,0 +1,30 @@
|
||||
#include "tests.h"
|
||||
|
||||
test_fn tests[] = {
|
||||
test_stack,
|
||||
test_heap,
|
||||
|
||||
// test_fail,
|
||||
// test_pass,
|
||||
|
||||
NULL, // NULL terminates the list
|
||||
};
|
||||
|
||||
// test definitions
|
||||
void test_fail( test_info_t** info ){
|
||||
static test_info_t test_fail_info;
|
||||
static char* test_fail_name = "Fail Test";
|
||||
test_fail_info.name = test_fail_name;
|
||||
test_fail_info.metric = "success";
|
||||
test_fail_info.value = 0;
|
||||
*(info) = &test_fail_info;
|
||||
}
|
||||
|
||||
void test_pass( test_info_t** info ){
|
||||
static test_info_t test_pass_info;
|
||||
static char* test_pass_name = "Pass Test";
|
||||
test_pass_info.name = test_pass_name;
|
||||
test_pass_info.metric = "success";
|
||||
test_pass_info.value = 1;
|
||||
*(info) = &test_pass_info;
|
||||
}
|
||||
+18
@@ -0,0 +1,18 @@
|
||||
// test definitions
|
||||
#ifndef _TESTS_H_
|
||||
#define _TESTS_H_
|
||||
|
||||
#include "test_framework.h"
|
||||
|
||||
// included tests
|
||||
#include "test_stack.h"
|
||||
#include "test_heap.h"
|
||||
|
||||
// simple tests
|
||||
void test_fail( test_info_t** info );
|
||||
void test_pass( test_info_t** info );
|
||||
|
||||
// list of tests to run
|
||||
extern test_fn tests[];
|
||||
|
||||
#endif // _TESTS_H_
|
||||
+405
@@ -0,0 +1,405 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# This is an example makefile for SparkFun Apollo3 boards as used in the
|
||||
# AmbiqSuite SDK.
|
||||
#
|
||||
# Recommended usage
|
||||
# make
|
||||
# make bootload_svl (uses the SparkFun Variable Loader to upload code)
|
||||
# make bootload_asb (uses the Ambiq Secure Bootlaoder to upload code)
|
||||
# make clean
|
||||
#
|
||||
# Filepaths
|
||||
# You can relocate this makefile easily by providing the path to the root of
|
||||
# the AmbiqSuite SDK. If that path is not specified then this file will
|
||||
# assume that it is located in
|
||||
# <AmbiqSDKRoot>/boards/<your_board>/examples/<your_example>/gcc
|
||||
# and use relative paths
|
||||
#
|
||||
# User Configuration
|
||||
# You must also specify which COM_PORT to use if you want to use the
|
||||
# 'bootlaoder' targets.
|
||||
# Windows example: COM_PORT=COM4
|
||||
# *nix example: COM_PORT=/dev/usbserialxxxx
|
||||
#
|
||||
# Python vs. Executable
|
||||
# For simplicity the upload tools are called as Python scripts by default.
|
||||
# Make sure PYTHON is set to the appropriate command to run Python3 from the
|
||||
# command line.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Options
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# You can override these values on the command line e.g. make bootload COM_PORT=/dev/cu***
|
||||
# COM_PORT is the serial port to use for uploading. For example COM#### on Windows or /dev/cu.usbserial-#### on *nix
|
||||
COM_PORT ?=
|
||||
# ASB_UPLOAD_BAUD is the baud rate setting of the Ambiq Secue Bootloader (ASB) as it is configured on the Apollo3. Defautls to 115200 if unset
|
||||
ASB_UPLOAD_BAUD ?=
|
||||
# SVL_UPLOAD_BAUD is the baud rate setting of the SparkFun Variable Loader (SVL). Defaults to 921600 if unset
|
||||
SVL_UPLOAD_BAUD ?=
|
||||
# PYTHON3 should evaluate to a call to the Python3 executable on your machine
|
||||
PYTHON3 ?=
|
||||
|
||||
# *Optionally* specify absolute paths to the SDK and the BSP
|
||||
# You can do this on the command line - e.g. make bootload SDKPATH=~/$AMBIQ_SDK_ROOT_PATH
|
||||
# Make sure to use / instead of \ when on Windows
|
||||
SDKPATH ?=# Set as the path to the SDK root if not located at ../../../../..
|
||||
COMMONPATH ?=# Set as the path to the BSP common folder if not located at ../../../../common
|
||||
BOARDPATH ?=# Set as the path to the board if not located at ../../..
|
||||
PROJECTPATH ?=# Set as the path to the project if not located at ..
|
||||
BOARD ?=# If using a SparkFun board you can simply provide the name e.g. redboard_artemis_atp
|
||||
|
||||
### Project Settings
|
||||
TARGET := lis2dh12_accelerometer_uart
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := $(TARGET)_gcc
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
ifeq ($(BOARD),)
|
||||
$(warning warning: no BOARD specified, will fall back to BOARDPATH for arbitrary bsp locations)
|
||||
else
|
||||
BOARDPATH=../../../../$(BOARD)
|
||||
$(warning Using BOARD=$(BOARD) at $(BOARDPATH))
|
||||
endif
|
||||
|
||||
ifeq ($(COM_PORT),)
|
||||
COM_PORT=COM4
|
||||
$(warning warning: you have not defined COM_PORT. Assuming it is COM4)
|
||||
endif
|
||||
ifeq ($(PYTHON3),)
|
||||
PYTHON3=python3
|
||||
$(warning warning: you have not defined PYTHON3. assuming it is accessible by 'python3')
|
||||
endif
|
||||
ifeq ($(ASB_UPLOAD_BAUD),)
|
||||
ASB_UPLOAD_BAUD=115200
|
||||
$(warning defaulting to 115200 baud for ASB)
|
||||
endif
|
||||
ifeq ($(SVL_UPLOAD_BAUD),)
|
||||
SVL_UPLOAD_BAUD=921600
|
||||
$(warning defaulting to 921600 baud for SVL)
|
||||
endif
|
||||
|
||||
ifeq ($(SDKPATH),)
|
||||
SDKPATH =../../../../..
|
||||
$(warning warning: you have not defined SDKPATH so will continue assuming that the SDK root is at $(SDKPATH))
|
||||
else
|
||||
# When the SDKPATH is given export it
|
||||
export SDKPATH
|
||||
endif
|
||||
|
||||
ifeq ($(COMMONPATH),)
|
||||
COMMONPATH =../../../../common
|
||||
$(warning warning: you have not defined COMMONPATH so will continue assuming that the COMMON root is at $(COMMONPATH))
|
||||
else
|
||||
# When the COMMONPATH is given export it
|
||||
export COMMONPATH
|
||||
endif
|
||||
|
||||
ifeq ($(BOARDPATH),)
|
||||
$(error Error: BOARDPATH must be provided)
|
||||
else
|
||||
# Ensure that boardpath does not include a trailing '/'
|
||||
ifeq ($(notdir $(BOARDPATH)),)
|
||||
override BOARDPATH:=$(patsubst %/, %,$(BOARDPATH))
|
||||
$(warning BOARDPATH had a trivial 'notdir' so we tried changing it to: $(BOARDPATH))
|
||||
endif
|
||||
BOARD=$(notdir $(BOARDPATH))
|
||||
# When the BOARDPATH is given export it
|
||||
export BOARDPATH
|
||||
endif
|
||||
|
||||
ifeq ($(PROJECTPATH),)
|
||||
PROJECTPATH =..
|
||||
$(warning warning: you have not defined PROJECTPATH so will continue assuming that the PROJECT root is at $(PROJECTPATH))
|
||||
else
|
||||
# When the PROJECTPATH is given export it
|
||||
export PROJECTPATH
|
||||
endif
|
||||
|
||||
CONFIG := $(PROJECTPATH)/gcc/$(BOARD)/bin
|
||||
$(warning CONFIG=$(CONFIG))
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Defines / Includes / Sources / Libraries
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Global Defines
|
||||
DEFINES= -DPART_$(PART)
|
||||
DEFINES+= -DAM_CUSTOM_BDADDR
|
||||
DEFINES+= -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -DAM_DEBUG_PRINTF
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
DEFINES+=
|
||||
|
||||
# Includes (Add paths to where example header files are located)
|
||||
INCLUDES=
|
||||
INCLUDES+= -I$(PROJECTPATH)/src
|
||||
INCLUDES+= -I$(BOARDPATH)/bsp
|
||||
INCLUDES+= -I$(SDKPATH)
|
||||
INCLUDES+= -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
INCLUDES+= -I$(COMMONPATH)/third_party/lis2dh12
|
||||
INCLUDES+=
|
||||
|
||||
# Compilation Units (Add all the .c files you need to compile)
|
||||
SRC=
|
||||
SRC+= main.c
|
||||
SRC+= startup_gcc.c
|
||||
SRC+= am_util_delay.c
|
||||
SRC+= am_util_faultisr.c
|
||||
SRC+= am_util_id.c
|
||||
SRC+= am_util_stdio.c
|
||||
SRC+= lis2dh12_reg.c
|
||||
SRC+= lis2dh12_platform_apollo3.c
|
||||
SRC+=
|
||||
|
||||
# VPATH (Add paths to where your source files are located)
|
||||
VPATH=
|
||||
VPATH+= $(PROJECTPATH)/src
|
||||
VPATH+= $(SDKPATH)/utils
|
||||
VPATH+= $(COMMONPATH)/examples/lis2dh12_accelerometer_uart
|
||||
VPATH+= $(COMMONPATH)/tools_sfe/templates
|
||||
VPATH+= $(COMMONPATH)/third_party/lis2dh12
|
||||
VPATH+=
|
||||
|
||||
# LIBS (Precompiled libraries to include in the linker step)
|
||||
LIBS=
|
||||
LIBS+= $(BOARDPATH)/bsp/gcc/bin/libam_bsp.a
|
||||
LIBS+= $(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a
|
||||
LIBS+=
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
### Bootloader Tools
|
||||
ASB_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/asb/asb.py
|
||||
SVL_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/svl/svl.py
|
||||
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
STARTUP_FILE := ./startup_$(COMPILERNAME).c
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
CXX = $(TOOLCHAIN)-g++
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC CXX
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Machinery
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
XSRC = $(filter %.cpp,$(SRC))
|
||||
ZSRC = $(filter %.cc,$(SRC))
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(XSRC:%.cpp=$(CONFIG)/%.o)
|
||||
OBJS+= $(ZSRC:%.cc=$(CONFIG)/%.o)
|
||||
OBJS+= $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(XSRC:%.cpp=$(CONFIG)/%.d)
|
||||
DEPS+= $(ZSRC:%.cc=$(CONFIG)/%.d)
|
||||
DEPS+= $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CSTD = -std=c99
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP $(CSTD) -Wall -g
|
||||
CFLAGS+= -O0
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
XSTD = -std=gnu++11
|
||||
|
||||
XFLAGS = $(CFLAGS)
|
||||
XFLAGS+= -fno-exceptions
|
||||
|
||||
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
LFLAGS+= -nostartfiles -static
|
||||
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
|
||||
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
|
||||
LFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
CPFLAGS = -Obinary
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Targets / Rules
|
||||
#
|
||||
#******************************************************************************
|
||||
all: asb
|
||||
asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.cpp $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.cc $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET)_asb.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_linker.ld
|
||||
$(CONFIG)/$(TARGET)_asb.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_svl.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_svl_linker.ld
|
||||
$(CONFIG)/$(TARGET)_svl.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_%.bin: $(CONFIG)/$(TARGET)_%.axf
|
||||
@echo " Copying $(COMPILERNAME) $@..." ;\
|
||||
$(CP) $(CPFLAGS) $< $@ ;\
|
||||
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
|
||||
|
||||
bootload_asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
$(ASB_UPLOADER) --bin $(CONFIG)/$(TARGET)_asb.bin --load-address-blob 0x20000 --magic-num 0xCB -o $(CONFIG)/$(TARGET) --version 0x0 --load-address-wired 0xC000 -i 6 --options 0x1 -b $(ASB_UPLOAD_BAUD) -port $(COM_PORT) -r 2 -v
|
||||
|
||||
bootload_svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
$(SVL_UPLOADER) $(COM_PORT) -f $(CONFIG)/$(TARGET)_svl.bin -b $(SVL_UPLOAD_BAUD) -v
|
||||
|
||||
bootload: bootload_svl
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
|
||||
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map \
|
||||
$(CONFIG)/$(TARGET)_svl.bin $(CONFIG)/$(TARGET)_svl.axf \
|
||||
$(CONFIG)/$(TARGET)_svl.lst $(CONFIG)/$(TARGET)_svl.map \
|
||||
$(CONFIG)/$(TARGET)_asb.bin $(CONFIG)/$(TARGET)_asb.axf \
|
||||
$(CONFIG)/$(TARGET)_asb.lst $(CONFIG)/$(TARGET)_asb.map
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
$(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a:
|
||||
$(MAKE) -C $(SDKPATH)/mcu/apollo3/hal/gcc
|
||||
|
||||
$(SDKPATH)/third_party/uecc/gcc/bin/lib_uecc.a:
|
||||
$(MAKE) -C $(SDKPATH)/third_party/uecc
|
||||
|
||||
$(BOARDPATH)/bsp/gcc/bin/libam_bsp.a:
|
||||
$(MAKE) -C $(BOARDPATH)/bsp/gcc
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories bootload bootload_asb bootload_svl
|
||||
+174
@@ -0,0 +1,174 @@
|
||||
/*
|
||||
Copyright (c) 2019 SparkFun Electronics
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in all
|
||||
copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
|
||||
#include "lis2dh12_platform_apollo3.h"
|
||||
|
||||
//
|
||||
// Defines
|
||||
#define LOOP_DELAY_MS 0
|
||||
|
||||
//
|
||||
// Function Declarations
|
||||
uint32_t initAccel( void );
|
||||
|
||||
//
|
||||
// Global Variables
|
||||
axis3bit16_t data_raw_acceleration;
|
||||
axis1bit16_t data_raw_temperature;
|
||||
float acceleration_mg[3];
|
||||
float temperature_degC;
|
||||
|
||||
lis2dh12_platform_apollo3_if_t dev_if = {
|
||||
.iomHandle = NULL, // Needs to be initialized later
|
||||
.addCS = AM_BSP_ACCELEROMETER_I2C_ADDRESS, // Gets the accelerometer I2C address for the board
|
||||
.useSPI = false, // Using I2C in this example
|
||||
};
|
||||
|
||||
lis2dh12_ctx_t dev_ctx = {
|
||||
.write_reg = lis2dh12_write_platform_apollo3, // write bytes function
|
||||
.read_reg = lis2dh12_read_platform_apollo3, // read bytes function
|
||||
.handle = (void*)&dev_if, // Apollo3-specific interface information
|
||||
};
|
||||
|
||||
int main( void ){
|
||||
|
||||
uint32_t stat = AM_HAL_STATUS_SUCCESS;
|
||||
|
||||
// Board-agnostic setup
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
|
||||
am_hal_cachectrl_enable();
|
||||
|
||||
// Board-specific setup
|
||||
am_bsp_low_power_init();
|
||||
am_bsp_uart_printf_enable();
|
||||
|
||||
// Clear UART terminal
|
||||
am_util_stdio_terminal_clear();
|
||||
|
||||
// Initialize accelerometer (uses board-specific code -- see function below)
|
||||
stat = initAccel();
|
||||
if( stat != 0 ){
|
||||
am_util_stdio_printf("Accelerometer initialization failed with code: %d\n", stat);
|
||||
}
|
||||
am_util_stdio_printf("Accelerometer initialization successful");
|
||||
|
||||
while(1){
|
||||
|
||||
|
||||
lis2dh12_reg_t reg;
|
||||
|
||||
// Check if accelerometer is ready with new temperature data
|
||||
lis2dh12_temp_data_ready_get(&dev_ctx, ®.byte);
|
||||
if (reg.byte) {
|
||||
/* Read temperature data */
|
||||
lis2dh12_temperature_raw_get(&dev_ctx, data_raw_temperature.u8bit);
|
||||
|
||||
/* Convert to celsius */
|
||||
temperature_degC = lis2dh12_from_lsb_hr_to_celsius(data_raw_temperature.i16bit);
|
||||
}
|
||||
|
||||
// Check if accelerometer is ready with new acceleration data
|
||||
lis2dh12_xl_data_ready_get(&dev_ctx, ®.byte);
|
||||
if (reg.byte){
|
||||
/* Read acceleration data */
|
||||
lis2dh12_acceleration_raw_get(&dev_ctx, data_raw_acceleration.u8bit);
|
||||
|
||||
/* convert to mg */
|
||||
acceleration_mg[0] = lis2dh12_from_fs2_hr_to_mg(data_raw_acceleration.i16bit[0]);
|
||||
acceleration_mg[1] = lis2dh12_from_fs2_hr_to_mg(data_raw_acceleration.i16bit[1]);
|
||||
acceleration_mg[2] = lis2dh12_from_fs2_hr_to_mg(data_raw_acceleration.i16bit[2]);
|
||||
|
||||
// Print results if acceleration data was ready
|
||||
am_util_stdio_printf("Acc [mg] %04.2f x, %04.2f y, %04.2f z, Temp [deg C] %04.2f,\r\n",
|
||||
acceleration_mg[0], acceleration_mg[1], acceleration_mg[2], temperature_degC);
|
||||
}
|
||||
|
||||
|
||||
|
||||
#ifdef LOOP_DELAY_MS
|
||||
#if LOOP_DELAY_MS
|
||||
am_util_delay_ms(LOOP_DELAY_MS);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
// Disable debug
|
||||
am_bsp_debug_printf_disable();
|
||||
|
||||
// Go to Deep Sleep.
|
||||
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
|
||||
}
|
||||
|
||||
uint32_t initAccel( void ){
|
||||
|
||||
uint32_t retVal32 = 0;
|
||||
static uint8_t whoamI = 0;
|
||||
|
||||
am_hal_iom_config_t i2cConfig = {
|
||||
.eInterfaceMode = AM_HAL_IOM_I2C_MODE,
|
||||
.ui32ClockFreq = AM_HAL_IOM_100KHZ,
|
||||
};
|
||||
|
||||
// Initialize the IOM.
|
||||
retVal32 = am_hal_iom_initialize(AM_BSP_ACCELEROMETER_I2C_IOM, &(dev_if.iomHandle)); // set the iomHandle of the device interface
|
||||
if(retVal32 != AM_HAL_STATUS_SUCCESS){ return retVal32; }
|
||||
|
||||
retVal32 = am_hal_iom_power_ctrl((dev_if.iomHandle), AM_HAL_SYSCTRL_WAKE, false);
|
||||
if(retVal32 != AM_HAL_STATUS_SUCCESS){ return retVal32; }
|
||||
|
||||
retVal32 = am_hal_iom_configure((dev_if.iomHandle), &i2cConfig);
|
||||
if(retVal32 != AM_HAL_STATUS_SUCCESS){ return retVal32; }
|
||||
|
||||
//
|
||||
// Configure the IOM pins.
|
||||
am_hal_gpio_pinconfig(AM_BSP_ACCELEROMETER_I2C_SDA_PIN, g_AM_BSP_ACCELEROMETER_I2C_SDA);
|
||||
am_hal_gpio_pinconfig(AM_BSP_ACCELEROMETER_I2C_SCL_PIN, g_AM_BSP_ACCELEROMETER_I2C_SCL);
|
||||
|
||||
//
|
||||
// Enable the IOM.
|
||||
//
|
||||
retVal32 = am_hal_iom_enable((dev_if.iomHandle));
|
||||
if(retVal32 != AM_HAL_STATUS_SUCCESS){ return retVal32; }
|
||||
|
||||
//
|
||||
// Apply accelerometer configuration
|
||||
lis2dh12_device_id_get(&dev_ctx, &whoamI);
|
||||
if (whoamI != LIS2DH12_ID){
|
||||
return AM_HAL_STATUS_FAIL;
|
||||
}
|
||||
|
||||
am_util_stdio_printf("Whoami (should be 0x33): 0x%2x\n", whoamI);
|
||||
|
||||
lis2dh12_block_data_update_set(&dev_ctx, PROPERTY_ENABLE);
|
||||
lis2dh12_temperature_meas_set(&dev_ctx, LIS2DH12_TEMP_ENABLE);
|
||||
lis2dh12_data_rate_set(&dev_ctx, LIS2DH12_ODR_25Hz);
|
||||
lis2dh12_full_scale_set(&dev_ctx, LIS2DH12_2g);
|
||||
lis2dh12_temperature_meas_set(&dev_ctx, LIS2DH12_TEMP_ENABLE);
|
||||
lis2dh12_operating_mode_set(&dev_ctx, LIS2DH12_HR_12bit);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1,24 @@
|
||||
Name:
|
||||
=====
|
||||
pdm_fft
|
||||
|
||||
|
||||
Description:
|
||||
============
|
||||
An example to show basic PDM operation.
|
||||
|
||||
|
||||
Purpose:
|
||||
========
|
||||
This example enables the PDM interface to record audio signals from an
|
||||
external microphone. The required pin connections are:
|
||||
|
||||
Printing takes place over the ITM at 1M Baud.
|
||||
|
||||
GPIO 10 - PDM DATA
|
||||
GPIO 11 - PDM CLK
|
||||
|
||||
|
||||
******************************************************************************
|
||||
|
||||
|
||||
@@ -0,0 +1,403 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# This is an example makefile for SparkFun Apollo3 boards as used in the
|
||||
# AmbiqSuite SDK.
|
||||
#
|
||||
# Recommended usage
|
||||
# make
|
||||
# make bootload_svl (uses the SparkFun Variable Loader to upload code)
|
||||
# make bootload_asb (uses the Ambiq Secure Bootlaoder to upload code)
|
||||
# make clean
|
||||
#
|
||||
# Filepaths
|
||||
# You can relocate this makefile easily by providing the path to the root of
|
||||
# the AmbiqSuite SDK. If that path is not specified then this file will
|
||||
# assume that it is located in
|
||||
# <AmbiqSDKRoot>/boards/<your_board>/examples/<your_example>/gcc
|
||||
# and use relative paths
|
||||
#
|
||||
# User Configuration
|
||||
# You must also specify which COM_PORT to use if you want to use the
|
||||
# 'bootlaoder' targets.
|
||||
# Windows example: COM_PORT=COM4
|
||||
# *nix example: COM_PORT=/dev/usbserialxxxx
|
||||
#
|
||||
# Python vs. Executable
|
||||
# For simplicity the upload tools are called as Python scripts by default.
|
||||
# Make sure PYTHON is set to the appropriate command to run Python3 from the
|
||||
# command line.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Options
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# You can override these values on the command line e.g. make bootload COM_PORT=/dev/cu***
|
||||
# COM_PORT is the serial port to use for uploading. For example COM#### on Windows or /dev/cu.usbserial-#### on *nix
|
||||
COM_PORT ?=
|
||||
# ASB_UPLOAD_BAUD is the baud rate setting of the Ambiq Secue Bootloader (ASB) as it is configured on the Apollo3. Defautls to 115200 if unset
|
||||
ASB_UPLOAD_BAUD ?=
|
||||
# SVL_UPLOAD_BAUD is the baud rate setting of the SparkFun Variable Loader (SVL). Defaults to 921600 if unset
|
||||
SVL_UPLOAD_BAUD ?=
|
||||
# PYTHON3 should evaluate to a call to the Python3 executable on your machine
|
||||
PYTHON3 ?=
|
||||
|
||||
# *Optionally* specify absolute paths to the SDK and the BSP
|
||||
# You can do this on the command line - e.g. make bootload SDKPATH=~/$AMBIQ_SDK_ROOT_PATH
|
||||
# Make sure to use / instead of \ when on Windows
|
||||
SDKPATH ?=# Set as the path to the SDK root if not located at ../../../../..
|
||||
COMMONPATH ?=# Set as the path to the BSP common folder if not located at ../../../../common
|
||||
BOARDPATH ?=# Set as the path to the board if not located at ../../..
|
||||
PROJECTPATH ?=# Set as the path to the project if not located at ..
|
||||
BOARD ?=# If using a SparkFun board you can simply provide the name e.g. redboard_artemis_atp
|
||||
|
||||
### Project Settings
|
||||
TARGET := pdm_fft
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := pdm_fft_gcc
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
ifeq ($(BOARD),)
|
||||
$(warning warning: no BOARD specified, will fall back to BOARDPATH for arbitrary bsp locations)
|
||||
else
|
||||
BOARDPATH=../../../../$(BOARD)
|
||||
$(warning Using BOARD=$(BOARD) at $(BOARDPATH))
|
||||
endif
|
||||
|
||||
ifeq ($(COM_PORT),)
|
||||
COM_PORT=COM4
|
||||
$(warning warning: you have not defined COM_PORT. Assuming it is COM4)
|
||||
endif
|
||||
ifeq ($(PYTHON3),)
|
||||
PYTHON3=python3
|
||||
$(warning warning: you have not defined PYTHON3. assuming it is accessible by 'python3')
|
||||
endif
|
||||
ifeq ($(ASB_UPLOAD_BAUD),)
|
||||
ASB_UPLOAD_BAUD=115200
|
||||
$(warning defaulting to 115200 baud for ASB)
|
||||
endif
|
||||
ifeq ($(SVL_UPLOAD_BAUD),)
|
||||
SVL_UPLOAD_BAUD=921600
|
||||
$(warning defaulting to 921600 baud for SVL)
|
||||
endif
|
||||
|
||||
ifeq ($(SDKPATH),)
|
||||
SDKPATH =../../../../..
|
||||
$(warning warning: you have not defined SDKPATH so will continue assuming that the SDK root is at $(SDKPATH))
|
||||
else
|
||||
# When the SDKPATH is given export it
|
||||
export SDKPATH
|
||||
endif
|
||||
|
||||
ifeq ($(COMMONPATH),)
|
||||
COMMONPATH =../../../../common
|
||||
$(warning warning: you have not defined COMMONPATH so will continue assuming that the COMMON root is at $(COMMONPATH))
|
||||
else
|
||||
# When the COMMONPATH is given export it
|
||||
export COMMONPATH
|
||||
endif
|
||||
|
||||
ifeq ($(BOARDPATH),)
|
||||
$(error Error: BOARDPATH must be provided)
|
||||
else
|
||||
# Ensure that boardpath does not include a trailing '/'
|
||||
ifeq ($(notdir $(BOARDPATH)),)
|
||||
override BOARDPATH:=$(patsubst %/, %,$(BOARDPATH))
|
||||
$(warning BOARDPATH had a trivial 'notdir' so we tried changing it to: $(BOARDPATH))
|
||||
endif
|
||||
BOARD=$(notdir $(BOARDPATH))
|
||||
# When the BOARDPATH is given export it
|
||||
export BOARDPATH
|
||||
endif
|
||||
|
||||
ifeq ($(PROJECTPATH),)
|
||||
PROJECTPATH =..
|
||||
$(warning warning: you have not defined PROJECTPATH so will continue assuming that the PROJECT root is at $(PROJECTPATH))
|
||||
else
|
||||
# When the PROJECTPATH is given export it
|
||||
export PROJECTPATH
|
||||
endif
|
||||
|
||||
CONFIG := $(PROJECTPATH)/gcc/$(BOARD)/bin
|
||||
$(warning CONFIG=$(CONFIG))
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Defines / Includes / Sources / Libraries
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Global Defines
|
||||
DEFINES= -DPART_$(PART)
|
||||
DEFINES+= -DAM_CUSTOM_BDADDR
|
||||
DEFINES+= -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -DAM_DEBUG_PRINTF
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
DEFINES+= -DAM_UTIL_FAULTISR_PRINT
|
||||
DEFINES+= -DUNITY_INCLUDE_CONFIG_H
|
||||
DEFINES+= -D__FPU_PRESENT
|
||||
DEFINES+=
|
||||
|
||||
# Includes (Add paths to where example header files are located)
|
||||
INCLUDES=
|
||||
INCLUDES+= -I$(PROJECTPATH)/src
|
||||
INCLUDES+= -I$(BOARDPATH)/bsp
|
||||
INCLUDES+= -I$(SDKPATH)
|
||||
INCLUDES+= -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
INCLUDES+=
|
||||
|
||||
# Compilation Units (Add all the .c files you need to compile)
|
||||
SRC=
|
||||
SRC+= main.c
|
||||
SRC+= startup_gcc.c
|
||||
SRC+= am_util_delay.c
|
||||
SRC+= am_util_faultisr.c
|
||||
SRC+= am_util_stdio.c
|
||||
SRC+=
|
||||
|
||||
# VPATH (Add paths to where your source files are located)
|
||||
VPATH=
|
||||
VPATH+= $(PROJECTPATH)/src
|
||||
VPATH+= $(SDKPATH)/utils
|
||||
VPATH+= $(COMMONPATH)/examples/pdm_fft
|
||||
VPATH+= $(COMMONPATH)/tools_sfe/templates
|
||||
VPATH+=
|
||||
|
||||
# LIBS (Precompiled libraries to include in the linker step)
|
||||
LIBS=
|
||||
LIBS+= $(BOARDPATH)/bsp/gcc/bin/libam_bsp.a
|
||||
LIBS+= $(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a
|
||||
LIBS+= $(SDKPATH)/CMSIS/ARM/Lib/ARM/libarm_cortexM4lf_math.a
|
||||
LIBS+=
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
### Bootloader Tools
|
||||
ASB_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/asb/asb.py
|
||||
SVL_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/svl/svl.py
|
||||
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
STARTUP_FILE := ./startup_$(COMPILERNAME).c
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
CXX = $(TOOLCHAIN)-g++
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC CXX
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Machinery
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
XSRC = $(filter %.cpp,$(SRC))
|
||||
ZSRC = $(filter %.cc,$(SRC))
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(XSRC:%.cpp=$(CONFIG)/%.o)
|
||||
OBJS+= $(ZSRC:%.cc=$(CONFIG)/%.o)
|
||||
OBJS+= $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(XSRC:%.cpp=$(CONFIG)/%.d)
|
||||
DEPS+= $(ZSRC:%.cc=$(CONFIG)/%.d)
|
||||
DEPS+= $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CSTD = -std=c99
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP $(CSTD) -Wall -g
|
||||
CFLAGS+= -O0
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
XSTD = -std=gnu++11
|
||||
|
||||
XFLAGS = $(CFLAGS)
|
||||
XFLAGS+= -fno-exceptions
|
||||
|
||||
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
LFLAGS+= -nostartfiles -static
|
||||
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
|
||||
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
|
||||
LFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
CPFLAGS = -Obinary
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Targets / Rules
|
||||
#
|
||||
#******************************************************************************
|
||||
all: asb
|
||||
asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.cpp $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.cc $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET)_asb.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_linker.ld
|
||||
$(CONFIG)/$(TARGET)_asb.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_svl.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_svl_linker.ld
|
||||
$(CONFIG)/$(TARGET)_svl.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_%.bin: $(CONFIG)/$(TARGET)_%.axf
|
||||
@echo " Copying $(COMPILERNAME) $@..." ;\
|
||||
$(CP) $(CPFLAGS) $< $@ ;\
|
||||
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
|
||||
|
||||
bootload_asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
$(ASB_UPLOADER) --bin $(CONFIG)/$(TARGET)_asb.bin --load-address-blob 0x20000 --magic-num 0xCB -o $(CONFIG)/$(TARGET) --version 0x0 --load-address-wired 0xC000 -i 6 --options 0x1 -b $(ASB_UPLOAD_BAUD) -port $(COM_PORT) -r 2 -v
|
||||
|
||||
bootload_svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
$(SVL_UPLOADER) $(COM_PORT) -f $(CONFIG)/$(TARGET)_svl.bin -b $(SVL_UPLOAD_BAUD) -v
|
||||
|
||||
bootload: bootload_svl
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
|
||||
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map \
|
||||
$(CONFIG)/$(TARGET)_svl.bin $(CONFIG)/$(TARGET)_svl.axf \
|
||||
$(CONFIG)/$(TARGET)_svl.lst $(CONFIG)/$(TARGET)_svl.map \
|
||||
$(CONFIG)/$(TARGET)_asb.bin $(CONFIG)/$(TARGET)_asb.axf \
|
||||
$(CONFIG)/$(TARGET)_asb.lst $(CONFIG)/$(TARGET)_asb.map
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
$(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a:
|
||||
$(MAKE) -C $(SDKPATH)/mcu/apollo3/hal/gcc
|
||||
|
||||
$(SDKPATH)/third_party/uecc/gcc/bin/lib_uecc.a:
|
||||
$(MAKE) -C $(SDKPATH)/third_party/uecc
|
||||
|
||||
$(BOARDPATH)/bsp/gcc/bin/libam_bsp.a:
|
||||
$(MAKE) -C $(BOARDPATH)/bsp/gcc
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories bootload bootload_asb bootload_svl
|
||||
@@ -0,0 +1,389 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file pdm_fft.c
|
||||
//!
|
||||
//! @brief An example to show basic PDM operation.
|
||||
//!
|
||||
//! Purpose: This example enables the PDM interface to record audio signals from an
|
||||
//! external microphone. The required pin connections are:
|
||||
//!
|
||||
//! Printing takes place over the ITM at 1M Baud.
|
||||
//!
|
||||
//! GPIO 10 - PDM DATA
|
||||
//! GPIO 11 - PDM CLK
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2019, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision v2.2.0-7-g63f7c2ba1 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#define ARM_MATH_CM4
|
||||
#include <arm_math.h>
|
||||
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Example parameters.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define PDM_FFT_SIZE 4096
|
||||
#define PDM_FFT_BYTES (PDM_FFT_SIZE * 2)
|
||||
#define PRINT_PDM_DATA 0
|
||||
#define PRINT_FFT_DATA 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Global variables.
|
||||
//
|
||||
//*****************************************************************************
|
||||
volatile bool g_bPDMDataReady = false;
|
||||
uint32_t g_ui32PDMDataBuffer[PDM_FFT_SIZE];
|
||||
float g_fPDMTimeDomain[PDM_FFT_SIZE * 2];
|
||||
float g_fPDMFrequencyDomain[PDM_FFT_SIZE * 2];
|
||||
float g_fPDMMagnitudes[PDM_FFT_SIZE * 2];
|
||||
uint32_t g_ui32SampleFreq;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// PDM configuration information.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void *PDMHandle;
|
||||
|
||||
am_hal_pdm_config_t g_sPdmConfig =
|
||||
{
|
||||
.eClkDivider = AM_HAL_PDM_MCLKDIV_1,
|
||||
.eLeftGain = AM_HAL_PDM_GAIN_0DB,
|
||||
.eRightGain = AM_HAL_PDM_GAIN_0DB,
|
||||
.ui32DecimationRate = 64,
|
||||
.bHighPassEnable = 0,
|
||||
.ui32HighPassCutoff = 0xB,
|
||||
.ePDMClkSpeed = AM_HAL_PDM_CLK_6MHZ,
|
||||
.bInvertI2SBCLK = 0,
|
||||
.ePDMClkSource = AM_HAL_PDM_INTERNAL_CLK,
|
||||
.bPDMSampleDelay = 0,
|
||||
.bDataPacking = 1,
|
||||
.ePCMChannels = AM_BSP_PDM_CHANNEL,
|
||||
.ui32GainChangeDelay = 1,
|
||||
.bI2SEnable = 0,
|
||||
.bSoftMute = 0,
|
||||
.bLRSwap = 0,
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// PDM initialization.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
pdm_init(void)
|
||||
{
|
||||
//
|
||||
// Initialize, power-up, and configure the PDM.
|
||||
//
|
||||
am_hal_pdm_initialize(0, &PDMHandle);
|
||||
am_hal_pdm_power_control(PDMHandle, AM_HAL_PDM_POWER_ON, false);
|
||||
am_hal_pdm_configure(PDMHandle, &g_sPdmConfig);
|
||||
am_hal_pdm_enable(PDMHandle);
|
||||
|
||||
//
|
||||
// Configure the necessary pins.
|
||||
//
|
||||
am_hal_gpio_pinconfig(AM_BSP_PDM_DATA_PIN, g_AM_BSP_PDM_DATA);
|
||||
am_hal_gpio_pinconfig(AM_BSP_PDM_CLOCK_PIN, g_AM_BSP_PDM_CLOCK);
|
||||
|
||||
//
|
||||
// Configure and enable PDM interrupts (set up to trigger on DMA
|
||||
// completion).
|
||||
//
|
||||
am_hal_pdm_interrupt_enable(PDMHandle, (AM_HAL_PDM_INT_DERR
|
||||
| AM_HAL_PDM_INT_DCMP
|
||||
| AM_HAL_PDM_INT_UNDFL
|
||||
| AM_HAL_PDM_INT_OVF));
|
||||
|
||||
NVIC_EnableIRQ(PDM_IRQn);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Print PDM configuration data.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
pdm_config_print(void)
|
||||
{
|
||||
uint32_t ui32PDMClk;
|
||||
uint32_t ui32MClkDiv;
|
||||
float fFrequencyUnits;
|
||||
|
||||
//
|
||||
// Read the config structure to figure out what our internal clock is set
|
||||
// to.
|
||||
//
|
||||
switch (g_sPdmConfig.eClkDivider)
|
||||
{
|
||||
case AM_HAL_PDM_MCLKDIV_4: ui32MClkDiv = 4; break;
|
||||
case AM_HAL_PDM_MCLKDIV_3: ui32MClkDiv = 3; break;
|
||||
case AM_HAL_PDM_MCLKDIV_2: ui32MClkDiv = 2; break;
|
||||
case AM_HAL_PDM_MCLKDIV_1: ui32MClkDiv = 1; break;
|
||||
|
||||
default:
|
||||
ui32MClkDiv = 0;
|
||||
}
|
||||
|
||||
switch (g_sPdmConfig.ePDMClkSpeed)
|
||||
{
|
||||
case AM_HAL_PDM_CLK_12MHZ: ui32PDMClk = 12000000; break;
|
||||
case AM_HAL_PDM_CLK_6MHZ: ui32PDMClk = 6000000; break;
|
||||
case AM_HAL_PDM_CLK_3MHZ: ui32PDMClk = 3000000; break;
|
||||
case AM_HAL_PDM_CLK_1_5MHZ: ui32PDMClk = 1500000; break;
|
||||
case AM_HAL_PDM_CLK_750KHZ: ui32PDMClk = 750000; break;
|
||||
case AM_HAL_PDM_CLK_375KHZ: ui32PDMClk = 375000; break;
|
||||
case AM_HAL_PDM_CLK_187KHZ: ui32PDMClk = 187000; break;
|
||||
|
||||
default:
|
||||
ui32PDMClk = 0;
|
||||
}
|
||||
|
||||
//
|
||||
// Record the effective sample frequency. We'll need it later to print the
|
||||
// loudest frequency from the sample.
|
||||
//
|
||||
g_ui32SampleFreq = (ui32PDMClk /
|
||||
(ui32MClkDiv * 2 * g_sPdmConfig.ui32DecimationRate));
|
||||
|
||||
fFrequencyUnits = (float) g_ui32SampleFreq / (float) PDM_FFT_SIZE;
|
||||
|
||||
am_util_stdio_printf("Settings:\n");
|
||||
am_util_stdio_printf("PDM Clock (Hz): %12d\n", ui32PDMClk);
|
||||
am_util_stdio_printf("Decimation Rate: %12d\n", g_sPdmConfig.ui32DecimationRate);
|
||||
am_util_stdio_printf("Effective Sample Freq.: %12d\n", g_ui32SampleFreq);
|
||||
am_util_stdio_printf("FFT Length: %12d\n\n", PDM_FFT_SIZE);
|
||||
am_util_stdio_printf("FFT Resolution: %15.3f Hz\n", fFrequencyUnits);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Start a transaction to get some number of bytes from the PDM interface.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
pdm_data_get(void)
|
||||
{
|
||||
//
|
||||
// Configure DMA and target address.
|
||||
//
|
||||
am_hal_pdm_transfer_t sTransfer;
|
||||
sTransfer.ui32TargetAddr = (uint32_t ) g_ui32PDMDataBuffer;
|
||||
sTransfer.ui32TotalCount = PDM_FFT_BYTES;
|
||||
|
||||
//
|
||||
// Start the data transfer.
|
||||
//
|
||||
am_hal_pdm_enable(PDMHandle);
|
||||
am_util_delay_ms(100);
|
||||
am_hal_pdm_fifo_flush(PDMHandle);
|
||||
am_hal_pdm_dma_start(PDMHandle, &sTransfer);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// PDM interrupt handler.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
am_pdm0_isr(void)
|
||||
{
|
||||
uint32_t ui32Status;
|
||||
|
||||
//
|
||||
// Read the interrupt status.
|
||||
//
|
||||
am_hal_pdm_interrupt_status_get(PDMHandle, &ui32Status, true);
|
||||
am_hal_pdm_interrupt_clear(PDMHandle, ui32Status);
|
||||
|
||||
//
|
||||
// Once our DMA transaction completes, we will disable the PDM and send a
|
||||
// flag back down to the main routine. Disabling the PDM is only necessary
|
||||
// because this example only implemented a single buffer for storing FFT
|
||||
// data. More complex programs could use a system of multiple buffers to
|
||||
// allow the CPU to run the FFT in one buffer while the DMA pulls PCM data
|
||||
// into another buffer.
|
||||
//
|
||||
if (ui32Status & AM_HAL_PDM_INT_DCMP)
|
||||
{
|
||||
am_hal_pdm_disable(PDMHandle);
|
||||
g_bPDMDataReady = true;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Analyze and print frequency data.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
pcm_fft_print(void)
|
||||
{
|
||||
float fMaxValue;
|
||||
uint32_t ui32MaxIndex;
|
||||
int16_t *pi16PDMData = (int16_t *) g_ui32PDMDataBuffer;
|
||||
uint32_t ui32LoudestFrequency;
|
||||
|
||||
//
|
||||
// Convert the PDM samples to floats, and arrange them in the format
|
||||
// required by the FFT function.
|
||||
//
|
||||
for (uint32_t i = 0; i < PDM_FFT_SIZE; i++)
|
||||
{
|
||||
if (PRINT_PDM_DATA)
|
||||
{
|
||||
am_util_stdio_printf("%d\n", pi16PDMData[i]);
|
||||
}
|
||||
|
||||
g_fPDMTimeDomain[2 * i] = pi16PDMData[i] / 1.0;
|
||||
g_fPDMTimeDomain[2 * i + 1] = 0.0;
|
||||
}
|
||||
|
||||
if (PRINT_PDM_DATA)
|
||||
{
|
||||
am_util_stdio_printf("END\n");
|
||||
}
|
||||
|
||||
//
|
||||
// Perform the FFT.
|
||||
//
|
||||
arm_cfft_radix4_instance_f32 S;
|
||||
arm_cfft_radix4_init_f32(&S, PDM_FFT_SIZE, 0, 1);
|
||||
arm_cfft_radix4_f32(&S, g_fPDMTimeDomain);
|
||||
arm_cmplx_mag_f32(g_fPDMTimeDomain, g_fPDMMagnitudes, PDM_FFT_SIZE);
|
||||
|
||||
if (PRINT_FFT_DATA)
|
||||
{
|
||||
for (uint32_t i = 0; i < PDM_FFT_SIZE / 2; i++)
|
||||
{
|
||||
am_util_stdio_printf("%f\n", g_fPDMMagnitudes[i]);
|
||||
}
|
||||
|
||||
am_util_stdio_printf("END\n");
|
||||
}
|
||||
|
||||
//
|
||||
// Find the frequency bin with the largest magnitude.
|
||||
//
|
||||
arm_max_f32(g_fPDMMagnitudes, PDM_FFT_SIZE / 2, &fMaxValue, &ui32MaxIndex);
|
||||
|
||||
ui32LoudestFrequency = (g_ui32SampleFreq * ui32MaxIndex) / PDM_FFT_SIZE;
|
||||
|
||||
if (PRINT_FFT_DATA)
|
||||
{
|
||||
am_util_stdio_printf("Loudest frequency bin: %d\n", ui32MaxIndex);
|
||||
}
|
||||
|
||||
am_util_stdio_printf("Loudest frequency: %d \n", ui32LoudestFrequency);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Main
|
||||
//
|
||||
//*****************************************************************************
|
||||
int
|
||||
main(void)
|
||||
{
|
||||
//
|
||||
// Perform the standard initialzation for clocks, cache settings, and
|
||||
// board-level low-power operation.
|
||||
//
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
|
||||
am_hal_cachectrl_enable();
|
||||
//am_bsp_low_power_init();
|
||||
|
||||
//
|
||||
// Initialize the printf interface for UART output
|
||||
//
|
||||
am_bsp_uart_printf_enable();
|
||||
|
||||
//
|
||||
// Print the banner.
|
||||
//
|
||||
am_util_stdio_terminal_clear();
|
||||
am_util_stdio_printf("PDM FFT example.\n\n");
|
||||
|
||||
//
|
||||
// Turn on the PDM, set it up for our chosen recording settings, and start
|
||||
// the first DMA transaction.
|
||||
//
|
||||
pdm_init();
|
||||
pdm_config_print();
|
||||
am_hal_pdm_fifo_flush(PDMHandle);
|
||||
pdm_data_get();
|
||||
|
||||
//
|
||||
// Loop forever while sleeping.
|
||||
//
|
||||
while (1)
|
||||
{
|
||||
am_hal_interrupt_master_disable();
|
||||
|
||||
if (g_bPDMDataReady)
|
||||
{
|
||||
g_bPDMDataReady = false;
|
||||
|
||||
pcm_fft_print();
|
||||
|
||||
while (PRINT_PDM_DATA || PRINT_FFT_DATA);
|
||||
|
||||
//
|
||||
// Start converting the next set of PCM samples.
|
||||
//
|
||||
pdm_data_get();
|
||||
}
|
||||
|
||||
//
|
||||
// Go to Deep Sleep.
|
||||
//
|
||||
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
|
||||
|
||||
am_hal_interrupt_master_enable();
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,439 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# This is an example makefile for SparkFun Apollo3 boards as used in the
|
||||
# AmbiqSuite SDK.
|
||||
#
|
||||
# Recommended usage
|
||||
# make
|
||||
# make bootload_svl (uses the SparkFun Variable Loader to upload code)
|
||||
# make bootload_asb (uses the Ambiq Secure Bootlaoder to upload code)
|
||||
# make clean
|
||||
#
|
||||
# Filepaths
|
||||
# You can relocate this makefile easily by providing the path to the root of
|
||||
# the AmbiqSuite SDK. If that path is not specified then this file will
|
||||
# assume that it is located in
|
||||
# <AmbiqSDKRoot>/boards/<your_board>/examples/<your_example>/gcc
|
||||
# and use relative paths
|
||||
#
|
||||
# User Configuration
|
||||
# You must also specify which COM_PORT to use if you want to use the
|
||||
# 'bootlaoder' targets.
|
||||
# Windows example: COM_PORT=COM4
|
||||
# *nix example: COM_PORT=/dev/usbserialxxxx
|
||||
#
|
||||
# Python vs. Executable
|
||||
# For simplicity the upload tools are called as Python scripts by default.
|
||||
# Make sure PYTHON is set to the appropriate command to run Python3 from the
|
||||
# command line.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Options
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# You can override these values on the command line e.g. make bootload COM_PORT=/dev/cu***
|
||||
# COM_PORT is the serial port to use for uploading. For example COM#### on Windows or /dev/cu.usbserial-#### on *nix
|
||||
COM_PORT ?=
|
||||
# ASB_UPLOAD_BAUD is the baud rate setting of the Ambiq Secue Bootloader (ASB) as it is configured on the Apollo3. Defautls to 115200 if unset
|
||||
ASB_UPLOAD_BAUD ?=
|
||||
# SVL_UPLOAD_BAUD is the baud rate setting of the SparkFun Variable Loader (SVL). Defaults to 921600 if unset
|
||||
SVL_UPLOAD_BAUD ?=
|
||||
# PYTHON3 should evaluate to a call to the Python3 executable on your machine
|
||||
PYTHON3 ?=
|
||||
|
||||
# *Optionally* specify absolute paths to the SDK and the BSP
|
||||
# You can do this on the command line - e.g. make bootload SDKPATH=~/$AMBIQ_SDK_ROOT_PATH
|
||||
# Make sure to use / instead of \ when on Windows
|
||||
SDKPATH ?=# Set as the path to the SDK root if not located at ../../../../..
|
||||
COMMONPATH ?=# Set as the path to the BSP common folder if not located at ../../../../common
|
||||
BOARDPATH ?=# Set as the path to the board if not located at ../../..
|
||||
PROJECTPATH ?=# Set as the path to the project if not located at ..
|
||||
BOARD ?=# If using a SparkFun board you can simply provide the name e.g. redboard_artemis_atp
|
||||
|
||||
### Project Settings
|
||||
TARGET := spi
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := spi_gcc
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
ifeq ($(BOARD),)
|
||||
$(warning warning: no BOARD specified, will fall back to BOARDPATH for arbitrary bsp locations)
|
||||
else
|
||||
BOARDPATH=../../../../$(BOARD)
|
||||
$(warning Using BOARD=$(BOARD) at $(BOARDPATH))
|
||||
endif
|
||||
|
||||
ifeq ($(COM_PORT),)
|
||||
COM_PORT=COM4
|
||||
$(warning warning: you have not defined COM_PORT. Assuming it is COM4)
|
||||
endif
|
||||
ifeq ($(PYTHON3),)
|
||||
PYTHON3=python3
|
||||
$(warning warning: you have not defined PYTHON3. assuming it is accessible by 'python3')
|
||||
endif
|
||||
ifeq ($(ASB_UPLOAD_BAUD),)
|
||||
ASB_UPLOAD_BAUD=115200
|
||||
$(warning defaulting to 115200 baud for ASB)
|
||||
endif
|
||||
ifeq ($(SVL_UPLOAD_BAUD),)
|
||||
SVL_UPLOAD_BAUD=921600
|
||||
$(warning defaulting to 921600 baud for SVL)
|
||||
endif
|
||||
|
||||
ifeq ($(SDKPATH),)
|
||||
SDKPATH =../../../../..
|
||||
$(warning warning: you have not defined SDKPATH so will continue assuming that the SDK root is at $(SDKPATH))
|
||||
else
|
||||
# When the SDKPATH is given export it
|
||||
export SDKPATH
|
||||
endif
|
||||
|
||||
ifeq ($(COMMONPATH),)
|
||||
COMMONPATH =../../../../common
|
||||
$(warning warning: you have not defined COMMONPATH so will continue assuming that the COMMON root is at $(COMMONPATH))
|
||||
else
|
||||
# When the COMMONPATH is given export it
|
||||
export COMMONPATH
|
||||
endif
|
||||
|
||||
ifeq ($(BOARDPATH),)
|
||||
$(error Error: BOARDPATH must be provided)
|
||||
else
|
||||
# Ensure that boardpath does not include a trailing '/'
|
||||
ifeq ($(notdir $(BOARDPATH)),)
|
||||
override BOARDPATH:=$(patsubst %/, %,$(BOARDPATH))
|
||||
$(warning BOARDPATH had a trivial 'notdir' so we tried changing it to: $(BOARDPATH))
|
||||
endif
|
||||
BOARD=$(notdir $(BOARDPATH))
|
||||
# When the BOARDPATH is given export it
|
||||
export BOARDPATH
|
||||
endif
|
||||
|
||||
ifeq ($(PROJECTPATH),)
|
||||
PROJECTPATH =..
|
||||
$(warning warning: you have not defined PROJECTPATH so will continue assuming that the PROJECT root is at $(PROJECTPATH))
|
||||
else
|
||||
# When the PROJECTPATH is given export it
|
||||
export PROJECTPATH
|
||||
endif
|
||||
|
||||
CONFIG := $(PROJECTPATH)/gcc/$(BOARD)/bin
|
||||
$(warning CONFIG=$(CONFIG))
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Defines / Includes / Sources / Libraries
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Global Defines
|
||||
DEFINES= -DPART_$(PART)
|
||||
DEFINES+= -DAM_CUSTOM_BDADDR
|
||||
DEFINES+= -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -DAM_DEBUG_PRINTF
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
DEFINES+= -DAM_UTIL_FAULTISR_PRINT
|
||||
DEFINES+= -DUNITY_INCLUDE_CONFIG_H
|
||||
DEFINES+= -D__FPU_PRESENT
|
||||
DEFINES+=
|
||||
|
||||
# Includes (Add paths to where example header files are located)
|
||||
INCLUDES=
|
||||
INCLUDES+= -I$(PROJECTPATH)/src
|
||||
INCLUDES+= -I$(BOARDPATH)/bsp
|
||||
INCLUDES+= -I$(SDKPATH)
|
||||
INCLUDES+= -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
INCLUDES+=
|
||||
|
||||
# Compilation Units (Add all the .c files you need to compile)
|
||||
SRC=
|
||||
SRC+= main.c
|
||||
SRC+= startup_gcc.c
|
||||
SRC+= am_util_delay.c
|
||||
SRC+= am_util_faultisr.c
|
||||
SRC+= am_util_stdio.c
|
||||
|
||||
SRC+= am_hal_ble_patch.c
|
||||
SRC+= am_hal_ble.c
|
||||
SRC+= am_hal_ble_patch_b0.c
|
||||
SRC+= am_hal_burst.c
|
||||
SRC+= am_hal_cachectrl.c
|
||||
SRC+= am_hal_adc.c
|
||||
SRC+= am_hal_clkgen.c
|
||||
SRC+= am_hal_cmdq.c
|
||||
SRC+= am_hal_ctimer.c
|
||||
SRC+= am_hal_debug.c
|
||||
SRC+= am_hal_flash.c
|
||||
SRC+= am_hal_global.c
|
||||
SRC+= am_hal_gpio.c
|
||||
SRC+= am_hal_interrupt.c
|
||||
SRC+= am_hal_iom.c
|
||||
SRC+= am_hal_ios.c
|
||||
SRC+= am_hal_itm.c
|
||||
SRC+= am_hal_mcuctrl.c
|
||||
SRC+= am_hal_mspi.c
|
||||
SRC+= am_hal_pdm.c
|
||||
SRC+= am_hal_pwrctrl.c
|
||||
SRC+= am_hal_queue.c
|
||||
SRC+= am_hal_reset.c
|
||||
SRC+= am_hal_rtc.c
|
||||
SRC+= am_hal_scard.c
|
||||
SRC+= am_hal_secure_ota.c
|
||||
SRC+= am_hal_security.c
|
||||
SRC+= am_hal_stimer.c
|
||||
SRC+= am_hal_sysctrl.c
|
||||
SRC+= am_hal_systick.c
|
||||
SRC+= am_hal_tpiu.c
|
||||
SRC+= am_hal_uart.c
|
||||
SRC+= am_hal_wdt.c
|
||||
|
||||
SRC+=
|
||||
|
||||
# VPATH (Add paths to where your source files are located)
|
||||
VPATH=
|
||||
VPATH+= $(PROJECTPATH)/src
|
||||
VPATH+= $(SDKPATH)/utils
|
||||
VPATH+= $(COMMONPATH)/examples/spi
|
||||
VPATH+= $(COMMONPATH)/tools_sfe/templates
|
||||
VPATH+= $(SDKPATH)/mcu/apollo3/hal
|
||||
VPATH+=
|
||||
|
||||
# LIBS (Precompiled libraries to include in the linker step)
|
||||
LIBS=
|
||||
LIBS+= $(BOARDPATH)/bsp/gcc/bin/libam_bsp.a
|
||||
LIBS+= $(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a
|
||||
LIBS+= $(SDKPATH)/CMSIS/ARM/Lib/ARM/libarm_cortexM4lf_math.a
|
||||
LIBS+=
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
### Bootloader Tools
|
||||
ASB_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/asb/asb.py
|
||||
SVL_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/svl/svl.py
|
||||
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
STARTUP_FILE := ./startup_$(COMPILERNAME).c
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
CXX = $(TOOLCHAIN)-g++
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC CXX
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Machinery
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
XSRC = $(filter %.cpp,$(SRC))
|
||||
ZSRC = $(filter %.cc,$(SRC))
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(XSRC:%.cpp=$(CONFIG)/%.o)
|
||||
OBJS+= $(ZSRC:%.cc=$(CONFIG)/%.o)
|
||||
OBJS+= $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(XSRC:%.cpp=$(CONFIG)/%.d)
|
||||
DEPS+= $(ZSRC:%.cc=$(CONFIG)/%.d)
|
||||
DEPS+= $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CSTD = -std=c99
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP $(CSTD) -Wall -g
|
||||
CFLAGS+= -O0
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
XSTD = -std=gnu++11
|
||||
|
||||
XFLAGS = $(CFLAGS)
|
||||
XFLAGS+= -fno-exceptions
|
||||
|
||||
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
LFLAGS+= -nostartfiles -static
|
||||
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
|
||||
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
|
||||
LFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
CPFLAGS = -Obinary
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Targets / Rules
|
||||
#
|
||||
#******************************************************************************
|
||||
all: asb
|
||||
asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.cpp $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.cc $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET)_asb.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_linker.ld
|
||||
$(CONFIG)/$(TARGET)_asb.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_svl.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_svl_linker.ld
|
||||
$(CONFIG)/$(TARGET)_svl.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_%.bin: $(CONFIG)/$(TARGET)_%.axf
|
||||
@echo " Copying $(COMPILERNAME) $@..." ;\
|
||||
$(CP) $(CPFLAGS) $< $@ ;\
|
||||
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
|
||||
|
||||
bootload_asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
$(ASB_UPLOADER) --bin $(CONFIG)/$(TARGET)_asb.bin --load-address-blob 0x20000 --magic-num 0xCB -o $(CONFIG)/$(TARGET) --version 0x0 --load-address-wired 0xC000 -i 6 --options 0x1 -b $(ASB_UPLOAD_BAUD) -port $(COM_PORT) -r 2 -v
|
||||
|
||||
bootload_svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
$(SVL_UPLOADER) $(COM_PORT) -f $(CONFIG)/$(TARGET)_svl.bin -b $(SVL_UPLOAD_BAUD) -v
|
||||
|
||||
bootload: bootload_svl
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
|
||||
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map \
|
||||
$(CONFIG)/$(TARGET)_svl.bin $(CONFIG)/$(TARGET)_svl.axf \
|
||||
$(CONFIG)/$(TARGET)_svl.lst $(CONFIG)/$(TARGET)_svl.map \
|
||||
$(CONFIG)/$(TARGET)_asb.bin $(CONFIG)/$(TARGET)_asb.axf \
|
||||
$(CONFIG)/$(TARGET)_asb.lst $(CONFIG)/$(TARGET)_asb.map
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
$(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a:
|
||||
$(MAKE) -C $(SDKPATH)/mcu/apollo3/hal/gcc
|
||||
|
||||
$(SDKPATH)/third_party/uecc/gcc/bin/lib_uecc.a:
|
||||
$(MAKE) -C $(SDKPATH)/third_party/uecc
|
||||
|
||||
$(BOARDPATH)/bsp/gcc/bin/libam_bsp.a:
|
||||
$(MAKE) -C $(BOARDPATH)/bsp/gcc
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories bootload bootload_asb bootload_svl
|
||||
@@ -0,0 +1,144 @@
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
|
||||
// #define ASYNCH // comment out to use blocking methods
|
||||
|
||||
#define IOMN (2)
|
||||
#define SPI_MODE (3)
|
||||
#define SPI_FREQ (AM_HAL_IOM_4MHZ)
|
||||
void* iom_handle = NULL;
|
||||
am_hal_iom_config_t iom_cfg = {0};
|
||||
am_hal_iom_transfer_t xfer = {0};
|
||||
|
||||
#define CS_PIN (16)
|
||||
|
||||
#define report(s) am_util_stdio_printf("status: 0x%08X (function: %s, file: %s, line: %d)\n", s, __PRETTY_FUNCTION__, __FILE__, __LINE__)
|
||||
|
||||
volatile bool xfer_complete = false;
|
||||
volatile uint32_t txn_stat = 0;
|
||||
void xfer_complete_callback(void *pCallbackCtxt, uint32_t transactionStatus){
|
||||
(void)pCallbackCtxt;
|
||||
xfer_complete = true;
|
||||
txn_stat = transactionStatus;
|
||||
}
|
||||
|
||||
void init_iom( void ){
|
||||
uint32_t status = AM_HAL_STATUS_SUCCESS;
|
||||
|
||||
iom_cfg.eInterfaceMode = AM_HAL_IOM_SPI_MODE;
|
||||
iom_cfg.ui32ClockFreq = SPI_FREQ;
|
||||
iom_cfg.eSpiMode = SPI_MODE;
|
||||
iom_cfg.pNBTxnBuf = NULL;
|
||||
iom_cfg.ui32NBTxnBufLength = 0;
|
||||
|
||||
status = am_hal_iom_initialize(IOMN, &iom_handle);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
|
||||
status = am_hal_iom_power_ctrl(iom_handle, AM_HAL_SYSCTRL_WAKE, false);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
|
||||
status = am_hal_iom_configure(iom_handle, &iom_cfg);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
|
||||
status = am_hal_iom_enable(iom_handle);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
|
||||
// config pins
|
||||
status = am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_MISO, g_AM_BSP_GPIO_IOM2_MISO);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
|
||||
status = am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_MOSI, g_AM_BSP_GPIO_IOM2_MOSI);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }
|
||||
|
||||
status = am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_SCK, g_AM_BSP_GPIO_IOM2_SCK);
|
||||
if(status != AM_HAL_STATUS_SUCCESS){ report(status); }\
|
||||
}
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Main
|
||||
//
|
||||
//*****************************************************************************
|
||||
int
|
||||
main(void)
|
||||
{
|
||||
uint32_t status = AM_HAL_STATUS_SUCCESS;
|
||||
|
||||
//
|
||||
// Perform the standard initialzation for clocks, cache settings, and
|
||||
// board-level low-power operation.
|
||||
//
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
|
||||
am_hal_cachectrl_enable();
|
||||
am_bsp_low_power_init();
|
||||
|
||||
//
|
||||
// Initialize the printf interface for UART output
|
||||
//
|
||||
am_bsp_uart_printf_enable();
|
||||
|
||||
//
|
||||
// Print the banner.
|
||||
//
|
||||
am_util_stdio_terminal_clear();
|
||||
am_util_stdio_printf("PDM FFT example.\n\n");
|
||||
|
||||
|
||||
// do spi stuff
|
||||
init_iom();
|
||||
|
||||
char cmd[2];
|
||||
cmd[0] = 0xEC;
|
||||
cmd[1] = 0xC3;
|
||||
|
||||
xfer.uPeerInfo.ui32SpiChipSelect = 0;
|
||||
xfer.ui32InstrLen = 0;
|
||||
xfer.ui32Instr = 0;
|
||||
xfer.ui32NumBytes = 1;
|
||||
xfer.eDirection = AM_HAL_IOM_TX;
|
||||
xfer.pui32TxBuffer = (uint32_t*)cmd;
|
||||
xfer.pui32RxBuffer = NULL;
|
||||
xfer.bContinue = false;
|
||||
xfer.ui8RepeatCount = 0;
|
||||
xfer.ui8Priority = 1;
|
||||
xfer.ui32PauseCondition = 0;
|
||||
xfer.ui32StatusSetClr = 0;
|
||||
|
||||
#ifdef ASYNCH
|
||||
status = am_hal_iom_nonblocking_transfer(iom_handle, &xfer, xfer_complete_callback, NULL);
|
||||
report(status);
|
||||
#else
|
||||
status = am_hal_iom_blocking_transfer(iom_handle, &xfer);
|
||||
report(status);
|
||||
#endif
|
||||
|
||||
char rx_buf[10];
|
||||
|
||||
xfer.eDirection = AM_HAL_IOM_FULLDUPLEX;
|
||||
xfer.pui32TxBuffer = (uint32_t*)cmd;
|
||||
xfer.pui32RxBuffer = (uint32_t*)rx_buf;
|
||||
#ifdef ASYNCH
|
||||
status = am_hal_iom_nonblocking_transfer(iom_handle, &xfer, xfer_complete_callback, NULL);
|
||||
report(status);
|
||||
#else
|
||||
status = am_hal_iom_spi_blocking_fullduplex(iom_handle, &xfer);
|
||||
report(status);
|
||||
#endif
|
||||
|
||||
|
||||
while (1)
|
||||
{
|
||||
#ifdef ASYNCH
|
||||
status = am_hal_iom_nonblocking_transfer(iom_handle, &xfer, xfer_complete_callback, NULL);
|
||||
#else
|
||||
status = am_hal_iom_spi_blocking_fullduplex(iom_handle, &xfer);
|
||||
#endif
|
||||
|
||||
if(status != AM_HAL_STATUS_SUCCESS){
|
||||
report(status);
|
||||
}
|
||||
}
|
||||
}
|
||||
+417
@@ -0,0 +1,417 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2019, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.1.0 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# This is an example makefile for SparkFun Apollo3 boards as used in the
|
||||
# AmbiqSuite SDK.
|
||||
#
|
||||
# Recommended usage
|
||||
# make
|
||||
# make bootload_svl (uses the SparkFun Variable Loader to upload code)
|
||||
# make bootload_asb (uses the Ambiq Secure Bootlaoder to upload code)
|
||||
# make clean
|
||||
#
|
||||
# Filepaths
|
||||
# You can relocate this makefile easily by providing the path to the root of
|
||||
# the AmbiqSuite SDK. If that path is not specified then this file will
|
||||
# assume that it is located in
|
||||
# <AmbiqSDKRoot>/boards/<your_board>/examples/<your_example>/gcc
|
||||
# and use relative paths
|
||||
#
|
||||
# User Configuration
|
||||
# You must also specify which COM_PORT to use if you want to use the
|
||||
# 'bootlaoder' targets.
|
||||
# Windows example: COM_PORT=COM4
|
||||
# *nix example: COM_PORT=/dev/usbserialxxxx
|
||||
#
|
||||
# Python vs. Executable
|
||||
# For simplicity the upload tools are called as Python scripts by default.
|
||||
# Make sure PYTHON is set to the appropriate command to run Python3 from the
|
||||
# command line.
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Options
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# You can override these values on the command line e.g. make bootload COM_PORT=/dev/cu***
|
||||
# COM_PORT is the serial port to use for uploading. For example COM#### on Windows or /dev/cu.usbserial-#### on *nix
|
||||
COM_PORT ?=
|
||||
# ASB_UPLOAD_BAUD is the baud rate setting of the Ambiq Secue Bootloader (ASB) as it is configured on the Apollo3. Defautls to 115200 if unset
|
||||
ASB_UPLOAD_BAUD ?=
|
||||
# SVL_UPLOAD_BAUD is the baud rate setting of the SparkFun Variable Loader (SVL). Defaults to 921600 if unset
|
||||
SVL_UPLOAD_BAUD ?=
|
||||
# PYTHON3 should evaluate to a call to the Python3 executable on your machine
|
||||
PYTHON3 ?=
|
||||
|
||||
# *Optionally* specify absolute paths to the SDK and the BSP
|
||||
# You can do this on the command line - e.g. make bootload SDKPATH=~/$AMBIQ_SDK_ROOT_PATH
|
||||
# Make sure to use / instead of \ when on Windows
|
||||
SDKPATH ?=# Set as the path to the SDK root if not located at ../../../../..
|
||||
COMMONPATH ?=# Set as the path to the BSP common folder if not located at ../../../../common
|
||||
BOARDPATH ?=# Set as the path to the board if not located at ../../..
|
||||
PROJECTPATH ?=# Set as the path to the project if not located at ..
|
||||
BOARD ?=# If using a SparkFun board you can simply provide the name e.g. redboard_artemis_atp
|
||||
|
||||
### Project Settings
|
||||
TARGET := startup_tests
|
||||
COMPILERNAME := gcc
|
||||
PROJECT := $(TARGET)_gcc
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
ifeq ($(BOARD),)
|
||||
$(warning warning: no BOARD specified, will fall back to BOARDPATH for arbitrary bsp locations)
|
||||
else
|
||||
BOARDPATH=../../../../$(BOARD)
|
||||
$(warning Using BOARD=$(BOARD) at $(BOARDPATH))
|
||||
endif
|
||||
|
||||
ifeq ($(COM_PORT),)
|
||||
COM_PORT=COM4
|
||||
$(warning warning: you have not defined COM_PORT. Assuming it is COM4)
|
||||
endif
|
||||
ifeq ($(PYTHON3),)
|
||||
PYTHON3=python3
|
||||
$(warning warning: you have not defined PYTHON3. assuming it is accessible by 'python3')
|
||||
endif
|
||||
ifeq ($(ASB_UPLOAD_BAUD),)
|
||||
ASB_UPLOAD_BAUD=115200
|
||||
$(warning defaulting to 115200 baud for ASB)
|
||||
endif
|
||||
ifeq ($(SVL_UPLOAD_BAUD),)
|
||||
SVL_UPLOAD_BAUD=921600
|
||||
$(warning defaulting to 921600 baud for SVL)
|
||||
endif
|
||||
|
||||
ifeq ($(SDKPATH),)
|
||||
SDKPATH =../../../../..
|
||||
$(warning warning: you have not defined SDKPATH so will continue assuming that the SDK root is at $(SDKPATH))
|
||||
else
|
||||
# When the SDKPATH is given export it
|
||||
export SDKPATH
|
||||
endif
|
||||
|
||||
ifeq ($(COMMONPATH),)
|
||||
COMMONPATH =../../../../common
|
||||
$(warning warning: you have not defined COMMONPATH so will continue assuming that the COMMON root is at $(COMMONPATH))
|
||||
else
|
||||
# When the COMMONPATH is given export it
|
||||
export COMMONPATH
|
||||
endif
|
||||
|
||||
ifeq ($(BOARDPATH),)
|
||||
$(error Error: BOARDPATH must be provided)
|
||||
else
|
||||
# Ensure that boardpath does not include a trailing '/'
|
||||
ifeq ($(notdir $(BOARDPATH)),)
|
||||
override BOARDPATH:=$(patsubst %/, %,$(BOARDPATH))
|
||||
$(warning BOARDPATH had a trivial 'notdir' so we tried changing it to: $(BOARDPATH))
|
||||
endif
|
||||
BOARD=$(notdir $(BOARDPATH))
|
||||
# When the BOARDPATH is given export it
|
||||
export BOARDPATH
|
||||
endif
|
||||
|
||||
ifeq ($(PROJECTPATH),)
|
||||
PROJECTPATH =..
|
||||
$(warning warning: you have not defined PROJECTPATH so will continue assuming that the PROJECT root is at $(PROJECTPATH))
|
||||
else
|
||||
# When the PROJECTPATH is given export it
|
||||
export PROJECTPATH
|
||||
endif
|
||||
|
||||
CONFIG := $(PROJECTPATH)/gcc/$(BOARD)/bin
|
||||
$(warning CONFIG=$(CONFIG))
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# User Defines / Includes / Sources / Libraries
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
# Global Defines
|
||||
DEFINES= -DPART_$(PART)
|
||||
DEFINES+= -DAM_CUSTOM_BDADDR
|
||||
DEFINES+= -DAM_PACKAGE_BGA
|
||||
DEFINES+= -DWSF_TRACE_ENABLED
|
||||
DEFINES+= -DAM_DEBUG_PRINTF
|
||||
DEFINES+= -DAM_PART_APOLLO3
|
||||
DEFINES+=
|
||||
|
||||
# Includes (Add paths to where example header files are located)
|
||||
INCLUDES=
|
||||
INCLUDES+= -I$(PROJECTPATH)/src
|
||||
INCLUDES+= -I$(BOARDPATH)/bsp
|
||||
INCLUDES+= -I$(SDKPATH)
|
||||
INCLUDES+= -I$(SDKPATH)/utils
|
||||
INCLUDES+= -I$(SDKPATH)/devices
|
||||
INCLUDES+= -I$(SDKPATH)/mcu/apollo3
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include
|
||||
INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/startup_tests
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/startup_tests/test_framework
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/startup_tests/tests
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/startup_tests/tests/data
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/startup_tests/tests/bss
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/startup_tests/tests/constructors
|
||||
INCLUDES+= -I$(COMMONPATH)/examples/startup_tests/tests/fn_init
|
||||
INCLUDES+=
|
||||
|
||||
# Compilation Units (Add all the .c files you need to compile)
|
||||
SRC=
|
||||
SRC+= main.cpp
|
||||
SRC+= am_util_stdio.c
|
||||
SRC+= startup_gcc.c
|
||||
SRC+= test_framework.cpp
|
||||
SRC+= tests.cpp
|
||||
SRC+= test_data.cpp
|
||||
SRC+= test_bss.cpp
|
||||
SRC+= test_constructors.cpp
|
||||
SRC+= test_fn_init.cpp
|
||||
SRC+=
|
||||
|
||||
# VPATH (Add paths to where your source files are located)
|
||||
VPATH=
|
||||
VPATH+= $(PROJECTPATH)/src
|
||||
VPATH+= $(SDKPATH)/utils
|
||||
VPATH+= $(COMMONPATH)/tools_sfe/templates
|
||||
VPATH+= $(COMMONPATH)/examples/startup_tests
|
||||
VPATH+= $(COMMONPATH)/examples/startup_tests/test_framework
|
||||
VPATH+= $(COMMONPATH)/examples/startup_tests/tests
|
||||
VPATH+= $(COMMONPATH)/examples/startup_tests/tests/data
|
||||
VPATH+= $(COMMONPATH)/examples/startup_tests/tests/bss
|
||||
VPATH+= $(COMMONPATH)/examples/startup_tests/tests/constructors
|
||||
VPATH+= $(COMMONPATH)/examples/startup_tests/tests/fn_init
|
||||
VPATH+=
|
||||
|
||||
# LIBS (Precompiled libraries to include in the linker step)
|
||||
LIBS=
|
||||
LIBS+= $(BOARDPATH)/bsp/gcc/bin/libam_bsp.a
|
||||
LIBS+= $(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a
|
||||
LIBS+=
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Warning Messages
|
||||
#
|
||||
#******************************************************************************
|
||||
### Bootloader Tools
|
||||
ASB_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/asb/asb.py
|
||||
SVL_UPLOADER=$(PYTHON3) $(COMMONPATH)/tools_sfe/svl/svl.py
|
||||
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Setup ####
|
||||
|
||||
TOOLCHAIN ?= arm-none-eabi
|
||||
PART = apollo3
|
||||
CPU = cortex-m4
|
||||
FPU = fpv4-sp-d16
|
||||
# Default to FPU hardware calling convention. However, some customers and/or
|
||||
# applications may need the software calling convention.
|
||||
#FABI = softfp
|
||||
FABI = hard
|
||||
|
||||
STARTUP_FILE := ./startup_$(COMPILERNAME).c
|
||||
|
||||
#### Required Executables ####
|
||||
CC = $(TOOLCHAIN)-gcc
|
||||
GCC = $(TOOLCHAIN)-gcc
|
||||
CPP = $(TOOLCHAIN)-cpp
|
||||
CXX = $(TOOLCHAIN)-g++
|
||||
LD = $(TOOLCHAIN)-ld
|
||||
CP = $(TOOLCHAIN)-objcopy
|
||||
OD = $(TOOLCHAIN)-objdump
|
||||
RD = $(TOOLCHAIN)-readelf
|
||||
AR = $(TOOLCHAIN)-ar
|
||||
SIZE = $(TOOLCHAIN)-size
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
EXECUTABLES = CC LD CP OD AR RD SIZE GCC CXX
|
||||
K := $(foreach exec,$(EXECUTABLES),\
|
||||
$(if $(shell which $($(exec)) 2>/dev/null),,\
|
||||
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
|
||||
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
|
||||
|
||||
ifneq ($(strip $(value K)),)
|
||||
all clean:
|
||||
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Machinery
|
||||
#
|
||||
#******************************************************************************
|
||||
|
||||
XSRC = $(filter %.cpp,$(SRC))
|
||||
ZSRC = $(filter %.cc,$(SRC))
|
||||
CSRC = $(filter %.c,$(SRC))
|
||||
ASRC = $(filter %.s,$(SRC))
|
||||
|
||||
OBJS = $(XSRC:%.cpp=$(CONFIG)/%.o)
|
||||
OBJS+= $(ZSRC:%.cc=$(CONFIG)/%.o)
|
||||
OBJS+= $(CSRC:%.c=$(CONFIG)/%.o)
|
||||
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
|
||||
|
||||
DEPS = $(XSRC:%.cpp=$(CONFIG)/%.d)
|
||||
DEPS+= $(ZSRC:%.cc=$(CONFIG)/%.d)
|
||||
DEPS+= $(CSRC:%.c=$(CONFIG)/%.d)
|
||||
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
|
||||
|
||||
CSTD = -std=c99
|
||||
|
||||
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
CFLAGS+= -ffunction-sections -fdata-sections
|
||||
CFLAGS+= -MMD -MP -Wall -g
|
||||
CFLAGS+= -O0
|
||||
CFLAGS+= $(DEFINES)
|
||||
CFLAGS+= $(INCLUDES)
|
||||
CFLAGS+=
|
||||
|
||||
XSTD = -std=gnu++11
|
||||
|
||||
XFLAGS = $(CFLAGS)
|
||||
XFLAGS+= -fno-exceptions -fno-threadsafe-statics # added -fno-threadsafe-statics to allow static local contructors
|
||||
|
||||
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
|
||||
LFLAGS+= -nostartfiles -static
|
||||
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
|
||||
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
|
||||
LFLAGS+=
|
||||
|
||||
# Additional user specified CFLAGS
|
||||
CFLAGS+=$(EXTRA_CFLAGS)
|
||||
|
||||
CPFLAGS = -Obinary
|
||||
|
||||
ODFLAGS = -S
|
||||
|
||||
#******************************************************************************
|
||||
#
|
||||
# Targets / Rules
|
||||
#
|
||||
#******************************************************************************
|
||||
all: asb
|
||||
asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
|
||||
directories:
|
||||
@mkdir -p $(CONFIG)
|
||||
|
||||
$(CONFIG)/%.o: %.cpp $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.cc $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CXX) -c $(XSTD) $(XFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
|
||||
@echo " Compiling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
|
||||
@echo " Assembling $(COMPILERNAME) $<" ;\
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(CONFIG)/$(TARGET)_asb.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_linker.ld
|
||||
$(CONFIG)/$(TARGET)_asb.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_svl.axf: LINKER_FILE = $(COMMONPATH)/tools_sfe/templates/asb_svl_linker.ld
|
||||
$(CONFIG)/$(TARGET)_svl.axf: $(OBJS) $(LIBS)
|
||||
@echo " Linking $(COMPILERNAME) $@ with script $(LINKER_FILE)";\
|
||||
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
|
||||
|
||||
$(CONFIG)/$(TARGET)_%.bin: $(CONFIG)/$(TARGET)_%.axf
|
||||
@echo " Copying $(COMPILERNAME) $@..." ;\
|
||||
$(CP) $(CPFLAGS) $< $@ ;\
|
||||
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
|
||||
|
||||
bootload_asb: directories $(CONFIG)/$(TARGET)_asb.bin
|
||||
$(ASB_UPLOADER) --bin $(CONFIG)/$(TARGET)_asb.bin --load-address-blob 0x20000 --magic-num 0xCB -o $(CONFIG)/$(TARGET) --version 0x0 --load-address-wired 0xC000 -i 6 --options 0x1 -b $(ASB_UPLOAD_BAUD) -port $(COM_PORT) -r 2 -v
|
||||
|
||||
bootload_svl: directories $(CONFIG)/$(TARGET)_svl.bin
|
||||
$(SVL_UPLOADER) $(COM_PORT) -f $(CONFIG)/$(TARGET)_svl.bin -b $(SVL_UPLOAD_BAUD) -v
|
||||
|
||||
bootload: bootload_svl
|
||||
|
||||
clean:
|
||||
@echo "Cleaning..." ;\
|
||||
$(RM) -f $(OBJS) $(DEPS) \
|
||||
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
|
||||
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map \
|
||||
$(CONFIG)/$(TARGET)_svl.bin $(CONFIG)/$(TARGET)_svl.axf \
|
||||
$(CONFIG)/$(TARGET)_svl.lst $(CONFIG)/$(TARGET)_svl.map \
|
||||
$(CONFIG)/$(TARGET)_asb.bin $(CONFIG)/$(TARGET)_asb.axf \
|
||||
$(CONFIG)/$(TARGET)_asb.lst $(CONFIG)/$(TARGET)_asb.map
|
||||
|
||||
$(CONFIG)/%.d: ;
|
||||
|
||||
$(SDKPATH)/mcu/apollo3/hal/gcc/bin/libam_hal.a:
|
||||
$(MAKE) -C $(SDKPATH)/mcu/apollo3/hal/gcc
|
||||
|
||||
$(SDKPATH)/third_party/uecc/gcc/bin/lib_uecc.a:
|
||||
$(MAKE) -C $(SDKPATH)/third_party/uecc
|
||||
|
||||
$(BOARDPATH)/bsp/gcc/bin/libam_bsp.a:
|
||||
$(MAKE) -C $(BOARDPATH)/bsp/gcc
|
||||
|
||||
# Automatically include any generated dependencies
|
||||
-include $(DEPS)
|
||||
endif
|
||||
.PHONY: all clean directories bootload bootload_asb bootload_svl
|
||||
@@ -0,0 +1,44 @@
|
||||
/*
|
||||
Tests / verifies startup
|
||||
|
||||
Checks:
|
||||
- data segment copy
|
||||
- bss segment zero-fill
|
||||
- C++ global static constructor initialization
|
||||
*/
|
||||
|
||||
#include "main.h"
|
||||
#include "test_framework.h"
|
||||
#include "tests.h"
|
||||
|
||||
// main
|
||||
int main()
|
||||
{
|
||||
// Setup system clocks
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
|
||||
// Set the default cache configuration
|
||||
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
|
||||
am_hal_cachectrl_enable();
|
||||
|
||||
// Configure the board for low power operation.
|
||||
am_bsp_low_power_init();
|
||||
|
||||
// Enable the UART print interface.
|
||||
am_bsp_uart_printf_enable();
|
||||
|
||||
// Clear the terminal and print the banner.
|
||||
am_util_stdio_terminal_clear();
|
||||
am_util_stdio_printf("Startup Tests\n");
|
||||
am_util_stdio_printf("=============\n");
|
||||
am_util_stdio_printf("\n");
|
||||
|
||||
// run tests
|
||||
run_tests(tests);
|
||||
|
||||
// Loop forever while sleeping.
|
||||
while (1){
|
||||
// Go to Deep Sleep.
|
||||
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,9 @@
|
||||
#ifndef _MAIN_H_
|
||||
#define _MAIN_H_
|
||||
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
#include <stdbool.h>
|
||||
|
||||
#endif // _MAIN_H_
|
||||
+17
@@ -0,0 +1,17 @@
|
||||
#include "test_framework.h"
|
||||
|
||||
void print_test_info( test_info_t* info ){
|
||||
am_util_stdio_printf("Test Name: %s\n", (info->name != NULL) ? info->name : "N/A");
|
||||
am_util_stdio_printf("==========\n");
|
||||
am_util_stdio_printf("status: %s\n", (info->passed) ? "passed" : "failed" );
|
||||
am_util_stdio_printf("\n");
|
||||
}
|
||||
void run_tests(test_fn* tests){
|
||||
test_info_t* info;
|
||||
while(*tests != NULL){
|
||||
(*tests)(&info);
|
||||
print_test_info(info);
|
||||
tests++;
|
||||
}
|
||||
am_util_stdio_printf("\n\nAll tests complete\n");
|
||||
}
|
||||
+15
@@ -0,0 +1,15 @@
|
||||
#ifndef _TEST_FRAMEWORK_H_
|
||||
#define _TEST_FRAMEWORK_H_
|
||||
|
||||
#include "main.h"
|
||||
#include <stdlib.h>
|
||||
|
||||
typedef struct _test_info_t {
|
||||
char* name;
|
||||
bool passed;
|
||||
} test_info_t;
|
||||
typedef void (*test_fn)( test_info_t** info );
|
||||
void print_test_info( test_info_t* info );
|
||||
void run_tests(test_fn* tests);
|
||||
|
||||
#endif // _TEST_FRAMEWORK_H_
|
||||
+21
@@ -0,0 +1,21 @@
|
||||
#include "test_bss.h"
|
||||
|
||||
#define BYTES_TO_FILL 64
|
||||
|
||||
char bss_1[BYTES_TO_FILL];
|
||||
char bss_2[BYTES_TO_FILL] = {0};
|
||||
|
||||
//
|
||||
// test_bss
|
||||
void test_bss( test_info_t** info ){
|
||||
static test_info_t test_bss_info;
|
||||
static char* test_bss_name = "BSS Zereo Fill";
|
||||
test_bss_info.name = test_bss_name;
|
||||
test_bss_info.passed = true;
|
||||
*(info) = &test_bss_info;
|
||||
|
||||
for(size_t ix = 0; ix < BYTES_TO_FILL; ix++){
|
||||
if(bss_1[ix] != 0){ test_bss_info.passed = false; }
|
||||
if(bss_2[ix] != 0){ test_bss_info.passed = false; }
|
||||
}
|
||||
}
|
||||
+8
@@ -0,0 +1,8 @@
|
||||
#ifndef _TEST_BSS_H_
|
||||
#define _TEST_BSS_H_
|
||||
|
||||
#include "tests.h"
|
||||
|
||||
void test_bss( test_info_t** info );
|
||||
|
||||
#endif // _TEST_BSS_H_
|
||||
+41
@@ -0,0 +1,41 @@
|
||||
#include "test_constructors.h"
|
||||
|
||||
#define STATE1 0x00
|
||||
#define STATE2 0x01
|
||||
#define STATE3 0xDD
|
||||
#define STATE4 0xCC
|
||||
|
||||
/* A very simple class to test constructor execution */
|
||||
class LEDSTATE {
|
||||
private:
|
||||
protected:
|
||||
public:
|
||||
uint8_t state; // Trivial initialization is 0
|
||||
LEDSTATE(uint8_t init);
|
||||
};
|
||||
|
||||
LEDSTATE::LEDSTATE(uint8_t init){
|
||||
state=init;
|
||||
}
|
||||
|
||||
// This object should be initialized with a non-zero state
|
||||
LEDSTATE state1(STATE1);
|
||||
LEDSTATE state2(STATE2);
|
||||
LEDSTATE state3(STATE3);
|
||||
|
||||
//
|
||||
// test_constructors
|
||||
void test_constructors( test_info_t** info ){
|
||||
static LEDSTATE state4(STATE4);
|
||||
|
||||
static test_info_t test_constructors_info;
|
||||
static char* test_constructors_name = "Global / Static Constructors";
|
||||
test_constructors_info.name = test_constructors_name;
|
||||
test_constructors_info.passed = true;
|
||||
*(info) = &test_constructors_info;
|
||||
|
||||
if(state1.state != STATE1){ test_constructors_info.passed = false; }
|
||||
if(state2.state != STATE2){ test_constructors_info.passed = false; }
|
||||
if(state3.state != STATE3){ test_constructors_info.passed = false; }
|
||||
if(state4.state != STATE4){ test_constructors_info.passed = false; }
|
||||
}
|
||||
+8
@@ -0,0 +1,8 @@
|
||||
#ifndef _TEST_CONSTRUCTORS_H_
|
||||
#define _TEST_CONSTRUCTORS_H_
|
||||
|
||||
#include "tests.h"
|
||||
|
||||
void test_constructors( test_info_t** info );
|
||||
|
||||
#endif // _TEST_CONSTRUCTORS_H_
|
||||
+99
@@ -0,0 +1,99 @@
|
||||
#include "test_data.h"
|
||||
|
||||
#define BYTES_TO_COPY 8
|
||||
|
||||
// Automatially add some variables that won't be optimized
|
||||
// away to fill up the number of requested bytes
|
||||
#ifdef BYTES_TO_COPY
|
||||
#if BYTES_TO_COPY > 0
|
||||
#define VAR11 0xDE
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 1
|
||||
#define VAR12 0xAD
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 2
|
||||
#define VAR13 0xBE
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 3
|
||||
#define VAR14 0xEF
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 4
|
||||
#define VAR21 0xC0
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 5
|
||||
#define VAR22 0xFE
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 6
|
||||
#define VAR23 0xE6
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 7
|
||||
#define VAR24 0x0D
|
||||
#endif
|
||||
#endif // BYTES_TO_COPY
|
||||
|
||||
#ifdef BYTES_TO_COPY
|
||||
static volatile char data[] = {
|
||||
#if BYTES_TO_COPY > 0
|
||||
VAR11,
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 1
|
||||
VAR12,
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 2
|
||||
VAR13,
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 3
|
||||
VAR14,
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 4
|
||||
VAR21,
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 5
|
||||
VAR22,
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 6
|
||||
VAR23,
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 7
|
||||
VAR24,
|
||||
#endif
|
||||
};
|
||||
#endif // BYTES_TO_COPY
|
||||
|
||||
//
|
||||
// test_data
|
||||
void test_data( test_info_t** info ){
|
||||
static test_info_t test_data_info;
|
||||
static char* test_data_name = "Data Segment Copy";
|
||||
test_data_info.name = test_data_name;
|
||||
test_data_info.passed = true;
|
||||
*(info) = &test_data_info;
|
||||
|
||||
// Verify that all bytes were copied into RAM correctly
|
||||
#ifdef BYTES_TO_COPY
|
||||
#if BYTES_TO_COPY > 0
|
||||
if( data[0] != VAR11 ){ test_data_info.passed = false; }
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 1
|
||||
if( data[1] != VAR12 ){ test_data_info.passed = false; }
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 2
|
||||
if( data[2] != VAR13 ){ test_data_info.passed = false; }
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 3
|
||||
if( data[3] != VAR14 ){ test_data_info.passed = false; }
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 4
|
||||
if( data[4] != VAR21 ){ test_data_info.passed = false; }
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 5
|
||||
if( data[5] != VAR22 ){ test_data_info.passed = false; }
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 6
|
||||
if( data[6] != VAR23 ){ test_data_info.passed = false; }
|
||||
#endif
|
||||
#if BYTES_TO_COPY > 7
|
||||
if( data[7] != VAR24 ){ test_data_info.passed = false; }
|
||||
#endif
|
||||
#endif // BYTES_TO_COPY
|
||||
}
|
||||
+8
@@ -0,0 +1,8 @@
|
||||
#ifndef _TEST_DATA_H_
|
||||
#define _TEST_DATA_H_
|
||||
|
||||
#include "tests.h"
|
||||
|
||||
void test_data( test_info_t** info );
|
||||
|
||||
#endif // _TEST_DATA_H_
|
||||
+21
@@ -0,0 +1,21 @@
|
||||
#include "test_fn_init.h"
|
||||
|
||||
#define VAL 0xFA
|
||||
|
||||
char init_fn( void ){
|
||||
return VAL;
|
||||
}
|
||||
|
||||
char var = init_fn();
|
||||
|
||||
//
|
||||
// test_fn_init
|
||||
void test_fn_init( test_info_t** info ){
|
||||
static test_info_t test_fn_init_info;
|
||||
static char* test_fn_init_name = "Initialization of Global by Function";
|
||||
test_fn_init_info.name = test_fn_init_name;
|
||||
test_fn_init_info.passed = true;
|
||||
*(info) = &test_fn_init_info;
|
||||
|
||||
if( var != VAL ){ test_fn_init_info.passed = false; }
|
||||
}
|
||||
+8
@@ -0,0 +1,8 @@
|
||||
#ifndef _TEST_FN_INIT_H_
|
||||
#define _TEST_FN_INIT_H_
|
||||
|
||||
#include "tests.h"
|
||||
|
||||
void test_fn_init( test_info_t** info );
|
||||
|
||||
#endif // _TEST_FN_INIT_H_
|
||||
+30
@@ -0,0 +1,30 @@
|
||||
#include "tests.h"
|
||||
|
||||
test_fn tests[] = {
|
||||
test_data,
|
||||
test_bss,
|
||||
test_constructors,
|
||||
test_fn_init,
|
||||
|
||||
// test_fail,
|
||||
// test_pass,
|
||||
|
||||
NULL, // NULL terminates the list
|
||||
};
|
||||
|
||||
// test definitions
|
||||
void test_fail( test_info_t** info ){
|
||||
static test_info_t test_fail_info;
|
||||
static char* test_fail_name = "Fail Test";
|
||||
test_fail_info.name = test_fail_name;
|
||||
test_fail_info.passed = false;
|
||||
*(info) = &test_fail_info;
|
||||
}
|
||||
|
||||
void test_pass( test_info_t** info ){
|
||||
static test_info_t test_pass_info;
|
||||
static char* test_pass_name = "Pass Test";
|
||||
test_pass_info.name = test_pass_name;
|
||||
test_pass_info.passed = true;
|
||||
*(info) = &test_pass_info;
|
||||
}
|
||||
+20
@@ -0,0 +1,20 @@
|
||||
// test definitions
|
||||
#ifndef _TESTS_H_
|
||||
#define _TESTS_H_
|
||||
|
||||
#include "test_framework.h"
|
||||
|
||||
// included tests
|
||||
#include "test_data.h"
|
||||
#include "test_bss.h"
|
||||
#include "test_constructors.h"
|
||||
#include "test_fn_init.h"
|
||||
|
||||
// simple tests
|
||||
void test_fail( test_info_t** info );
|
||||
void test_pass( test_info_t** info );
|
||||
|
||||
// list of tests to run
|
||||
extern test_fn tests[];
|
||||
|
||||
#endif // _TESTS_H_
|
||||
+1586
File diff suppressed because it is too large
Load Diff
+938
@@ -0,0 +1,938 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file HM01B0.c
|
||||
//!
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_bsp.h"
|
||||
#include "am_util.h"
|
||||
#include "HM01B0.h"
|
||||
#include "HM01B0_Walking1s_01.h"
|
||||
#include "platform.h"
|
||||
|
||||
#define read_vsync() (AM_REGVAL(AM_REGADDR(GPIO, RDA)) & (1 << HM01B0_PIN_VSYNC))
|
||||
#define read_hsync() (AM_REGVAL(AM_REGADDR(GPIO, RDA)) & (1 << HM01B0_PIN_HSYNC))
|
||||
#define read_pclk() (AM_REGVAL(AM_REGADDR(GPIO, RDA)) & (1 << HM01B0_PIN_PCLK))
|
||||
#define read_byte() (APBDMA->BBINPUT)
|
||||
|
||||
const am_hal_gpio_pincfg_t g_HM01B0_pin_int =
|
||||
{
|
||||
.uFuncSel = 3,
|
||||
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_DISABLE,
|
||||
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
|
||||
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE,
|
||||
.eGPRdZero = AM_HAL_GPIO_PIN_RDZERO_READPIN
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Write HM01B0 registers
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param ui16Reg - Register address.
|
||||
//! @param pui8Value - Pointer to the data to be written.
|
||||
//! @param ui32NumBytes - Length of the data in bytes to be written.
|
||||
//!
|
||||
//! This function writes value to HM01B0 registers.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_write_reg(hm01b0_cfg_t *psCfg, \
|
||||
uint16_t ui16Reg, uint8_t *pui8Value, uint32_t ui32NumBytes)
|
||||
{
|
||||
am_hal_iom_transfer_t Transaction;
|
||||
|
||||
//
|
||||
// Create the transaction.
|
||||
//
|
||||
Transaction.ui32InstrLen = sizeof(uint16_t);
|
||||
Transaction.ui32Instr = (ui16Reg & 0x0000FFFF);
|
||||
Transaction.eDirection = AM_HAL_IOM_TX;
|
||||
Transaction.ui32NumBytes = ui32NumBytes;
|
||||
Transaction.pui32TxBuffer = (uint32_t *) pui8Value;
|
||||
Transaction.uPeerInfo.ui32I2CDevAddr = (uint32_t) psCfg->ui16SlvAddr;
|
||||
Transaction.bContinue = false;
|
||||
Transaction.ui8RepeatCount = 0;
|
||||
Transaction.ui32PauseCondition = 0;
|
||||
Transaction.ui32StatusSetClr = 0;
|
||||
|
||||
//
|
||||
// Execute the transction over IOM.
|
||||
//
|
||||
if (am_hal_iom_blocking_transfer(psCfg->pIOMHandle, &Transaction))
|
||||
{
|
||||
return HM01B0_ERR_I2C;
|
||||
}
|
||||
|
||||
return HM01B0_ERR_OK;
|
||||
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Read HM01B0 registers
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param ui16Reg - Register address.
|
||||
//! @param pui8Value - Pointer to the buffer for read data to be put into.
|
||||
//! @param ui32NumBytes - Length of the data to be read.
|
||||
//!
|
||||
//! This function reads value from HM01B0 registers.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_read_reg(hm01b0_cfg_t *psCfg, \
|
||||
uint16_t ui16Reg, uint8_t *pui8Value, uint32_t ui32NumBytes)
|
||||
{
|
||||
am_hal_iom_transfer_t Transaction;
|
||||
|
||||
//
|
||||
// Create the transaction.
|
||||
//
|
||||
Transaction.ui32InstrLen = sizeof(uint16_t);
|
||||
Transaction.ui32Instr = (ui16Reg & 0x0000FFFF);
|
||||
Transaction.eDirection = AM_HAL_IOM_RX;
|
||||
Transaction.ui32NumBytes = ui32NumBytes;
|
||||
Transaction.pui32RxBuffer = (uint32_t *) pui8Value;;
|
||||
Transaction.uPeerInfo.ui32I2CDevAddr = (uint32_t) psCfg->ui16SlvAddr;
|
||||
Transaction.bContinue = false;
|
||||
Transaction.ui8RepeatCount = 0;
|
||||
Transaction.ui32PauseCondition = 0;
|
||||
Transaction.ui32StatusSetClr = 0;
|
||||
|
||||
//
|
||||
// Execute the transction over IOM.
|
||||
//
|
||||
if (am_hal_iom_blocking_transfer(psCfg->pIOMHandle, &Transaction))
|
||||
{
|
||||
return HM01B0_ERR_I2C;
|
||||
}
|
||||
|
||||
return HM01B0_ERR_OK;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Load HM01B0 a given script
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param psScrip - Pointer to the script to be loaded.
|
||||
//! @param ui32ScriptCmdNum - Number of entries in a given script.
|
||||
//!
|
||||
//! This function loads HM01B0 a given script.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_load_script(hm01b0_cfg_t *psCfg, hm_script_t *psScript, uint32_t ui32ScriptCmdNum)
|
||||
{
|
||||
uint32_t ui32Err = HM01B0_ERR_OK;
|
||||
for (uint32_t idx = 0; idx < ui32ScriptCmdNum; idx++)
|
||||
{
|
||||
ui32Err = hm01b0_write_reg(psCfg, \
|
||||
(psScript + idx)->ui16Reg, \
|
||||
&((psScript + idx)->ui8Val), \
|
||||
sizeof(uint8_t));
|
||||
if (ui32Err != HM01B0_ERR_OK)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return ui32Err;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Power up HM01B0
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//!
|
||||
//! This function powers up HM01B0.
|
||||
//!
|
||||
//! @return none.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void hm01b0_power_up(hm01b0_cfg_t *psCfg)
|
||||
{
|
||||
// place holder
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Power down HM01B0
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//!
|
||||
//! This function powers up HM01B0.
|
||||
//!
|
||||
//! @return none.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void hm01b0_power_down(hm01b0_cfg_t *psCfg)
|
||||
{
|
||||
// place holder
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Enable MCLK
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//!
|
||||
//! This function utilizes CTimer to generate MCLK for HM01B0.
|
||||
//!
|
||||
//! @return none.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void hm01b0_mclk_enable(hm01b0_cfg_t *psCfg)
|
||||
{
|
||||
#define MCLK_UI64PATTERN 0x55555555
|
||||
#define MCLK_UI64PATTERNLEN 31
|
||||
|
||||
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
|
||||
|
||||
//
|
||||
// Set up timer.
|
||||
//
|
||||
am_hal_ctimer_clear(psCfg->ui32CTimerModule, psCfg->ui32CTimerSegment);
|
||||
|
||||
am_hal_ctimer_config_single(psCfg->ui32CTimerModule,
|
||||
psCfg->ui32CTimerSegment,
|
||||
(
|
||||
AM_HAL_CTIMER_FN_PTN_REPEAT |
|
||||
AM_HAL_CTIMER_HFRC_12MHZ
|
||||
)
|
||||
);
|
||||
|
||||
//
|
||||
// Set the pattern in the CMPR registers.
|
||||
//
|
||||
am_hal_ctimer_compare_set(psCfg->ui32CTimerModule, psCfg->ui32CTimerSegment, 0,
|
||||
(uint32_t)(MCLK_UI64PATTERN & 0xFFFF));
|
||||
am_hal_ctimer_compare_set(psCfg->ui32CTimerModule, psCfg->ui32CTimerSegment, 1,
|
||||
(uint32_t)((MCLK_UI64PATTERN >> 16) & 0xFFFF));
|
||||
|
||||
//
|
||||
// Set the timer trigger and pattern length.
|
||||
//
|
||||
am_hal_ctimer_config_trigger(psCfg->ui32CTimerModule,
|
||||
psCfg->ui32CTimerSegment,
|
||||
(
|
||||
(MCLK_UI64PATTERNLEN << CTIMER_AUX0_TMRA0LMT_Pos) |
|
||||
(CTIMER_AUX0_TMRB0TRIG_DIS << CTIMER_AUX0_TMRA0TRIG_Pos)
|
||||
)
|
||||
);
|
||||
|
||||
//
|
||||
// Configure timer output pin.
|
||||
//
|
||||
am_hal_ctimer_output_config(psCfg->ui32CTimerModule,
|
||||
psCfg->ui32CTimerSegment,
|
||||
psCfg->ui32CTimerOutputPin,
|
||||
AM_HAL_CTIMER_OUTPUT_NORMAL,
|
||||
AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA);
|
||||
|
||||
//
|
||||
// Start the timer.
|
||||
//
|
||||
am_hal_ctimer_start(psCfg->ui32CTimerModule, psCfg->ui32CTimerSegment);
|
||||
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Disable MCLK
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//!
|
||||
//! This function disable CTimer to stop MCLK for HM01B0.
|
||||
//!
|
||||
//! @return none.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void hm01b0_mclk_disable(hm01b0_cfg_t *psCfg)
|
||||
{
|
||||
//
|
||||
// Stop the timer.
|
||||
//
|
||||
am_hal_ctimer_stop(psCfg->ui32CTimerModule, psCfg->ui32CTimerSegment);
|
||||
am_hal_gpio_pinconfig(psCfg->ui32CTimerOutputPin, g_AM_HAL_GPIO_DISABLE);
|
||||
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Initialize interfaces
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//!
|
||||
//! This function initializes interfaces.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_init_if(hm01b0_cfg_t *psCfg)
|
||||
{
|
||||
void *pIOMHandle = NULL;
|
||||
|
||||
if ( psCfg->ui32IOMModule > AM_REG_IOM_NUM_MODULES )
|
||||
{
|
||||
return HM01B0_ERR_I2C;
|
||||
}
|
||||
|
||||
//
|
||||
// Enable fault detection.
|
||||
//
|
||||
#if AM_APOLLO3_MCUCTRL
|
||||
am_hal_mcuctrl_control(AM_HAL_MCUCTRL_CONTROL_FAULT_CAPTURE_ENABLE, 0);
|
||||
#else // AM_APOLLO3_MCUCTRL
|
||||
am_hal_mcuctrl_fault_capture_enable();
|
||||
#endif // AM_APOLLO3_MCUCTRL
|
||||
|
||||
//
|
||||
// Initialize the IOM instance.
|
||||
// Enable power to the IOM instance.
|
||||
// Configure the IOM for Serial operation during initialization.
|
||||
// Enable the IOM.
|
||||
//
|
||||
if (am_hal_iom_initialize(psCfg->ui32IOMModule, &pIOMHandle) ||
|
||||
am_hal_iom_power_ctrl(pIOMHandle, AM_HAL_SYSCTRL_WAKE, false) ||
|
||||
am_hal_iom_configure(pIOMHandle, &(psCfg->sIOMCfg)) ||
|
||||
am_hal_iom_enable(pIOMHandle))
|
||||
{
|
||||
return HM01B0_ERR_I2C;
|
||||
}
|
||||
else
|
||||
{
|
||||
//
|
||||
// Configure the IOM pins.
|
||||
//
|
||||
am_bsp_iom_pins_enable(psCfg->ui32IOMModule, psCfg->eIOMMode);
|
||||
|
||||
psCfg->pIOMHandle = pIOMHandle;
|
||||
}
|
||||
|
||||
// initialize pins for camera parallel interface.
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD0);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD1);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD2);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD3);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD4);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD5);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD6);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD7);
|
||||
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD0);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD1);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD2);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD3);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD4);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD5);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD6);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD7);
|
||||
|
||||
am_hal_gpio_fast_pinconfig((uint64_t)0x1 << psCfg->ui8PinD0 |
|
||||
(uint64_t)0x1 << psCfg->ui8PinD1 |
|
||||
(uint64_t)0x1 << psCfg->ui8PinD2 |
|
||||
(uint64_t)0x1 << psCfg->ui8PinD3 |
|
||||
(uint64_t)0x1 << psCfg->ui8PinD4 |
|
||||
(uint64_t)0x1 << psCfg->ui8PinD5 |
|
||||
(uint64_t)0x1 << psCfg->ui8PinD6 |
|
||||
(uint64_t)0x1 << psCfg->ui8PinD7,
|
||||
g_AM_HAL_GPIO_INPUT, 0);
|
||||
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinVSYNC, g_AM_HAL_GPIO_INPUT);
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinHSYNC, g_AM_HAL_GPIO_INPUT);
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinPCLK, g_AM_HAL_GPIO_INPUT);
|
||||
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinTrig, g_AM_HAL_GPIO_OUTPUT);
|
||||
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinInt, g_AM_HAL_GPIO_DISABLE);
|
||||
// am_hal_gpio_pinconfig(psCfg->ui8PinInt, g_HM01B0_pin_int);
|
||||
// am_hal_gpio_interrupt_clear(AM_HAL_GPIO_BIT(psCfg->ui8PinInt));
|
||||
// am_hal_gpio_interrupt_enable(AM_HAL_GPIO_BIT(psCfg->ui8PinInt));
|
||||
// NVIC_EnableIRQ(GPIO_IRQn);
|
||||
|
||||
return HM01B0_ERR_OK;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Deinitialize interfaces
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//!
|
||||
//! This function deinitializes interfaces.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_deinit_if(hm01b0_cfg_t *psCfg)
|
||||
{
|
||||
am_hal_iom_disable(psCfg->pIOMHandle);
|
||||
am_hal_iom_uninitialize(psCfg->pIOMHandle);
|
||||
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinSCL, g_AM_HAL_GPIO_DISABLE);
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinSDA, g_AM_HAL_GPIO_DISABLE);
|
||||
|
||||
// initialize pins for camera parallel interface.
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD0);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD1);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD2);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD3);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD4);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD5);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD6);
|
||||
am_hal_gpio_fastgpio_disable(psCfg->ui8PinD7);
|
||||
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD0);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD1);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD2);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD3);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD4);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD5);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD6);
|
||||
am_hal_gpio_fastgpio_clr(psCfg->ui8PinD7);
|
||||
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinVSYNC, g_AM_HAL_GPIO_DISABLE);
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinHSYNC, g_AM_HAL_GPIO_DISABLE);
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinPCLK, g_AM_HAL_GPIO_DISABLE);
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinTrig, g_AM_HAL_GPIO_DISABLE);
|
||||
am_hal_gpio_pinconfig(psCfg->ui8PinInt, g_AM_HAL_GPIO_DISABLE);
|
||||
|
||||
|
||||
return HM01B0_ERR_OK;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Get HM01B0 Model ID
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param pui16MID - Pointer to buffer for the read back model ID.
|
||||
//!
|
||||
//! This function reads back HM01B0 model ID.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_get_modelid(hm01b0_cfg_t *psCfg, uint16_t *pui16MID)
|
||||
{
|
||||
uint8_t ui8Data[1];
|
||||
uint32_t ui32Err;
|
||||
|
||||
*pui16MID = 0x0000;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_MODEL_ID_H, ui8Data, sizeof(ui8Data));
|
||||
if (ui32Err == HM01B0_ERR_OK)
|
||||
{
|
||||
*pui16MID |= (ui8Data[0] << 8);
|
||||
}
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_MODEL_ID_L, ui8Data, sizeof(ui8Data));
|
||||
if (ui32Err == HM01B0_ERR_OK)
|
||||
{
|
||||
*pui16MID |= ui8Data[0];
|
||||
}
|
||||
|
||||
return ui32Err;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Initialize HM01B0
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param psScript - Pointer to HM01B0 initialization script.
|
||||
//! @param ui32ScriptCmdNum - No. of commands in HM01B0 initialization script.
|
||||
//!
|
||||
//! This function initilizes HM01B0 with a given script.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_init_system(hm01b0_cfg_t *psCfg, hm_script_t *psScript, uint32_t ui32ScriptCmdNum)
|
||||
{
|
||||
return hm01b0_load_script(psCfg, psScript, ui32ScriptCmdNum);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Set HM01B0 in the walking 1s test mode
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//!
|
||||
//! This function sets HM01B0 in the walking 1s test mode.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_test_walking1s(hm01b0_cfg_t *psCfg)
|
||||
{
|
||||
uint32_t ui32ScriptCmdNum = sizeof(sHM01b0TestModeScript_Walking1s) / sizeof(hm_script_t);
|
||||
hm_script_t *psScript = (hm_script_t *)sHM01b0TestModeScript_Walking1s;
|
||||
|
||||
return hm01b0_load_script(psCfg, psScript, ui32ScriptCmdNum);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Check the data read from HM01B0 in the walking 1s test mode
|
||||
//!
|
||||
//! @param pui8Buffer - Pointer to data buffer.
|
||||
//! @param ui32BufferLen - Buffer length
|
||||
//! @param ui32PrintCnt - Number of mismatched data to be printed out
|
||||
//!
|
||||
//! This function sets HM01B0 in the walking 1s test mode.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void hm01b0_test_walking1s_check_data_sanity(uint8_t *pui8Buffer, uint32_t ui32BufferLen, uint32_t ui32PrintCnt)
|
||||
{
|
||||
uint8_t ui8ByteData = *pui8Buffer;
|
||||
uint32_t ui32MismatchCnt = 0x00;
|
||||
|
||||
for (uint32_t ui32Idx = 0; ui32Idx < ui32BufferLen; ui32Idx++)
|
||||
{
|
||||
if (*(pui8Buffer + ui32Idx) != ui8ByteData)
|
||||
{
|
||||
if (ui32PrintCnt)
|
||||
{
|
||||
am_util_stdio_printf("[0x%08X] actual 0x%02X expected 0x%02X\n", ui32Idx, *(pui8Buffer + ui32Idx), ui8ByteData);
|
||||
am_util_delay_ms(1);
|
||||
ui32PrintCnt--;
|
||||
}
|
||||
ui32MismatchCnt++;
|
||||
}
|
||||
|
||||
if (ui8ByteData)
|
||||
ui8ByteData = ui8ByteData << 1;
|
||||
else
|
||||
ui8ByteData = 0x01;
|
||||
}
|
||||
|
||||
am_util_stdio_printf("Mismatch Rate %d/%d\n", ui32MismatchCnt, ui32BufferLen);
|
||||
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Software reset HM01B0
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//!
|
||||
//! This function resets HM01B0 by issuing a reset command.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_reset_sw(hm01b0_cfg_t *psCfg)
|
||||
{
|
||||
uint8_t ui8Data[1] = {0x00};
|
||||
return hm01b0_write_reg(psCfg, HM01B0_REG_SW_RESET, ui8Data, sizeof(ui8Data));
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Get current HM01B0 operation mode.
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param pui8Mode - Pointer to buffer
|
||||
//! - for the read back operation mode to be put into
|
||||
//!
|
||||
//! This function get HM01B0 operation mode.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_get_mode(hm01b0_cfg_t *psCfg, uint8_t *pui8Mode)
|
||||
{
|
||||
uint8_t ui8Data[1] = {0x01};
|
||||
uint32_t ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_MODE_SELECT, ui8Data, sizeof(ui8Data));
|
||||
|
||||
*pui8Mode = ui8Data[0];
|
||||
|
||||
return ui32Err;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Set HM01B0 operation mode.
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param ui8Mode - Operation mode. One of:
|
||||
//! HM01B0_REG_MODE_SELECT_STANDBY
|
||||
//! HM01B0_REG_MODE_SELECT_STREAMING
|
||||
//! HM01B0_REG_MODE_SELECT_STREAMING_NFRAMES
|
||||
//! HM01B0_REG_MODE_SELECT_STREAMING_HW_TRIGGER
|
||||
//! @param ui8FrameCnt - Frame count for HM01B0_REG_MODE_SELECT_STREAMING_NFRAMES.
|
||||
//! - Discarded if other modes.
|
||||
//!
|
||||
//! This function set HM01B0 operation mode.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_set_mode(hm01b0_cfg_t *psCfg, uint8_t ui8Mode, uint8_t ui8FrameCnt)
|
||||
{
|
||||
uint32_t ui32Err = HM01B0_ERR_OK;
|
||||
|
||||
if (ui8Mode == HM01B0_REG_MODE_SELECT_STREAMING_NFRAMES)
|
||||
{
|
||||
ui32Err = hm01b0_write_reg(psCfg, HM01B0_REG_PMU_PROGRAMMABLE_FRAMECNT, &ui8FrameCnt, sizeof(ui8FrameCnt));
|
||||
}
|
||||
|
||||
if(ui32Err == HM01B0_ERR_OK)
|
||||
{
|
||||
ui32Err = hm01b0_write_reg(psCfg, HM01B0_REG_MODE_SELECT, &ui8Mode, sizeof(ui8Mode));
|
||||
}
|
||||
|
||||
return ui32Err;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Activate the updated settings to HM01B0.
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//!
|
||||
//! Some settings updated to HM01B0 will only be affected after calling this function
|
||||
//! 1. AE settings
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_cmd_update(hm01b0_cfg_t *psCfg)
|
||||
{
|
||||
uint8_t ui8Data = HM01B0_REG_GRP_PARAM_HOLD_HOLD;
|
||||
|
||||
return hm01b0_write_reg(psCfg, HM01B0_REG_GRP_PARAM_HOLD, &ui8Data, sizeof(ui8Data));
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Get HM01B0 AE convergance
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param psAECfg - Pointer to the structure hm01b0_ae_cfg_t.
|
||||
//!
|
||||
//! This function checks if AE is converged or not and returns ui32Err accordingly.
|
||||
//! If caller needs detailed AE settings, psAECfg has to be non NULL.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_get_ae(hm01b0_cfg_t *psCfg, hm01b0_ae_cfg_t *psAECfg)
|
||||
{
|
||||
uint32_t ui32Err = HM01B0_ERR_OK;
|
||||
uint8_t ui8AETargetMean;
|
||||
uint8_t ui8AEMinMean;
|
||||
uint8_t ui8AEMean;
|
||||
uint8_t ui8ConvergeInTh;
|
||||
uint8_t ui8ConvergeOutTh;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_AE_TARGET_MEAN, &ui8AETargetMean, sizeof(ui8AETargetMean));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_AE_MIN_MEAN, &ui8AEMinMean, sizeof(ui8AEMinMean));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_CONVERGE_IN_TH, &ui8ConvergeInTh, sizeof(ui8ConvergeInTh));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_CONVERGE_OUT_TH, &ui8ConvergeOutTh, sizeof(ui8ConvergeOutTh));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, 0x2020, &ui8AEMean, sizeof(ui8AEMean));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
if ((ui8AEMean < (ui8AETargetMean - ui8ConvergeInTh)) || (ui8AEMean > (ui8AETargetMean + ui8ConvergeInTh)))
|
||||
ui32Err = HM01B0_ERR_AE_NOT_CONVERGED;
|
||||
|
||||
if (psAECfg)
|
||||
{
|
||||
psAECfg->ui8AETargetMean = ui8AETargetMean;
|
||||
psAECfg->ui8AEMinMean = ui8AEMinMean;
|
||||
psAECfg->ui8ConvergeInTh = ui8ConvergeInTh;
|
||||
psAECfg->ui8ConvergeOutTh = ui8ConvergeOutTh;
|
||||
psAECfg->ui8AEMean = ui8AEMean;
|
||||
}
|
||||
|
||||
return ui32Err;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief AE calibration.
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param ui8CalFrames - Frame counts for calibratoin.
|
||||
//! @param pui8Buffer - Pointer to the frame buffer.
|
||||
//! @param ui32BufferLen - Framebuffer size.
|
||||
//!
|
||||
//! This function lets HM01B0 AE settled as much as possible within a given frame counts.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_cal_ae(hm01b0_cfg_t *psCfg, uint8_t ui8CalFrames, uint8_t *pui8Buffer, uint32_t ui32BufferLen)
|
||||
{
|
||||
uint32_t ui32Err = HM01B0_ERR_OK;
|
||||
hm01b0_ae_cfg_t sAECfg;
|
||||
|
||||
am_util_stdio_printf("[%s] +\n", __func__);
|
||||
|
||||
hm01b0_set_mode(psCfg, HM01B0_REG_MODE_SELECT_STREAMING_NFRAMES, ui8CalFrames);
|
||||
|
||||
for (uint8_t i = 0; i < ui8CalFrames; i++)
|
||||
{
|
||||
|
||||
hm01b0_blocking_read_oneframe(psCfg, pui8Buffer, ui32BufferLen);
|
||||
|
||||
ui32Err = hm01b0_get_ae(psCfg, &sAECfg);
|
||||
|
||||
am_util_stdio_printf("AE Calibration(0x%02X) TargetMean 0x%02X, ConvergeInTh 0x%02X, AEMean 0x%02X\n", \
|
||||
ui32Err, sAECfg.ui8AETargetMean, sAECfg.ui8ConvergeInTh, sAECfg.ui8AEMean);
|
||||
|
||||
// if AE calibration is done in ui8CalFrames, just exit to save some time.
|
||||
if (ui32Err == HM01B0_ERR_OK)
|
||||
break;
|
||||
}
|
||||
|
||||
hm01b0_set_mode(psCfg, HM01B0_REG_MODE_SELECT_STANDBY, 0);
|
||||
|
||||
am_util_stdio_printf("[%s] -\n", __func__);
|
||||
|
||||
return ui32Err;
|
||||
}
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Save HM01B0 exposure gain settings.
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param psExpoGainCtrl - Pointer to the structure hm01b0_snr_expo_gain_ctrl_t
|
||||
//!
|
||||
//! This function saves HM01B0 exposure gain settings.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_save_exposure_gains(hm01b0_cfg_t *psCfg, hm01b0_snr_expo_gain_ctrl_t *psExpoGainCtrl)
|
||||
{
|
||||
uint32_t ui32Err = HM01B0_ERR_OK;
|
||||
uint8_t ui8IntegrationH;
|
||||
uint8_t ui8IntegrationL;
|
||||
uint8_t ui8AGain;
|
||||
uint8_t ui8DGain_H;
|
||||
uint8_t ui8DGain_L;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_INTEGRATION_H, &ui8IntegrationH, sizeof(ui8IntegrationH));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_INTEGRATION_L, &ui8IntegrationL, sizeof(ui8IntegrationL));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_ANALOG_GAIN, &ui8AGain, sizeof(ui8AGain));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_DIGITAL_GAIN_H, &ui8DGain_H, sizeof(ui8DGain_H));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_DIGITAL_GAIN_L, &ui8DGain_L, sizeof(ui8DGain_L));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
if (psExpoGainCtrl)
|
||||
{
|
||||
psExpoGainCtrl->ui8IntegrationH = ui8IntegrationH;
|
||||
psExpoGainCtrl->ui8IntegrationL = ui8IntegrationL;
|
||||
psExpoGainCtrl->ui8AGain = ui8AGain;
|
||||
psExpoGainCtrl->ui8DGain_H = ui8DGain_H;
|
||||
psExpoGainCtrl->ui8DGain_L = ui8DGain_L;
|
||||
}
|
||||
|
||||
return ui32Err;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Restore HM01B0 exposure gain settings.
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param psExpoGainCtrl - Pointer to the structure hm01b0_snr_expo_gain_ctrl_t
|
||||
//!
|
||||
//! This function restores HM01B0 exposure gain settings. The call flow shall be
|
||||
//! hm01b0_restore_exposure_gains() -> hm01b0_cmd_update() -> hm01b0_set_mode()
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_restore_exposure_gains(hm01b0_cfg_t *psCfg, hm01b0_snr_expo_gain_ctrl_t *psExpoGainCtrl)
|
||||
{
|
||||
uint32_t ui32Err = HM01B0_ERR_OK;
|
||||
uint8_t ui8Tmp;
|
||||
|
||||
ui32Err = hm01b0_write_reg(psCfg, HM01B0_REG_INTEGRATION_H, &(psExpoGainCtrl->ui8IntegrationH), sizeof(psExpoGainCtrl->ui8IntegrationH));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_write_reg(psCfg, HM01B0_REG_INTEGRATION_L, &(psExpoGainCtrl->ui8IntegrationL), sizeof(psExpoGainCtrl->ui8IntegrationL));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_ANALOG_GAIN, &ui8Tmp, sizeof(ui8Tmp));
|
||||
ui8Tmp = (ui8Tmp & ~(0x7 << 4)) | (psExpoGainCtrl->ui8AGain & (0x7 << 4));
|
||||
ui32Err = hm01b0_write_reg(psCfg, HM01B0_REG_ANALOG_GAIN, &ui8Tmp, sizeof(ui8Tmp));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_DIGITAL_GAIN_H, &ui8Tmp, sizeof(ui8Tmp));
|
||||
ui8Tmp = (ui8Tmp & ~(0x3 << 0)) | (psExpoGainCtrl->ui8DGain_H & (0x3 << 0));
|
||||
ui32Err = hm01b0_write_reg(psCfg, HM01B0_REG_DIGITAL_GAIN_H, &ui8Tmp, sizeof(ui8Tmp));
|
||||
if (ui32Err != HM01B0_ERR_OK) return ui32Err;
|
||||
|
||||
ui32Err = hm01b0_read_reg(psCfg, HM01B0_REG_DIGITAL_GAIN_L, &ui8Tmp, sizeof(ui8Tmp));
|
||||
ui8Tmp = (ui8Tmp & ~(0x3F << 2)) | (psExpoGainCtrl->ui8DGain_L & (0x3F << 2));
|
||||
ui32Err = hm01b0_write_reg(psCfg, HM01B0_REG_DIGITAL_GAIN_L, &ui8Tmp, sizeof(ui8Tmp));
|
||||
|
||||
return ui32Err;
|
||||
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Hardware trigger HM01B0 to stream.
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param bTrigger - True to start streaming
|
||||
//! - False to stop streaming
|
||||
//!
|
||||
//! This function triggers HM01B0 to stream by toggling the TRIG pin.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_hardware_trigger_streaming(hm01b0_cfg_t *psCfg, bool bTrigger)
|
||||
{
|
||||
uint32_t ui32Err = HM01B0_ERR_OK;
|
||||
uint8_t ui8Mode;
|
||||
|
||||
ui32Err = hm01b0_get_mode(psCfg, &ui8Mode);
|
||||
|
||||
if (ui32Err != HM01B0_ERR_OK)
|
||||
goto end;
|
||||
|
||||
if (ui8Mode != HM01B0_REG_MODE_SELECT_STREAMING_HW_TRIGGER)
|
||||
{
|
||||
ui32Err = HM01B0_ERR_MODE;
|
||||
goto end;
|
||||
}
|
||||
|
||||
if (bTrigger)
|
||||
{
|
||||
am_hal_gpio_output_set(psCfg->ui8PinTrig);
|
||||
}
|
||||
else
|
||||
{
|
||||
am_hal_gpio_output_clear(psCfg->ui8PinTrig);
|
||||
}
|
||||
|
||||
end:
|
||||
return ui32Err;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Set HM01B0 mirror mode.
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param bHmirror - Horizontal mirror
|
||||
//! @param bVmirror - Vertical mirror
|
||||
//!
|
||||
//! This function set HM01B0 mirror mode.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_set_mirror(hm01b0_cfg_t *psCfg, bool bHmirror, bool bVmirror)
|
||||
{
|
||||
uint8_t ui8Data = 0x00;
|
||||
uint32_t ui32Err = HM01B0_ERR_OK;
|
||||
|
||||
if (bHmirror)
|
||||
{
|
||||
ui8Data |= HM01B0_REG_IMAGE_ORIENTATION_HMIRROR;
|
||||
}
|
||||
|
||||
if (bVmirror)
|
||||
{
|
||||
ui8Data |= HM01B0_REG_IMAGE_ORIENTATION_VMIRROR;
|
||||
}
|
||||
|
||||
ui32Err = hm01b0_write_reg(psCfg, HM01B0_REG_IMAGE_ORIENTATION, &ui8Data, sizeof(ui8Data));
|
||||
|
||||
if (ui32Err == HM01B0_ERR_OK)
|
||||
{
|
||||
ui8Data = HM01B0_REG_GRP_PARAM_HOLD_HOLD;
|
||||
ui32Err = hm01b0_write_reg(psCfg, HM01B0_REG_GRP_PARAM_HOLD, &ui8Data, sizeof(ui8Data));
|
||||
}
|
||||
|
||||
return ui32Err;
|
||||
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @brief Read data of one frame from HM01B0.
|
||||
//!
|
||||
//! @param psCfg - Pointer to HM01B0 configuration structure.
|
||||
//! @param pui8Buffer - Pointer to the frame buffer.
|
||||
//! @param ui32BufferLen - Framebuffer size.
|
||||
//!
|
||||
//! This function read data of one frame from HM01B0.
|
||||
//!
|
||||
//! @return Error code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t hm01b0_blocking_read_oneframe(hm01b0_cfg_t *psCfg, uint8_t *pui8Buffer, uint32_t ui32BufferLen)
|
||||
{
|
||||
uint32_t ui32Err = HM01B0_ERR_OK;
|
||||
uint32_t ui32Idx = 0x00;
|
||||
|
||||
am_util_stdio_printf("[%s] +\n", __func__);
|
||||
|
||||
uint32_t ui32HsyncCnt = 0x00;
|
||||
|
||||
while((ui32HsyncCnt < HM01B0_PIXEL_Y_NUM))
|
||||
{
|
||||
while (0x00 == read_hsync());
|
||||
|
||||
// read one row
|
||||
while(read_hsync())
|
||||
{
|
||||
while(0x00 == read_pclk());
|
||||
|
||||
*(pui8Buffer + ui32Idx++) = read_byte();
|
||||
|
||||
if (ui32Idx == ui32BufferLen) {
|
||||
goto end;
|
||||
}
|
||||
|
||||
while(read_pclk());
|
||||
}
|
||||
|
||||
ui32HsyncCnt++;
|
||||
}
|
||||
|
||||
end:
|
||||
am_util_stdio_printf("[%s] - Byte Counts %d\n", __func__, ui32Idx);
|
||||
|
||||
return ui32Err;
|
||||
|
||||
}
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user