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2022-10-23 23:45:43 -07:00
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/Makefile
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#******************************************************************************
#
# Makefile - Rules for compiling
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
# Include rules specific to this board
-include ../../board-defs.mk
-include example-defs.mk
# All makefiles use this to find the top level directory.
SWROOT?=../../../..
# Include rules for building generic examples.
include $(SWROOT)/makedefs/example.mk
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/README.txt
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Name:
=====
ble_freertos_ancs
Description:
============
ARM Cordio BLE - Apple Notification Center Service (ANCS) Example.
Purpose:
========
This example implements a BLE Apple Notification Center Service
profile.
Printing takes place over the ITM at 1M Baud.
******************************************************************************
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/gcc/Makefile
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := ble_freertos_ancs
COMPILERNAME := gcc
PROJECT := ble_freertos_ancs_gcc
CONFIG := bin
SHELL:=/bin/bash
#### Setup ####
TOOLCHAIN ?= arm-none-eabi
PART = apollo3
CPU = cortex-m4
FPU = fpv4-sp-d16
# Default to FPU hardware calling convention. However, some customers and/or
# applications may need the software calling convention.
#FABI = softfp
FABI = hard
LINKER_FILE := ./ble_freertos_ancs.ld
STARTUP_FILE := ./startup_$(COMPILERNAME).c
#### Required Executables ####
CC = $(TOOLCHAIN)-gcc
GCC = $(TOOLCHAIN)-gcc
CPP = $(TOOLCHAIN)-cpp
LD = $(TOOLCHAIN)-ld
CP = $(TOOLCHAIN)-objcopy
OD = $(TOOLCHAIN)-objdump
RD = $(TOOLCHAIN)-readelf
AR = $(TOOLCHAIN)-ar
SIZE = $(TOOLCHAIN)-size
RM = $(shell which rm 2>/dev/null)
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
K := $(foreach exec,$(EXECUTABLES),\
$(if $(shell which $($(exec)) 2>/dev/null),,\
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
ifneq ($(strip $(value K)),)
all clean:
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
DEFINES = -DPART_$(PART)
DEFINES+= -DAM_CUSTOM_BDADDR
DEFINES+= -DAM_PART_APOLLO3
DEFINES+= -DAM_FREERTOS
DEFINES+= -DAM_PACKAGE_BGA
DEFINES+= -DSEC_ECC_CFG=SEC_ECC_CFG_UECC
DEFINES+= -DAM_DEBUG_PRINTF
DEFINES+= -DWSF_TRACE_ENABLED
DEFINES+= -Dgcc
INCLUDES = -I../../../../../mcu/apollo3
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/profiles
INCLUDES+= -I../../../../../ambiq_ble/apps/ancs
INCLUDES+= -I../../../../../third_party/exactle/ble-host/sources/stack/hci
INCLUDES+= -I../../../../../third_party/exactle/ble-host/sources/hci/ambiq
INCLUDES+= -I../../../../../third_party/exactle/wsf/sources/util
INCLUDES+= -I../../../bsp
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/apps/app
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/profiles/uribeacon
INCLUDES+= -I../../../../../third_party/FreeRTOSv10.1.1/Source/include
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/profiles/hrps
INCLUDES+= -I../../../../../CMSIS/ARM/Include
INCLUDES+= -I../../../../../devices
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/profiles/gap
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/profiles/rscp
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/profiles/include
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/profiles/gatt
INCLUDES+= -I../../../../../third_party/uecc
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/apps
INCLUDES+= -I../../../../../CMSIS/AmbiqMicro/Include
INCLUDES+= -I../../../../../third_party/exactle/ble-host/sources/stack/cfg
INCLUDES+= -I../src
INCLUDES+= -I../../../../../third_party/exactle/ble-host/sources/hci/include
INCLUDES+= -I../../../../../third_party/exactle/wsf/sources
INCLUDES+= -I../../../../../third_party/exactle/wsf/sources/port/freertos
INCLUDES+= -I../../../../../third_party/exactle/ble-host/sources/stack/dm
INCLUDES+= -I../../../../../third_party/exactle/ble-host/sources/stack/smp
INCLUDES+= -I../../../../../third_party/exactle/wsf/include
INCLUDES+= -I../../../../../third_party/exactle/ble-host/sources/sec/common
INCLUDES+= -I../../../../..
INCLUDES+= -I../../../../../utils
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/profiles/hid
INCLUDES+= -I../../../../../third_party/exactle/ble-host/include
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/profiles/bas
INCLUDES+= -I../../../../../third_party/exactle/ble-host/sources/stack/att
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/sources/services
INCLUDES+= -I../../../../../third_party/FreeRTOSv10.1.1/Source/portable/GCC/AMapollo2
INCLUDES+= -I../../../../../third_party/exactle/ble-profiles/include/app
INCLUDES+= -I../../../../../third_party/exactle/ble-host/sources/stack/l2c
INCLUDES+= -I../../../../../ambiq_ble/profiles/ancc
INCLUDES+= -I../../../../../third_party/exactle/ble-host/sources/hci/ambiq/apollo3
VPATH = ../../../../../third_party/exactle/ble-profiles/sources/apps/app/common
VPATH+=:../../../../../ambiq_ble/apps/ancs
VPATH+=:../../../../../third_party/exactle/ble-host/sources/stack/hci
VPATH+=:../../../../../third_party/exactle/ble-host/sources/hci/ambiq
VPATH+=:../../../../../third_party/exactle/wsf/sources/util
VPATH+=:../../../../../third_party/exactle/ble-profiles/sources/apps/hidapp
VPATH+=:../../../../../third_party/exactle/ble-profiles/sources/apps/app
VPATH+=:../../../../../third_party/exactle/wsf/sources/port/freertos
VPATH+=:../../../../../third_party/exactle/ble-host/sources/stack/dm
VPATH+=:../../../../../third_party/exactle/ble-profiles/sources/profiles/hrps
VPATH+=:../../../../../third_party/exactle/ble-host/sources/sec/uecc
VPATH+=:../../../../../third_party/exactle/ble-host/sources/stack/smp
VPATH+=:../../../../../devices
VPATH+=:../../../../../third_party/exactle/ble-host/sources/sec/common
VPATH+=:../../../../../third_party/FreeRTOSv10.1.1/Source
VPATH+=:../../../../../third_party/exactle/ble-profiles/sources/profiles/gap
VPATH+=:../../../../../third_party/exactle/ble-profiles/sources/profiles/rscp
VPATH+=:../../../../../third_party/exactle/ble-profiles/sources/profiles/gatt
VPATH+=:../../../../../third_party/uecc
VPATH+=:../../../../../utils
VPATH+=:../../../../../third_party/exactle/ble-profiles/sources/profiles/hid
VPATH+=:../../../../../ambiq_ble/profiles/ancc
VPATH+=:../../../../../third_party/exactle/ble-profiles/sources/profiles/bas
VPATH+=:../../../../../third_party/exactle/ble-host/sources/stack/att
VPATH+=:../../../../../third_party/FreeRTOSv10.1.1/Source/portable/GCC/AMapollo2
VPATH+=:../../../../../third_party/exactle/ble-host/sources/stack/l2c
VPATH+=:../../../../../third_party/exactle/ble-profiles/sources/services
VPATH+=:../../../../../third_party/exactle/ble-host/sources/hci/ambiq/apollo3
VPATH+=:../../../../../third_party/exactle/ble-host/sources/stack/cfg
VPATH+=:../src
VPATH+=:../../../../../third_party/FreeRTOSv10.1.1/Source/portable/MemMang
SRC = app_db.c
SRC += app_hw.c
SRC += app_ui.c
SRC += ui_console.c
SRC += ui_lcd.c
SRC += ui_main.c
SRC += ui_platform.c
SRC += ui_timer.c
SRC += ancs_main.c
SRC += hci_main.c
SRC += hci_cmd.c
SRC += hci_cmd_ae.c
SRC += hci_cmd_cte.c
SRC += hci_cmd_past.c
SRC += hci_cmd_phy.c
SRC += hci_core.c
SRC += hci_core_ps.c
SRC += hci_evt.c
SRC += hci_tr.c
SRC += hci_vs.c
SRC += hci_vs_ae.c
SRC += bda.c
SRC += bstream.c
SRC += calc128.c
SRC += crc32.c
SRC += print.c
SRC += terminal.c
SRC += wstr.c
SRC += hidapp_main.c
SRC += wsf_assert.c
SRC += wsf_buf.c
SRC += wsf_efs.c
SRC += wsf_math.c
SRC += wsf_msg.c
SRC += wsf_os.c
SRC += wsf_queue.c
SRC += wsf_timer.c
SRC += wsf_trace.c
SRC += dm_adv.c
SRC += dm_adv_ae.c
SRC += dm_adv_leg.c
SRC += dm_conn.c
SRC += dm_conn_cte.c
SRC += dm_conn_master.c
SRC += dm_conn_master_ae.c
SRC += dm_conn_master_leg.c
SRC += dm_conn_slave.c
SRC += dm_conn_slave_ae.c
SRC += dm_conn_slave_leg.c
SRC += dm_conn_sm.c
SRC += dm_dev.c
SRC += dm_dev_priv.c
SRC += dm_main.c
SRC += dm_past.c
SRC += dm_phy.c
SRC += dm_priv.c
SRC += dm_scan.c
SRC += dm_scan_ae.c
SRC += dm_scan_leg.c
SRC += dm_sec.c
SRC += dm_sec_lesc.c
SRC += dm_sec_master.c
SRC += dm_sec_slave.c
SRC += dm_sync_ae.c
SRC += hrps_main.c
SRC += sec_ecc.c
SRC += smpi_act.c
SRC += smpi_sc_act.c
SRC += smpi_sc_sm.c
SRC += smpi_sm.c
SRC += smpr_act.c
SRC += smpr_sc_act.c
SRC += smpr_sc_sm.c
SRC += smpr_sm.c
SRC += smp_act.c
SRC += smp_db.c
SRC += smp_main.c
SRC += smp_non.c
SRC += smp_sc_act.c
SRC += smp_sc_main.c
SRC += sec_aes.c
SRC += sec_aes_rev.c
SRC += sec_ccm_hci.c
SRC += sec_cmac_hci.c
SRC += sec_ecc_debug.c
SRC += sec_ecc_hci.c
SRC += sec_main.c
SRC += gap_main.c
SRC += rscps_main.c
SRC += gatt_main.c
SRC += uECC.c
SRC += uECC_ll.c
SRC += hid_main.c
SRC += bas_main.c
SRC += attc_disc.c
SRC += attc_main.c
SRC += attc_proc.c
SRC += attc_read.c
SRC += attc_sign.c
SRC += attc_write.c
SRC += atts_ccc.c
SRC += atts_csf.c
SRC += atts_dyn.c
SRC += atts_ind.c
SRC += atts_main.c
SRC += atts_proc.c
SRC += atts_read.c
SRC += atts_sign.c
SRC += atts_write.c
SRC += att_main.c
SRC += att_uuid.c
SRC += port.c
SRC += l2c_coc.c
SRC += l2c_main.c
SRC += l2c_master.c
SRC += l2c_slave.c
SRC += ancc_main.c
SRC += hci_drv_apollo3.c
SRC += cfg_stack.c
SRC += ble_freertos_ancs.c
SRC += radio_task.c
SRC += rtos.c
SRC += app_disc.c
SRC += app_main.c
SRC += app_master.c
SRC += app_master_leg.c
SRC += app_server.c
SRC += app_slave.c
SRC += app_slave_leg.c
SRC += app_terminal.c
SRC += event_groups.c
SRC += list.c
SRC += queue.c
SRC += tasks.c
SRC += timers.c
SRC += am_util_ble.c
SRC += am_util_debug.c
SRC += am_util_delay.c
SRC += am_util_faultisr.c
SRC += am_util_id.c
SRC += am_util_stdio.c
SRC += svc_batt.c
SRC += svc_bps.c
SRC += svc_core.c
SRC += svc_cps.c
SRC += svc_cscs.c
SRC += svc_dis.c
SRC += svc_gls.c
SRC += svc_gyro.c
SRC += svc_hid.c
SRC += svc_hrs.c
SRC += svc_hts.c
SRC += svc_ipss.c
SRC += svc_plxs.c
SRC += svc_px.c
SRC += svc_rscs.c
SRC += svc_scpss.c
SRC += svc_temp.c
SRC += svc_uricfg.c
SRC += svc_wdxs.c
SRC += svc_wp.c
SRC += svc_wss.c
SRC += am_devices_button.c
SRC += am_devices_led.c
SRC += heap_2.c
SRC += startup_gcc.c
CSRC = $(filter %.c,$(SRC))
ASRC = $(filter %.s,$(SRC))
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
LIBS = ../../../../../mcu/apollo3/hal/gcc/bin/libam_hal.a
LIBS += ../../../bsp/gcc/bin/libam_bsp.a
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
CFLAGS+= -ffunction-sections -fdata-sections -fomit-frame-pointer
CFLAGS+= -MMD -MP -std=c99 -Wall -g
CFLAGS+= -O0
CFLAGS+= $(DEFINES)
CFLAGS+= $(INCLUDES)
CFLAGS+=
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
LFLAGS+= -nostartfiles -static
LFLAGS+= -Wl,--gc-sections,--entry,Reset_Handler,-Map,$(CONFIG)/$(TARGET).map
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
LFLAGS+=
# Additional user specified CFLAGS
CFLAGS+=$(EXTRA_CFLAGS)
CPFLAGS = -Obinary
ODFLAGS = -S
#### Rules ####
all: directories $(CONFIG)/$(TARGET).bin
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
@echo " Compiling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
@echo " Assembling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/$(TARGET).axf: $(OBJS) $(LIBS)
@echo " Linking $(COMPILERNAME) $@" ;\
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
$(CONFIG)/$(TARGET).bin: $(CONFIG)/$(TARGET).axf
@echo " Copying $(COMPILERNAME) $@..." ;\
$(CP) $(CPFLAGS) $< $@ ;\
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
clean:
@echo "Cleaning..." ;\
$(RM) -f $(OBJS) $(DEPS) \
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map
$(CONFIG)/%.d: ;
../../../../../mcu/apollo3/hal/gcc/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo3/hal
../../../bsp/gcc/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
# Automatically include any generated dependencies
-include $(DEPS)
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/gcc/ble_freertos_ancs.ld
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/******************************************************************************
*
* ble_freertos_ancs.ld - Linker script for applications using startup_gnu.c
*
*****************************************************************************/
ENTRY(Reset_Handler)
MEMORY
{
ROMEM (rx) : ORIGIN = 0x0000C000, LENGTH = 960K
RWMEM (rwx) : ORIGIN = 0x10000000, LENGTH = 384K
}
SECTIONS
{
.text :
{
. = ALIGN(4);
KEEP(*(.isr_vector))
KEEP(*(.patch))
*(.text)
*(.text*)
*(.rodata)
*(.rodata*)
. = ALIGN(4);
_etext = .;
} > ROMEM
/* User stack section initialized by startup code. */
.stack (NOLOAD):
{
. = ALIGN(8);
*(.stack)
*(.stack*)
. = ALIGN(8);
} > RWMEM
.data :
{
. = ALIGN(4);
_sdata = .;
*(.data)
*(.data*)
. = ALIGN(4);
_edata = .;
} > RWMEM AT>ROMEM
/* used by startup to initialize data */
_init_data = LOADADDR(.data);
.bss :
{
. = ALIGN(4);
_sbss = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} > RWMEM
.ARM.attributes 0 : { *(.ARM.attributes) }
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/gcc/startup_gcc.c
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//*****************************************************************************
//
//! @file startup_gcc.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Forward declaration of interrupt handlers.
//
//*****************************************************************************
extern void Reset_Handler(void) __attribute ((naked));
extern void NMI_Handler(void) __attribute ((weak));
extern void HardFault_Handler(void) __attribute ((weak));
extern void MemManage_Handler(void) __attribute ((weak, alias ("HardFault_Handler")));
extern void BusFault_Handler(void) __attribute ((weak, alias ("HardFault_Handler")));
extern void UsageFault_Handler(void) __attribute ((weak, alias ("HardFault_Handler")));
extern void SecureFault_Handler(void) __attribute ((weak));
extern void SVC_Handler(void) __attribute ((weak, alias ("am_default_isr")));
extern void DebugMon_Handler(void) __attribute ((weak, alias ("am_default_isr")));
extern void PendSV_Handler(void) __attribute ((weak, alias ("am_default_isr")));
extern void SysTick_Handler(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_brownout_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_watchdog_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_rtc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_vcomp_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_ios_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_acc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster2_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster3_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster4_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster5_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ble_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_gpio_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ctimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_uart_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_uart1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_scard_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_adc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_pdm0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_mspi0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr2_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr3_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr4_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr5_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr6_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr7_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_clkgen_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_default_isr(void) __attribute ((weak));
//*****************************************************************************
//
// The entry point for the application.
//
//*****************************************************************************
extern int main(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
__attribute__ ((section(".stack")))
static uint32_t g_pui32Stack[0xac0];
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__attribute__ ((section(".isr_vector")))
void (* const g_am_pfnVectors[])(void) =
{
(void (*)(void))((uint32_t)g_pui32Stack + sizeof(g_pui32Stack)),
// The initial stack pointer
Reset_Handler, // The reset handler
NMI_Handler, // The NMI handler
HardFault_Handler, // The hard fault handler
MemManage_Handler, // The MemManage_Handler
BusFault_Handler, // The BusFault_Handler
UsageFault_Handler, // The UsageFault_Handler
SecureFault_Handler, // The SecureFault_Handler
0, // Reserved
0, // Reserved
0, // Reserved
SVC_Handler, // SVCall handler
DebugMon_Handler, // Debug monitor handler
0, // Reserved
PendSV_Handler, // The PendSV handler
SysTick_Handler, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout (rstgen)
am_watchdog_isr, // 1: Watchdog
am_rtc_isr, // 2: RTC
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_iomaster2_isr, // 8: I/O Master 2
am_iomaster3_isr, // 9: I/O Master 3
am_iomaster4_isr, // 10: I/O Master 4
am_iomaster5_isr, // 11: I/O Master 5
am_ble_isr, // 12: BLEIF
am_gpio_isr, // 13: GPIO
am_ctimer_isr, // 14: CTIMER
am_uart_isr, // 15: UART0
am_uart1_isr, // 16: UART1
am_scard_isr, // 17: SCARD
am_adc_isr, // 18: ADC
am_pdm0_isr, // 19: PDM
am_mspi0_isr, // 20: MSPI0
am_software0_isr, // 21: SOFTWARE0
am_stimer_isr, // 22: SYSTEM TIMER
am_stimer_cmpr0_isr, // 23: SYSTEM TIMER COMPARE0
am_stimer_cmpr1_isr, // 24: SYSTEM TIMER COMPARE1
am_stimer_cmpr2_isr, // 25: SYSTEM TIMER COMPARE2
am_stimer_cmpr3_isr, // 26: SYSTEM TIMER COMPARE3
am_stimer_cmpr4_isr, // 27: SYSTEM TIMER COMPARE4
am_stimer_cmpr5_isr, // 28: SYSTEM TIMER COMPARE5
am_stimer_cmpr6_isr, // 29: SYSTEM TIMER COMPARE6
am_stimer_cmpr7_isr, // 30: SYSTEM TIMER COMPARE7
am_clkgen_isr, // 31: CLKGEN
};
//******************************************************************************
//
// Place code immediately following vector table.
//
//******************************************************************************
//******************************************************************************
//
// The Patch table.
//
// The patch table should pad the vector table size to a total of 64 entries
// (16 core + 48 periph) such that code begins at offset 0x100.
//
//******************************************************************************
__attribute__ ((section(".patch")))
uint32_t const __Patchable[] =
{
0, // 32
0, // 33
0, // 34
0, // 35
0, // 36
0, // 37
0, // 38
0, // 39
0, // 40
0, // 41
0, // 42
0, // 43
0, // 44
0, // 45
0, // 46
0, // 47
};
//*****************************************************************************
//
// The following are constructs created by the linker, indicating where the
// the "data" and "bss" segments reside in memory. The initializers for the
// "data" segment resides immediately following the "text" segment.
//
//*****************************************************************************
extern uint32_t _etext;
extern uint32_t _sdata;
extern uint32_t _edata;
extern uint32_t _sbss;
extern uint32_t _ebss;
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
#if defined(__GNUC_STDC_INLINE__)
void
Reset_Handler(void)
{
//
// Set the vector table pointer.
//
__asm(" ldr r0, =0xE000ED08\n"
" ldr r1, =g_am_pfnVectors\n"
" str r1, [r0]");
//
// Set the stack pointer.
//
__asm(" ldr sp, [r1]");
#ifndef NOFPU
//
// Enable the FPU.
//
__asm("ldr r0, =0xE000ED88\n"
"ldr r1,[r0]\n"
"orr r1,#(0xF << 20)\n"
"str r1,[r0]\n"
"dsb\n"
"isb\n");
#endif
//
// Copy the data segment initializers from flash to SRAM.
//
__asm(" ldr r0, =_init_data\n"
" ldr r1, =_sdata\n"
" ldr r2, =_edata\n"
"copy_loop:\n"
" ldr r3, [r0], #4\n"
" str r3, [r1], #4\n"
" cmp r1, r2\n"
" blt copy_loop\n");
//
// Zero fill the bss segment.
//
__asm(" ldr r0, =_sbss\n"
" ldr r1, =_ebss\n"
" mov r2, #0\n"
"zero_loop:\n"
" cmp r0, r1\n"
" it lt\n"
" strlt r2, [r0], #4\n"
" blt zero_loop");
//
// Call the application's entry point.
//
main();
//
// If main returns then execute a break point instruction
//
__asm(" bkpt ");
}
#else
#error GNU STDC inline not supported.
#endif
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
void
NMI_Handler(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
HardFault_Handler(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/iar/Makefile
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := ble_freertos_ancs
COMPILERNAME := iar
PROJECT := ble_freertos_ancs_iar
CONFIG := bin
AM_SoftwareRoot ?= ../../../..
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p IarBuild.exe)
RM = $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
IarBuild.exe ble_freertos_ancs.ewp -make Debug -log info
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
IarBuild.exe ble_freertos_ancs.ewp -clean Debug -log all
../../../../../mcu/apollo3/hal/iar/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo3/hal
../../../bsp/iar/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/iar/bin/ble_freertos_ancs.log
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/iar/ble_freertos_ancs.eww
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\ble_freertos_ancs.ewp</path>
</project>
<batchBuild/>
</workspace>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/iar/ble_freertos_ancs.icf
+87
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//*****************************************************************************
//
// ble_freertos_ancs.icf
//
// IAR linker Configuration File
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
//
// Define a memory section that covers the entire 4 GB addressable space of the
// processor. (32-bit can address up to 4GB)
//
define memory mem with size = 4G;
//
// Define regions for the various types of internal memory.
//
define region ROMEM = mem:[from 0x0000C000 to 0x000FC000];
define region RWMEM = mem:[from 0x10000000 to 0x10060000];
//
// Define blocks for logical groups of data.
//
define block HEAP with alignment = 0x8, size = 0x00000000 { };
define block CSTACK with alignment = 0x8, size = 11008
{
section .stack
};
define block FLASHBASE with fixed order
{
readonly section .intvec,
readonly section .patch
};
//
// Set section properties.
//
initialize by copy { readwrite };
do not initialize { section .noinit };
do not initialize { section .stack };
//
// Place code sections in memory regions.
//
place at start of ROMEM { block FLASHBASE };
place in ROMEM { readonly };
place at start of RWMEM { block CSTACK};
place in RWMEM { block HEAP, readwrite, section .noinit };
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/iar/settings/ble_freertos_ancs.dni
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[Stack]
FillEnabled=0
OverflowWarningsEnabled=1
WarningThreshold=90
SpWarningsEnabled=1
WarnLogOnly=1
UseTrigger=1
TriggerName=main
LimitSize=0
ByteLimit=50
[Breakpoints]
Count=0
[GDBSERVERDriver]
GDB_LeaveTargetRunning=0x00000000
[DebugChecksum]
Checksum=-2034475309
[Exceptions]
StopOnUncaught=_ 0
StopOnThrow=_ 0
[CodeCoverage]
Enabled=_ 0
[CallStack]
ShowArgs=0
[Disassembly]
MixedMode=1
[JLinkDriver]
CStepIntDis=_ 0
LeaveTargetRunning=_ 0
TraceBufferSize=0x00010000
TraceStallIfFIFOFull=0x00000000
TracePortSize=0x00000000
[SWOTraceHWSettings]
OverrideDefaultClocks=1
CpuClock=6000000
ClockAutoDetect=0
ClockWanted=1000000
JtagSpeed=1000000
Prescaler=6
TimeStampPrescIndex=0
TimeStampPrescData=0
PcSampCYCTAP=1
PcSampPOSTCNT=15
PcSampIndex=0
DataLogMode=0
ITMportsEnable=1
ITMportsTermIO=1
ITMportsLogFile=0
ITMlogFile=$PROJ_DIR$\ITM.log
[Trace1]
Enabled=0
ShowSource=1
[Trace2]
Enabled=0
ShowSource=0
[SWOTraceWindow]
PcSampling=0
InterruptLogs=0
ForcedTimeStamps=0
EventCPI=0
EventEXC=0
EventFOLD=0
EventLSU=0
EventSLEEP=0
[PowerLog]
Title_0=I0
Symbol_0=0 4 0
LogEnabled=0
GraphEnabled=0
ShowTimeLog=1
LiveEnabled=0
LiveFile=PowerLogLive.log
[DataLog]
LogEnabled=0
GraphEnabled=0
ShowTimeLog=1
SumEnabled=0
ShowTimeSum=1
[EventLog]
Title_0=Ch3
Symbol_0=0 4 1
Title_1=Ch2
Symbol_1=0 4 1
Title_2=Ch1
Symbol_2=0 4 1
Title_3=Ch0
Symbol_3=0 4 1
LogEnabled=0
GraphEnabled=0
ShowTimeLog=1
SumEnabled=0
ShowTimeSum=1
SumSortOrder=0
[InterruptLog]
LogEnabled=0
GraphEnabled=0
ShowTimeLog=1
SumEnabled=0
ShowTimeSum=1
SumSortOrder=0
[Log file]
LoggingEnabled=_ 0
LogFile=_ ""
Category=_ 0
[TermIOLog]
LoggingEnabled=_ 0
LogFile=_ ""
[DriverProfiling]
Enabled=0
Mode=1
Graph=0
Symbiont=0
Exclusions=
[CallStackLog]
Enabled=0
[CallStackStripe]
ShowTiming=1
[PowerProbe]
Frequency=10000
Probe0=I0
ProbeSetup0=2 1 1 2 0 0
[Disassemble mode]
mode=0
[Breakpoints2]
Count=0
[Aliases]
Count=0
SuppressDialog=0
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/iar/settings/ble_freertos_ancs.dnx
+167
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<?xml version="1.0"?>
<settings>
<DebugChecksum>
<Checksum>1749499678</Checksum>
</DebugChecksum>
<Exceptions>
<StopOnUncaught>_ 0</StopOnUncaught>
<StopOnThrow>_ 0</StopOnThrow>
</Exceptions>
<CodeCoverage>
<Enabled>_ 0</Enabled>
</CodeCoverage>
<Stack>
<FillEnabled>0</FillEnabled>
<OverflowWarningsEnabled>1</OverflowWarningsEnabled>
<WarningThreshold>90</WarningThreshold>
<SpWarningsEnabled>1</SpWarningsEnabled>
<WarnLogOnly>1</WarnLogOnly>
<UseTrigger>1</UseTrigger>
<TriggerName>main</TriggerName>
<LimitSize>0</LimitSize>
<ByteLimit>50</ByteLimit>
</Stack>
<CallStack>
<ShowArgs>0</ShowArgs>
</CallStack>
<JLinkDriver>
<CStepIntDis>_ 0</CStepIntDis>
<LeaveTargetRunning>_ 0</LeaveTargetRunning>
</JLinkDriver>
<SWOTraceHWSettings>
<OverrideDefaultClocks>1</OverrideDefaultClocks>
<CpuClock>6000000</CpuClock>
<ClockAutoDetect>0</ClockAutoDetect>
<ClockWanted>1000000</ClockWanted>
<JtagSpeed>1000000</JtagSpeed>
<Prescaler>6</Prescaler>
<TimeStampPrescIndex>0</TimeStampPrescIndex>
<TimeStampPrescData>0</TimeStampPrescData>
<PcSampCYCTAP>1</PcSampCYCTAP>
<PcSampPOSTCNT>15</PcSampPOSTCNT>
<PcSampIndex>0</PcSampIndex>
<DataLogMode>0</DataLogMode>
<ITMportsEnable>1</ITMportsEnable>
<ITMportsTermIO>1</ITMportsTermIO>
<ITMportsLogFile>1</ITMportsLogFile>
<ITMlogFile>$PROJ_DIR$\ITM.log</ITMlogFile>
</SWOTraceHWSettings>
<SfrWindow>
<Show>1 1</Show>
<Sort>4 0</Sort>
</SfrWindow>
<Disassembly>
<InstrCount>0</InstrCount>
<MixedMode>1</MixedMode>
</Disassembly>
<Interrupts>
<Enabled>1</Enabled>
</Interrupts>
<MemConfig>
<Base>1</Base>
<Manual>0</Manual>
<Ddf>1</Ddf>
<TypeViol>0</TypeViol>
<Stop>1</Stop>
</MemConfig>
<Simulator>
<Freq>10000000</Freq>
<FreqHi>0</FreqHi>
<MultiCoreRunAll>1</MultiCoreRunAll>
</Simulator>
<Trace1>
<Enabled>0</Enabled>
<ShowSource>1</ShowSource>
</Trace1>
<Trace2>
<Enabled>0</Enabled>
<ShowSource>0</ShowSource>
</Trace2>
<SWOTraceWindow>
<PcSampling>0</PcSampling>
<InterruptLogs>0</InterruptLogs>
<ForcedTimeStamps>0</ForcedTimeStamps>
<EventCPI>0</EventCPI>
<EventEXC>0</EventEXC>
<EventFOLD>0</EventFOLD>
<EventLSU>0</EventLSU>
<EventSLEEP>0</EventSLEEP>
</SWOTraceWindow>
<PowerLog>
<Title_0>I0</Title_0>
<Symbol_0>0 4 0</Symbol_0>
<LogEnabled>0</LogEnabled>
<GraphEnabled>0</GraphEnabled>
<ShowTimeLog>1</ShowTimeLog>
<LiveEnabled>0</LiveEnabled>
<LiveFile>PowerLogLive.log</LiveFile>
</PowerLog>
<DataLog>
<LogEnabled>0</LogEnabled>
<GraphEnabled>0</GraphEnabled>
<ShowTimeLog>1</ShowTimeLog>
<SumEnabled>0</SumEnabled>
<ShowTimeSum>1</ShowTimeSum>
</DataLog>
<InterruptLog>
<LogEnabled>0</LogEnabled>
<GraphEnabled>0</GraphEnabled>
<ShowTimeLog>1</ShowTimeLog>
<SumEnabled>0</SumEnabled>
<ShowTimeSum>1</ShowTimeSum>
<SumSortOrder>0</SumSortOrder>
</InterruptLog>
<EventLog>
<Title_0>Ch3</Title_0>
<Symbol_0>0 0 1</Symbol_0>
<Title_1>Ch2</Title_1>
<Symbol_1>0 0 1</Symbol_1>
<Title_2>Ch1</Title_2>
<Symbol_2>0 0 1</Symbol_2>
<Title_3>Ch0</Title_3>
<Symbol_3>0 0 1</Symbol_3>
<LogEnabled>0</LogEnabled>
<GraphEnabled>0</GraphEnabled>
<ShowTimeLog>1</ShowTimeLog>
<SumEnabled>0</SumEnabled>
<ShowTimeSum>1</ShowTimeSum>
<SumSortOrder>0</SumSortOrder>
</EventLog>
<LogFile>
<LoggingEnabled>_ 0</LoggingEnabled>
<LogFile>_ ""</LogFile>
<Category>_ 0</Category>
</LogFile>
<TermIOLog>
<LoggingEnabled>_ 0</LoggingEnabled>
<LogFile>_ ""</LogFile>
</TermIOLog>
<DriverProfiling>
<Enabled>0</Enabled>
<Mode>1</Mode>
<Graph>0</Graph>
<Symbiont>0</Symbiont>
<Exclusions />
</DriverProfiling>
<CallStackLog>
<Enabled>0</Enabled>
</CallStackLog>
<CallStackStripe>
<ShowTiming>1</ShowTiming>
</CallStackStripe>
<PowerProbe>
<Frequency>10000</Frequency>
<Probe0>I0</Probe0>
<ProbeSetup0>2 1 1 2 0 0</ProbeSetup0>
</PowerProbe>
<DisassembleMode>
<mode>0</mode>
</DisassembleMode>
<Breakpoints2>
<Count>0</Count>
</Breakpoints2>
<Aliases>
<Count>0</Count>
<SuppressDialog>0</SuppressDialog>
</Aliases>
</settings>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/iar/settings/ble_freertos_ancs_Debug.jlink
+39
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@@ -0,0 +1,39 @@
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
MonModeVTableAddr = 0xFFFFFFFF
MonModeDebug = 0
MaxNumAPs = 0
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile="AMA3B1KK-KBR.JLinkScript"
[FLASH]
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 1
Device="AMA3B1KK-KBR"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/iar/startup_iar.c
+398
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@@ -0,0 +1,398 @@
//*****************************************************************************
//
//! @file startup_iar.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Enable the IAR extensions for this source file.
//
//*****************************************************************************
#pragma language = extended
//*****************************************************************************
//
// Weak function links.
//
//*****************************************************************************
#pragma weak MemManage_Handler = HardFault_Handler
#pragma weak BusFault_Handler = HardFault_Handler
#pragma weak UsageFault_Handler = HardFault_Handler
#pragma weak SecureFault_Handler = HardFault_Handler
#pragma weak SVC_Handler = am_default_isr
#pragma weak DebugMon_Handler = am_default_isr
#pragma weak PendSV_Handler = am_default_isr
#pragma weak SysTick_Handler = am_default_isr
#pragma weak am_brownout_isr = am_default_isr
#pragma weak am_watchdog_isr = am_default_isr
#pragma weak am_rtc_isr = am_default_isr
#pragma weak am_vcomp_isr = am_default_isr
#pragma weak am_ioslave_ios_isr = am_default_isr
#pragma weak am_ioslave_acc_isr = am_default_isr
#pragma weak am_iomaster0_isr = am_default_isr
#pragma weak am_iomaster1_isr = am_default_isr
#pragma weak am_iomaster2_isr = am_default_isr
#pragma weak am_iomaster3_isr = am_default_isr
#pragma weak am_iomaster4_isr = am_default_isr
#pragma weak am_iomaster5_isr = am_default_isr
#pragma weak am_ble_isr = am_default_isr
#pragma weak am_gpio_isr = am_default_isr
#pragma weak am_ctimer_isr = am_default_isr
#pragma weak am_uart_isr = am_default_isr
#pragma weak am_uart1_isr = am_default_isr
#pragma weak am_scard_isr = am_default_isr
#pragma weak am_adc_isr = am_default_isr
#pragma weak am_pdm0_isr = am_default_isr
#pragma weak am_mspi0_isr = am_default_isr
#pragma weak am_software0_isr = am_default_isr
#pragma weak am_stimer_isr = am_default_isr
#pragma weak am_stimer_cmpr0_isr = am_default_isr
#pragma weak am_stimer_cmpr1_isr = am_default_isr
#pragma weak am_stimer_cmpr2_isr = am_default_isr
#pragma weak am_stimer_cmpr3_isr = am_default_isr
#pragma weak am_stimer_cmpr4_isr = am_default_isr
#pragma weak am_stimer_cmpr5_isr = am_default_isr
#pragma weak am_stimer_cmpr6_isr = am_default_isr
#pragma weak am_stimer_cmpr7_isr = am_default_isr
#pragma weak am_flash_isr = am_default_isr
#pragma weak am_clkgen_isr = am_default_isr
//*****************************************************************************
//
// Forward declaration of the default fault handlers.
//
//*****************************************************************************
extern __stackless void Reset_Handler(void);
extern __weak void NMI_Handler(void);
extern __weak void HardFault_Handler(void);
extern void MemManage_Handler(void);
extern void BusFault_Handler(void);
extern void UsageFault_Handler(void);
extern void SecureFault_Handler(void);
extern void SVC_Handler(void);
extern void DebugMon_Handler(void);
extern void PendSV_Handler(void);
extern void SysTick_Handler(void);
extern void am_brownout_isr(void);
extern void am_watchdog_isr(void);
extern void am_rtc_isr(void);
extern void am_vcomp_isr(void);
extern void am_ioslave_ios_isr(void);
extern void am_ioslave_acc_isr(void);
extern void am_iomaster0_isr(void);
extern void am_iomaster1_isr(void);
extern void am_iomaster2_isr(void);
extern void am_iomaster3_isr(void);
extern void am_iomaster4_isr(void);
extern void am_iomaster5_isr(void);
extern void am_ble_isr(void);
extern void am_gpio_isr(void);
extern void am_ctimer_isr(void);
extern void am_uart_isr(void);
extern void am_uart1_isr(void);
extern void am_scard_isr(void);
extern void am_adc_isr(void);
extern void am_pdm0_isr(void);
extern void am_mspi0_isr(void);
extern void am_software0_isr(void);
extern void am_stimer_isr(void);
extern void am_stimer_cmpr0_isr(void);
extern void am_stimer_cmpr1_isr(void);
extern void am_stimer_cmpr2_isr(void);
extern void am_stimer_cmpr3_isr(void);
extern void am_stimer_cmpr4_isr(void);
extern void am_stimer_cmpr5_isr(void);
extern void am_stimer_cmpr6_isr(void);
extern void am_stimer_cmpr7_isr(void);
extern void am_flash_isr(void);
extern void am_clkgen_isr(void);
extern void am_default_isr(void);
//*****************************************************************************
//
// The entry point for the application startup code.
//
//*****************************************************************************
extern void __iar_program_start(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
static uint32_t pui32Stack[0xac0] @ ".stack";
//*****************************************************************************
//
// A union that describes the entries of the vector table. The union is needed
// since the first entry is the stack pointer and the remainder are function
// pointers.
//
//*****************************************************************************
typedef union
{
void (*pfnHandler)(void);
uint32_t ui32Ptr;
}
uVectorEntry;
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__root const uVectorEntry __vector_table[] @ ".intvec" =
{
{ .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) },
// The initial stack pointer
Reset_Handler, // The reset handler
NMI_Handler, // The NMI handler
HardFault_Handler, // The hard fault handler
MemManage_Handler, // The MemManage_Handler
BusFault_Handler, // The BusFault_Handler
UsageFault_Handler, // The UsageFault_Handler
SecureFault_Handler, // The SecureFault_Handler
0, // Reserved
0, // Reserved
0, // Reserved
SVC_Handler, // SVCall handler
DebugMon_Handler, // Debug monitor handler
0, // Reserved
PendSV_Handler, // The PendSV handler
SysTick_Handler, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout (rstgen)
am_watchdog_isr, // 1: Watchdog
am_rtc_isr, // 2: RTC
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_iomaster2_isr, // 8: I/O Master 2
am_iomaster3_isr, // 9: I/O Master 3
am_iomaster4_isr, // 10: I/O Master 4
am_iomaster5_isr, // 11: I/O Master 5
am_ble_isr, // 12: BLEIF
am_gpio_isr, // 13: GPIO
am_ctimer_isr, // 14: CTIMER
am_uart_isr, // 15: UART0
am_uart1_isr, // 16: UART1
am_scard_isr, // 17: SCARD
am_adc_isr, // 18: ADC
am_pdm0_isr, // 19: PDM
am_mspi0_isr, // 20: MSPI0
am_software0_isr, // 21: SOFTWARE0
am_stimer_isr, // 22: SYSTEM TIMER
am_stimer_cmpr0_isr, // 23: SYSTEM TIMER COMPARE0
am_stimer_cmpr1_isr, // 24: SYSTEM TIMER COMPARE1
am_stimer_cmpr2_isr, // 25: SYSTEM TIMER COMPARE2
am_stimer_cmpr3_isr, // 26: SYSTEM TIMER COMPARE3
am_stimer_cmpr4_isr, // 27: SYSTEM TIMER COMPARE4
am_stimer_cmpr5_isr, // 28: SYSTEM TIMER COMPARE5
am_stimer_cmpr6_isr, // 29: SYSTEM TIMER COMPARE6
am_stimer_cmpr7_isr, // 30: SYSTEM TIMER COMPARE7
am_clkgen_isr, // 31: CLKGEN
};
//******************************************************************************
//
// Place code immediately following vector table.
//
//******************************************************************************
//******************************************************************************
//
// The Patch table.
//
// The patch table should pad the vector table size to a total of 64 entries
// (16 core + 48 periph) such that code begins at offset 0x100.
//
//******************************************************************************
__root const uint32_t __Patchable[] @ ".patch" =
{
0, // 32
0, // 33
0, // 34
0, // 35
0, // 36
0, // 37
0, // 38
0, // 39
0, // 40
0, // 41
0, // 42
0, // 43
0, // 44
0, // 45
0, // 46
0, // 47
};
//*****************************************************************************
//
// Note - The template for this function is originally found in IAR's module,
// low_level_init.c. As supplied by IAR, it is an empty function.
//
// This module contains the function `__low_level_init', a function
// that is called before the `main' function of the program. Normally
// low-level initializations - such as setting the prefered interrupt
// level or setting the watchdog - can be performed here.
//
// Note that this function is called before the data segments are
// initialized, this means that this function cannot rely on the
// values of global or static variables.
//
// When this function returns zero, the startup code will inhibit the
// initialization of the data segments. The result is faster startup,
// the drawback is that neither global nor static data will be
// initialized.
//
// Copyright 1999-2017 IAR Systems AB.
//
// $Revision: 112610 $
//
//
//
//
//*****************************************************************************
#define AM_REGVAL(x) (*((volatile uint32_t *)(x)))
#define VTOR_ADDR 0xE000ED08
__interwork int __low_level_init(void)
{
AM_REGVAL(VTOR_ADDR) = (uint32_t)&__vector_table;
/*==================================*/
/* Choose if segment initialization */
/* should be done or not. */
/* Return: 0 to omit seg_init */
/* 1 to run seg_init */
/*==================================*/
return 1;
}
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
void
Reset_Handler(void)
{
//
// Call the application's entry point.
//
__iar_program_start();
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
__weak void
NMI_Handler(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
__weak void
HardFault_Handler(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
static void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/keil/Dbg_RAM.ini
+55
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@@ -0,0 +1,55 @@
/*----------------------------------------------------------------------------
* Name: Dbg_RAM.ini
* Purpose: RAM Debug Initialization File
* Note(s):
*----------------------------------------------------------------------------
* This file is part of the uVision/ARM development tools.
* This software may only be used under the terms of a valid, current,
* end user licence from KEIL for a compatible version of KEIL software
* development tools. Nothing else gives you the right to use this software.
*
* This software is supplied "AS IS" without warranties of any kind.
*
* Copyright (c) 2008-2013 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
TraceSetup() Turn on ITM clocks, etc.
*----------------------------------------------------------------------------*/
FUNC void TraceSetup (void)
{
// turn on the ITM/TPIU clock
//_WDWORD(0x40020250, 0x00000201); // TPIU clock enabled at 3MHz
}
/*----------------------------------------------------------------------------
Setup() configure PC & SP for RAM Debug
*----------------------------------------------------------------------------*/
FUNC void Setup (void) {
SP = _RDWORD(0x0000C000+0x0); // Setup Stack Pointer
PC = _RDWORD(0x0000C000+0x4); // Setup Program Counter
_WDWORD(0xE000ED08, 0x0000C000+0x0); // Setup Vector Table Offset Register (done in system file)
}
/*----------------------------------------------------------------------------
OnResetExec() executed after reset via uVision's 'Reset'-button
*----------------------------------------------------------------------------*/
FUNC void OnResetExec (void)
{
}
LOAD %L INCREMENTAL // load the application
Setup(); // Setup for Running
BS main
g
/*----------------------------------------------------------------------------
*----------------------------------------------------------------------------*/
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/keil/JLinkSettings.ini
+40
View File
@@ -0,0 +1,40 @@
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
MonModeVTableAddr = 0xFFFFFFFF
MonModeDebug = 0
MaxNumAPs = 0
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
; ScriptFile="AMAPH1KK-KBR.JLinkScript"
[FLASH]
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 1
Device="AMA3B1KK-KBR"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/keil/Makefile
+80
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@@ -0,0 +1,80 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := ble_freertos_ancs
COMPILERNAME := Keil
PROJECT := ble_freertos_ancs_Keil
CONFIG := bin
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p UV4.exe)
RM := $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
UV4.exe -b -t "ble_freertos_ancs" ble_freertos_ancs.uvprojx -j0 || [ $$? -eq 1 ]
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
$(RM) -rf $(CONFIG)
../../../../../mcu/apollo3/hal/keil/bin/libam_hal.lib:
$(MAKE) -C ../../../../../mcu/apollo3/hal
../../../bsp/keil/bin/libam_bsp.lib:
$(MAKE) -C ../../../bsp
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/keil/bin/ble_freertos_ancs.txt
+49267
View File
File diff suppressed because it is too large Load Diff
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/keil/ble_freertos_ancs.sct
+60
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@@ -0,0 +1,60 @@
;******************************************************************************
;
; ble_freertos_ancs.sct
;
; Scatter file for Keil linker configuration.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
LR_1 0x0000C000
{
FLASH 0x0000C000 0x000F0000
{
*.o (RESET, +First)
* (+RO)
}
SRAM 0x10000000 0x00060000
{
startup_keil.o (STACK, +First)
* (+RW, +ZI)
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/keil/ble_freertos_ancs.uvoptx
+3108
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File diff suppressed because it is too large Load Diff
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/keil/ble_freertos_ancs.uvprojx
+1395
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/keil/startup_keil.s
+408
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@@ -0,0 +1,408 @@
;******************************************************************************
;
;! @file startup_keil.s
;!
;! @brief Definitions for Apollo3 interrupt handlers, the vector table, and the stack.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
;******************************************************************************
;
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;************************************************************************
Stack EQU 0x00002B00
;******************************************************************************
;
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;
;******************************************************************************
Heap EQU 0x00000000
;******************************************************************************
;
; Allocate space for the stack.
;
;******************************************************************************
AREA STACK, NOINIT, READWRITE, ALIGN=3
StackMem
SPACE Stack
__initial_sp
;******************************************************************************
;
; Allocate space for the heap.
;
;******************************************************************************
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
HeapMem
SPACE Heap
__heap_limit
;******************************************************************************
;
; Indicate that the code in this file preserves 8-byte alignment of the stack.
;
;******************************************************************************
PRESERVE8
;******************************************************************************
;
; Place code into the reset code section.
;
;******************************************************************************
AREA RESET, CODE, READONLY
THUMB
;******************************************************************************
;
; The vector table.
;
;******************************************************************************
;
; Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
; am_usagefault_isr does not work if am_fault_isr is defined externally.
; Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
;
EXPORT __Vectors
__Vectors
DCD StackMem + Stack ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; The MPU fault handler
DCD BusFault_Handler ; The bus fault handler
DCD UsageFault_Handler ; The usage fault handler
DCD SecureFault_Handler ; Secure fault handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall handler
DCD DebugMon_Handler ; Debug monitor handler
DCD 0 ; Reserved
DCD PendSV_Handler ; The PendSV handler
DCD SysTick_Handler ; The SysTick handler
;
; Peripheral Interrupts
;
DCD am_brownout_isr ; 0: Reserved
DCD am_watchdog_isr ; 1: Reserved
DCD am_rtc_isr ; 2: RTC
DCD am_vcomp_isr ; 3: Voltage Comparator
DCD am_ioslave_ios_isr ; 4: I/O Slave general
DCD am_ioslave_acc_isr ; 5: I/O Slave access
DCD am_iomaster0_isr ; 6: I/O Master 0
DCD am_iomaster1_isr ; 7: I/O Master 1
DCD am_iomaster2_isr ; 8: I/O Master 2
DCD am_iomaster3_isr ; 9: I/O Master 3
DCD am_iomaster4_isr ; 10: I/O Master 4
DCD am_iomaster5_isr ; 11: I/O Master 5
DCD am_ble_isr ; 12: BLEIF
DCD am_gpio_isr ; 13: GPIO
DCD am_ctimer_isr ; 14: CTIMER
DCD am_uart_isr ; 15: UART0
DCD am_uart1_isr ; 16: UART1
DCD am_scard_isr ; 17: SCARD
DCD am_adc_isr ; 18: ADC
DCD am_pdm0_isr ; 19: PDM
DCD am_mspi0_isr ; 20: MSPI0
DCD am_software0_isr ; 21: SOFTWARE0
DCD am_stimer_isr ; 22: SYSTEM TIMER
DCD am_stimer_cmpr0_isr ; 23: SYSTEM TIMER COMPARE0
DCD am_stimer_cmpr1_isr ; 24: SYSTEM TIMER COMPARE1
DCD am_stimer_cmpr2_isr ; 25: SYSTEM TIMER COMPARE2
DCD am_stimer_cmpr3_isr ; 26: SYSTEM TIMER COMPARE3
DCD am_stimer_cmpr4_isr ; 27: SYSTEM TIMER COMPARE4
DCD am_stimer_cmpr5_isr ; 28: SYSTEM TIMER COMPARE5
DCD am_stimer_cmpr6_isr ; 29: SYSTEM TIMER COMPARE6
DCD am_stimer_cmpr7_isr ; 30: SYSTEM TIMER COMPARE7
DCD am_clkgen_isr ; 31: CLKGEN
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
;******************************************************************************
;
; Place code immediately following vector table.
;
;******************************************************************************
;******************************************************************************
;
; The Patch table.
;
; The patch table should pad the vector table size to a total of 64 entries
; (16 core + 48 periph) such that code begins at offset 0x100.
;
;******************************************************************************
EXPORT __Patchable
__Patchable
DCD 0 ; 32
DCD 0 ; 33
DCD 0 ; 34
DCD 0 ; 35
DCD 0 ; 36
DCD 0 ; 37
DCD 0 ; 38
DCD 0 ; 39
DCD 0 ; 40
DCD 0 ; 41
DCD 0 ; 42
DCD 0 ; 43
DCD 0 ; 44
DCD 0 ; 45
DCD 0 ; 46
DCD 0 ; 47
;******************************************************************************
;
; This is the code that gets called when the processor first starts execution
; following a reset event.
;
;******************************************************************************
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
;
; Enable the FPU.
;
MOVW R0, #0xED88
MOVT R0, #0xE000
LDR R1, [R0]
ORR R1, #0x00F00000
STR R1, [R0]
DSB
ISB
;
; Branch to main.
;
LDR R0, =__main
BX R0
ENDP
;******************************************************************************
;
; Weak Exception Handlers.
;
;******************************************************************************
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SecureFault_Handler\
PROC
EXPORT SecureFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
am_default_isr\
PROC
EXPORT am_brownout_isr [WEAK]
EXPORT am_watchdog_isr [WEAK]
EXPORT am_rtc_isr [WEAK]
EXPORT am_vcomp_isr [WEAK]
EXPORT am_ioslave_ios_isr [WEAK]
EXPORT am_ioslave_acc_isr [WEAK]
EXPORT am_iomaster0_isr [WEAK]
EXPORT am_iomaster1_isr [WEAK]
EXPORT am_iomaster2_isr [WEAK]
EXPORT am_iomaster3_isr [WEAK]
EXPORT am_iomaster4_isr [WEAK]
EXPORT am_iomaster5_isr [WEAK]
EXPORT am_ble_isr [WEAK]
EXPORT am_gpio_isr [WEAK]
EXPORT am_ctimer_isr [WEAK]
EXPORT am_uart_isr [WEAK]
EXPORT am_uart0_isr [WEAK]
EXPORT am_uart1_isr [WEAK]
EXPORT am_scard_isr [WEAK]
EXPORT am_adc_isr [WEAK]
EXPORT am_pdm0_isr [WEAK]
EXPORT am_mspi0_isr [WEAK]
EXPORT am_software0_isr [WEAK]
EXPORT am_stimer_isr [WEAK]
EXPORT am_stimer_cmpr0_isr [WEAK]
EXPORT am_stimer_cmpr1_isr [WEAK]
EXPORT am_stimer_cmpr2_isr [WEAK]
EXPORT am_stimer_cmpr3_isr [WEAK]
EXPORT am_stimer_cmpr4_isr [WEAK]
EXPORT am_stimer_cmpr5_isr [WEAK]
EXPORT am_stimer_cmpr6_isr [WEAK]
EXPORT am_stimer_cmpr7_isr [WEAK]
EXPORT am_clkgen_isr [WEAK]
am_brownout_isr
am_watchdog_isr
am_rtc_isr
am_vcomp_isr
am_ioslave_ios_isr
am_ioslave_acc_isr
am_iomaster0_isr
am_iomaster1_isr
am_iomaster2_isr
am_iomaster3_isr
am_iomaster4_isr
am_iomaster5_isr
am_ble_isr
am_gpio_isr
am_ctimer_isr
am_uart_isr
am_uart0_isr
am_uart1_isr
am_scard_isr
am_adc_isr
am_pdm0_isr
am_mspi0_isr
am_software0_isr
am_stimer_isr
am_stimer_cmpr0_isr
am_stimer_cmpr1_isr
am_stimer_cmpr2_isr
am_stimer_cmpr3_isr
am_stimer_cmpr4_isr
am_stimer_cmpr5_isr
am_stimer_cmpr6_isr
am_stimer_cmpr7_isr
am_clkgen_isr
; all device interrupts go here unless the weak label is over
; ridden in the linker hard spin so the debugger will know it
; was an unhandled interrupt request a come-from-buffer or
; instruction trace hardware would sure be nice if you get here
B .
ENDP
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; Initialization of the heap and stack.
;
;******************************************************************************
AREA |.text|, CODE, READONLY
;******************************************************************************
;
; User Initial Stack & Heap.
;
;******************************************************************************
IF :DEF: __MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =HeapMem
LDR R1, =(StackMem + Stack)
LDR R2, =(HeapMem + Heap)
LDR R3, =StackMem
BX LR
ENDP
ENDIF
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; All Done
;
;******************************************************************************
END
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/mem_map.yaml
+32
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#******************************************************************************
#
# Memory configuration
#
# This is a configuration file to help you set up consistent linker settings
# across multiple toolchains.
#
#******************************************************************************
MemorySections:
# Default memory region for vector table, code, and read-only data.
ROMEM:
start: 0x0000C000
size: 2000K
# Default memory region for fast-access data
TCM:
start: 0x10000000
size: 64K
# Default memory location for read-write, zero-init, and no-init data.
RWMEM:
start: 0x10010000
end: 0x100C0000
StackOptions:
# Number of bytes to use for the stack.
size: 0x3000
# Should the stack be placed in TCM? If false, the stack will be placed in RWMEM.
place_in_tcm: false
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/src/FreeRTOSConfig.h
+161
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//*****************************************************************************
//
//! @file FreeRTOSConfig.h
//!
//! @brief Configuration options for FreeRTOS
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#ifdef __cplusplus
extern "C"
{
#endif
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#ifdef AM_PART_APOLLO
#define configCPU_CLOCK_HZ 24000000UL
#else
#define configCPU_CLOCK_HZ 48000000UL
#endif
#define configTICK_RATE_HZ 1000
#define configMAX_PRIORITIES 4
#define configMINIMAL_STACK_SIZE (256)
#define configTOTAL_HEAP_SIZE (16 * 1024)
#define configMAX_TASK_NAME_LEN 16
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 0
#define configUSE_RECURSIVE_MUTEXES 0
#define configUSE_COUNTING_SEMAPHORES 0
#define configUSE_ALTERNATIVE_API 0 /* Deprecated! */
#define configQUEUE_REGISTRY_SIZE 0
#define configUSE_QUEUE_SETS 0
#define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 0
/* Hook function related definitions. */
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configUSE_MALLOC_FAILED_HOOK 1
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configUSE_TRACE_FACILITY 0
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY 3
#define configTIMER_QUEUE_LENGTH 5
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Interrupt nesting behaviour configuration. */
#define configKERNEL_INTERRUPT_PRIORITY (0x7 << 5)
#define configMAX_SYSCALL_INTERRUPT_PRIORITY (0x4 << 5)
#define NVIC_configKERNEL_INTERRUPT_PRIORITY (0x7)
#define NVIC_configMAX_SYSCALL_INTERRUPT_PRIORITY (0x4)
/* Define to trap errors during development. */
#define configASSERT(x) if (( x ) == 0) while(1);
/* FreeRTOS MPU specific definitions. */
#define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0
/* Optional functions - most linkers will remove unused functions anyway. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_xResumeFromISR 0
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 0
#define INCLUDE_xTaskGetSchedulerState 0
#define INCLUDE_xTaskGetCurrentTaskHandle 0
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
#define INCLUDE_pcTaskGetTaskName 0
#define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 1
#define INCLUDE_xTimerPendFunctionCall 1
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 1 // Enable non-SysTick based Tick
#define configUSE_TICKLESS_IDLE 2 // Ambiq specific implementation for Tickless
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
extern uint32_t am_freertos_sleep(uint32_t);
extern void am_freertos_wakeup(uint32_t);
#define configPRE_SLEEP_PROCESSING( time ) \
do { \
(time) = am_freertos_sleep(time); \
} while (0);
#define configPOST_SLEEP_PROCESSING(time) am_freertos_wakeup(time)
#endif
/*-----------------------------------------------------------*/
#ifndef AM_PART_APOLLO
#define AM_FREERTOS_USE_STIMER_FOR_TICK
#endif
#ifdef AM_FREERTOS_USE_STIMER_FOR_TICK
#define configSTIMER_CLOCK_HZ 32768
#else // Use CTimer
#define configCTIMER_CLOCK_HZ 32768
#endif
#ifdef __cplusplus
}
#endif
#endif // FREERTOS_CONFIG_H
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/src/ble_freertos_ancs.c
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//*****************************************************************************
//
//! @file ble_freertos_ancs.c
//!
//! @brief ARM Cordio BLE - Apple Notification Center Service (ANCS) Example.
//!
//! Purpose: This example implements a BLE Apple Notification Center Service
//! profile.
//!
//! Printing takes place over the ITM at 1M Baud.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
//*****************************************************************************
//
// This application has a large number of common include files. For
// convenience, we'll collect them all together in a single header and include
// that everywhere.
//
//*****************************************************************************
#include "ble_freertos_ancs.h"
#include "rtos.h"
//*****************************************************************************
//
// Enable printing to the console.
//
//*****************************************************************************
void
enable_print_interface(void)
{
//
// Initialize a debug printing interface.
//
am_bsp_itm_printf_enable();
}
//*****************************************************************************
//
// Main Function
//
//*****************************************************************************
int
main(void)
{
//
// Set the clock frequency
//
am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_SYSCLK_MAX, 0);
//
// Set the default cache configuration
//
am_hal_cachectrl_config(&am_hal_cachectrl_defaults);
am_hal_cachectrl_enable();
#ifndef NOFPU
//
// Enable the floating point module, and configure the core for lazy
// stacking.
//
am_hal_sysctrl_fpu_enable();
am_hal_sysctrl_fpu_stacking_enable(true);
#else
am_hal_sysctrl_fpu_disable();
#endif
//
// Configure the board for low power.
//
am_bsp_low_power_init();
// Turn off unused Flash & SRAM
#ifdef AM_PART_APOLLO
//
// SRAM bank power setting.
// Need to match up with actual SRAM usage for the program
// Current usage is between 32K and 40K - so disabling upper 3 banks
//
am_hal_mcuctrl_sram_power_set(AM_HAL_MCUCTRL_SRAM_POWER_DOWN_5 |
AM_HAL_MCUCTRL_SRAM_POWER_DOWN_6 |
AM_HAL_MCUCTRL_SRAM_POWER_DOWN_7,
AM_HAL_MCUCTRL_SRAM_POWER_DOWN_5 |
AM_HAL_MCUCTRL_SRAM_POWER_DOWN_6 |
AM_HAL_MCUCTRL_SRAM_POWER_DOWN_7);
#if 0 // Not turning off the Flash as it may be needed to download the image
//
// Flash bank power set.
//
am_hal_mcuctrl_flash_power_set(AM_HAL_MCUCTRL_FLASH_POWER_DOWN_1);
#endif
#endif // AM_PART_APOLLO
#ifdef AM_PART_APOLLO2
#if 0 // Not turning off the Flash as it may be needed to download the image
am_hal_pwrctrl_memory_enable(AM_HAL_PWRCTRL_MEMEN_FLASH512K);
#endif
am_hal_pwrctrl_memory_enable(AM_HAL_PWRCTRL_MEMEN_SRAM64K);
#endif // AM_PART_APOLLO2
//
// Enable printing to the console.
//
#ifdef AM_DEBUG_PRINTF
enable_print_interface();
#endif
//
// Initialize plotting interface.
//
am_util_debug_printf("FreeRTOS ANCS Example\n");
//
// Run the application.
//
run_tasks();
//
// We shouldn't ever get here.
//
while (1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/src/ble_freertos_ancs.h
+89
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//*****************************************************************************
//
//! @file freertos_fit.h
//!
//! @brief Global includes for the freertos_fit app.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef FREERTOS_ANCS_H
#define FREERTOS_ANCS_H
//*****************************************************************************
//
// Required built-ins.
//
//*****************************************************************************
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <stdlib.h>
//*****************************************************************************
//
// Standard AmbiqSuite includes.
//
//*****************************************************************************
#include "am_mcu_apollo.h"
#include "am_bsp.h"
#include "am_util.h"
//*****************************************************************************
//
// FreeRTOS include files.
//
//*****************************************************************************
#include "FreeRTOS.h"
#include "task.h"
#include "portmacro.h"
#include "portable.h"
#include "semphr.h"
#include "event_groups.h"
//#include "rtos.h"
//*****************************************************************************
//
// Task include files.
//
//*****************************************************************************
#include "radio_task.h"
#endif // FREERTOS_FIT_H
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/src/hci_apollo_config.h
+77
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//*****************************************************************************
//
//! @file hci_apollo_config.h
//!
//! @brief This file describes the physical aspects of the HCI conection.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
#include "am_bsp.h"
#ifndef HCI_APOLLO_CONFIG_H
#define HCI_APOLLO_CONFIG_H
//*****************************************************************************
//
// Pin numbers and configuration.
//
// NOTE: RTS, CTS, and RESET are implemented as GPIOs, so no "CFG" field is
// needed.
//
//*****************************************************************************
//#define HCI_APOLLO_POWER_PIN AM_BSP_GPIO_EM9304_POWER
//#define HCI_APOLLO_POWER_CFG AM_BSP_GPIO_CFG_EM9304_POWER
#define HCI_APOLLO_RESET_PIN AM_BSP_GPIO_EM9304_RESET
//*****************************************************************************
//
// Other options.
//
// These options are provided in case your board setup is a little more
// unusual. Most boards shouldn't need these features. If in doubt, leave all
// of these features disabled.
//
//*****************************************************************************
#define HCI_APOLLO_CFG_OVERRIDE_ISR 1 // Override the exactle UART ISR
#endif // HCI_APOLLO_CONFIG_H
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/src/radio_task.c
+319
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//*****************************************************************************
//
//! @file radio_task.c
//!
//! @brief Task to handle radio operation.
//!
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
//*****************************************************************************
//
// Global includes for this project.
//
//*****************************************************************************
#include "ble_freertos_ancs.h"
//*****************************************************************************
//
// WSF standard includes.
//
//*****************************************************************************
#include "wsf_types.h"
#include "wsf_trace.h"
#include "wsf_buf.h"
#include "wsf_timer.h"
//*****************************************************************************
//
// Includes for operating the ExactLE stack.
//
//*****************************************************************************
#include "hci_handler.h"
#include "dm_handler.h"
#include "l2c_handler.h"
#include "att_handler.h"
#include "smp_handler.h"
#include "l2c_api.h"
#include "att_api.h"
#include "smp_api.h"
#include "app_api.h"
#include "hci_core.h"
#include "hci_drv.h"
#include "hci_drv_apollo.h"
#include "hci_drv_apollo3.h"
#include "hci_apollo_config.h"
#include "wsf_msg.h"
//*****************************************************************************
//
// Includes for the ExactLE "fit" profile.
//
//*****************************************************************************
#include "ancs_api.h"
#include "ancc_api.h"
#include "app_ui.h"
//*****************************************************************************
//
// Radio task handle.
//
//*****************************************************************************
TaskHandle_t radio_task_handle;
//*****************************************************************************
//
// Function prototypes
//
//*****************************************************************************
void exactle_stack_init(void);
//*****************************************************************************
//
// WSF buffer pools.
//
//*****************************************************************************
#define WSF_BUF_POOLS 4
// Important note: the size of g_pui32BufMem should includes both overhead of internal
// buffer management structure, wsfBufPool_t (up to 16 bytes for each pool), and pool
// description (e.g. g_psPoolDescriptors below).
// Memory for the buffer pool
// extra AMOTA_PACKET_SIZE bytes for OTA handling
static uint32_t g_pui32BufMem[
(WSF_BUF_POOLS*16
+ 16*8 + 32*4 + 64*6 + 280*8) / sizeof(uint32_t)];
// Default pool descriptor.
static wsfBufPoolDesc_t g_psPoolDescriptors[WSF_BUF_POOLS] =
{
{ 16, 8 },
{ 32, 4 },
{ 64, 6 },
{ 280, 8 }
};
//*****************************************************************************
//
// Tracking variable for the scheduler timer.
//
//*****************************************************************************
void radio_timer_handler(void);
//*****************************************************************************
//
// Initialization for the ExactLE stack.
//
//*****************************************************************************
void
exactle_stack_init(void)
{
wsfHandlerId_t handlerId;
uint16_t wsfBufMemLen;
//
// Set up timers for the WSF scheduler.
//
WsfOsInit();
WsfTimerInit();
//
// Initialize a buffer pool for WSF dynamic memory needs.
//
wsfBufMemLen = WsfBufInit(sizeof(g_pui32BufMem), (uint8_t *)g_pui32BufMem, WSF_BUF_POOLS,
g_psPoolDescriptors);
if (wsfBufMemLen > sizeof(g_pui32BufMem))
{
am_util_debug_printf("Memory pool is too small by %d\r\n",
wsfBufMemLen - sizeof(g_pui32BufMem));
}
//
// Initialize the WSF security service.
//
SecInit();
SecAesInit();
SecCmacInit();
SecEccInit();
//
// Set up callback functions for the various layers of the ExactLE stack.
//
handlerId = WsfOsSetNextHandler(HciHandler);
HciHandlerInit(handlerId);
handlerId = WsfOsSetNextHandler(DmHandler);
DmDevVsInit(0);
DmAdvInit();
DmConnInit();
DmConnSlaveInit();
DmSecInit();
DmSecLescInit();
DmPrivInit();
DmHandlerInit(handlerId);
handlerId = WsfOsSetNextHandler(L2cSlaveHandler);
L2cSlaveHandlerInit(handlerId);
L2cInit();
L2cSlaveInit();
handlerId = WsfOsSetNextHandler(AttHandler);
AttHandlerInit(handlerId);
AttsInit();
AttsIndInit();
AttcInit();
handlerId = WsfOsSetNextHandler(SmpHandler);
SmpHandlerInit(handlerId);
SmprInit();
SmprScInit();
HciSetMaxRxAclLen(251);
handlerId = WsfOsSetNextHandler(AppHandler);
AppHandlerInit(handlerId);
handlerId = WsfOsSetNextHandler(AncsHandler);
AncsHandlerInit(handlerId);
handlerId = WsfOsSetNextHandler(HciDrvHandler);
HciDrvHandlerInit(handlerId);
}
//*****************************************************************************
//
// UART interrupt handler.
//
//*****************************************************************************
void
am_uart_isr(void)
{
uint32_t ui32Status;
//
// Read and save the interrupt status, but clear out the status register.
//
ui32Status = UARTn(0)->MIS;
UARTn(0)->IEC = ui32Status;
//
// Allow the HCI driver to respond to the interrupt.
//
//HciDrvUartISR(ui32Status);
// Signal radio task to run
WsfTaskSetReady(0, 0);
}
//*****************************************************************************
//
// Interrupt handler for BLE
//
//*****************************************************************************
void
am_ble_isr(void)
{
HciDrvIntService();
// Signal radio task to run
WsfTaskSetReady(0, 0);
}
//*****************************************************************************
//
// Perform initial setup for the radio task.
//
//*****************************************************************************
void
RadioTaskSetup(void)
{
am_util_debug_printf("RadioTask: setup\r\n");
NVIC_SetPriority(BLE_IRQn, NVIC_configMAX_SYSCALL_INTERRUPT_PRIORITY);
//
// Boot the radio.
//
HciDrvRadioBoot(1);
}
//*****************************************************************************
//
// Short Description.
//
//*****************************************************************************
void
RadioTask(void *pvParameters)
{
#if WSF_TRACE_ENABLED == TRUE
//
// Enable ITM
//
am_util_debug_printf("Starting wicentric trace:\n\n");
#endif
//
// Initialize the main ExactLE stack.
//
exactle_stack_init();
//
// Start the "Ancs" profile.
//
AncsStart();
while (1)
{
//
// Calculate the elapsed time from our free-running timer, and update
// the software timers in the WSF scheduler.
//
wsfOsDispatcher();
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/src/radio_task.h
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//*****************************************************************************
//
//! @file radio_task.h
//!
//! @brief Functions and variables related to the radio task.
//!
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef RADIO_TASK_H
#define RADIO_TASK_H
//*****************************************************************************
//
// Radio task handle.
//
//*****************************************************************************
extern TaskHandle_t radio_task_handle;
//*****************************************************************************
//
// External function definitions.
//
//*****************************************************************************
extern void RadioTaskSetup(void);
extern void RadioTask(void *pvParameters);
#endif // RADIO_TASK_H
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/src/rtos.c
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//*****************************************************************************
//
//! @file rtos.c
//!
//! @brief Essential functions to make the RTOS run correctly.
//!
//! These functions are required by the RTOS for ticking, sleeping, and basic
//! error checking.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
#include "am_bsp.h"
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"
#include "portmacro.h"
#include "portable.h"
#include "ble_freertos_ancs.h"
//*****************************************************************************
//
// Task handle for the initial setup task.
//
//*****************************************************************************
TaskHandle_t xSetupTask;
//*****************************************************************************
//
// Interrupt handler for the CTIMER module.
//
//*****************************************************************************
void
am_ctimer_isr(void)
{
uint32_t ui32Status;
//
// Check the timer interrupt status.
//
ui32Status = am_hal_ctimer_int_status_get(false);
am_hal_ctimer_int_clear(ui32Status);
//
// Run handlers for the various possible timer events.
//
am_hal_ctimer_int_service(ui32Status);
}
//*****************************************************************************
//
// Sleep function called from FreeRTOS IDLE task.
// Do necessary application specific Power down operations here
// Return 0 if this function also incorporates the WFI, else return value same
// as idleTime
//
//*****************************************************************************
uint32_t am_freertos_sleep(uint32_t idleTime)
{
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
return 0;
}
//*****************************************************************************
//
// Recovery function called from FreeRTOS IDLE task, after waking up from Sleep
// Do necessary 'wakeup' operations here, e.g. to power up/enable peripherals etc.
//
//*****************************************************************************
void am_freertos_wakeup(uint32_t idleTime)
{
return;
}
//*****************************************************************************
//
// FreeRTOS debugging functions.
//
//*****************************************************************************
void
vApplicationMallocFailedHook(void)
{
//
// Called if a call to pvPortMalloc() fails because there is insufficient
// free memory available in the FreeRTOS heap. pvPortMalloc() is called
// internally by FreeRTOS API functions that create tasks, queues, software
// timers, and semaphores. The size of the FreeRTOS heap is set by the
// configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h.
//
while (1);
}
void
vApplicationStackOverflowHook(TaskHandle_t pxTask, char *pcTaskName)
{
(void) pcTaskName;
(void) pxTask;
//
// Run time stack overflow checking is performed if
// configconfigCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook
// function is called if a stack overflow is detected.
//
while (1)
{
__asm("BKPT #0\n") ; // Break into the debugger
}
}
extern bool ancsRejectCall(void);
void TestTask(void *pvParameters)
{
TickType_t xLastWakeTime;
#if defined(AM_BSP_NUM_BUTTONS)
static uint32_t tm_cnt;
am_hal_gpio_pinconfig(AM_BSP_GPIO_BUTTON2, g_AM_BSP_GPIO_BUTTON2);
#endif
xLastWakeTime = xTaskGetTickCount();
while (1)
{
#if defined(AM_BSP_NUM_BUTTONS)
if ( !am_hal_gpio_input_read(AM_BSP_GPIO_BUTTON2) )
{
if (++tm_cnt > 5)
{
tm_cnt = 0;
//am_util_debug_printf("key press\r\n");
ancsRejectCall();
}
}
else
{
tm_cnt = 0;
}
#endif
vTaskDelayUntil( &xLastWakeTime, pdMS_TO_TICKS( 20 ) );
}
}
//*****************************************************************************
//
// High priority task to run immediately after the scheduler starts.
//
// This task is used for any global initialization that must occur after the
// scheduler starts, but before any functional tasks are running. This can be
// useful for enabling events, semaphores, and other global, RTOS-specific
// features.
//
//*****************************************************************************
void
setup_task(void *pvParameters)
{
//
// Print a debug message.
//
am_util_debug_printf("Running setup tasks...\r\n");
//
// Run setup functions.
//
RadioTaskSetup();
//
// Create the functional tasks
//
xTaskCreate(RadioTask, "RadioTask", 512, 0, 3, &radio_task_handle);
xTaskCreate(TestTask, "TestTask", 128, 0, 2, NULL);
//
// The setup operations are complete, so suspend the setup task now.
//
vTaskSuspend(NULL);
while (1);
}
//*****************************************************************************
//
// Initializes all tasks
//
//*****************************************************************************
void
run_tasks(void)
{
//
// Set some interrupt priorities before we create tasks or start the scheduler.
//
// Note: Timer priority is handled by the FreeRTOS kernel, so we won't
// touch it here.
//
//
// Create essential tasks.
//
xTaskCreate(setup_task, "Setup", 512, 0, 3, &xSetupTask);
//
// Start the scheduler.
//
vTaskStartScheduler();
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo3_evb/examples/ble_freertos_ancs/src/rtos.h
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//*****************************************************************************
//
//! @file rtos.h
//!
//! @brief Essential functions to make the RTOS run
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef RTOS_H
#define RTOS_H
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Macro definitions
//
//*****************************************************************************
// External variable definitions
//
//*****************************************************************************
//*****************************************************************************
//
// External function definitions
//
//*****************************************************************************
void run_tasks(void);
#ifdef __cplusplus
}
#endif
#endif // RTOS_H