initial commit
This commit is contained in:
@@ -0,0 +1,80 @@
|
||||
#******************************************************************************
|
||||
#
|
||||
# Makefile - Rules for building the libraries, examples and docs.
|
||||
#
|
||||
# Copyright (c) 2020, Ambiq Micro
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright notice,
|
||||
# this list of conditions and the following disclaimer.
|
||||
#
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# 3. Neither the name of the copyright holder nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from this
|
||||
# software without specific prior written permission.
|
||||
#
|
||||
# Third party software included in this distribution is subject to the
|
||||
# additional license terms as defined in the /docs/licenses directory.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
|
||||
#
|
||||
#******************************************************************************
|
||||
TARGET := b0_hfadj
|
||||
COMPILERNAME := iar
|
||||
PROJECT := b0_hfadj_iar
|
||||
CONFIG := bin
|
||||
AM_SoftwareRoot ?= ../../../..
|
||||
|
||||
SHELL:=/bin/bash
|
||||
#### Required Executables ####
|
||||
K := $(shell type -p IarBuild.exe)
|
||||
RM = $(shell which rm 2>/dev/null)
|
||||
|
||||
ifeq ($(K),)
|
||||
all clean:
|
||||
$(info Tools w/$(COMPILERNAME) not installed.)
|
||||
$(RM) -rf bin
|
||||
else
|
||||
|
||||
all: directories binary
|
||||
|
||||
.PHONY: binary
|
||||
binary:
|
||||
IarBuild.exe b0_hfadj.ewp -make Debug -log info
|
||||
|
||||
directories: $(CONFIG)
|
||||
|
||||
$(CONFIG):
|
||||
@mkdir -p $@
|
||||
|
||||
clean:
|
||||
@echo Cleaning... ;\
|
||||
IarBuild.exe b0_hfadj.ewp -clean Debug -log all
|
||||
|
||||
|
||||
../../../bsp/iar/bin/libam_bsp.a:
|
||||
$(MAKE) -C ../../../bsp
|
||||
|
||||
../../../../../mcu/apollo3/hal/iar/bin/libam_hal.a:
|
||||
$(MAKE) -C ../../../../../mcu/apollo3/hal
|
||||
|
||||
endif
|
||||
.PHONY: all clean directories
|
||||
+2810
File diff suppressed because it is too large
Load Diff
+2070
File diff suppressed because it is too large
Load Diff
+10
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\b0_hfadj.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
+87
@@ -0,0 +1,87 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// b0_hfadj.icf
|
||||
//
|
||||
// IAR linker Configuration File
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2020, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//
|
||||
// Define a memory section that covers the entire 4 GB addressable space of the
|
||||
// processor. (32-bit can address up to 4GB)
|
||||
//
|
||||
define memory mem with size = 4G;
|
||||
|
||||
//
|
||||
// Define regions for the various types of internal memory.
|
||||
//
|
||||
define region ROMEM = mem:[from 0x0000C000 to 0x000FC000];
|
||||
define region RWMEM = mem:[from 0x10000000 to 0x10060000];
|
||||
|
||||
//
|
||||
// Define blocks for logical groups of data.
|
||||
//
|
||||
define block HEAP with alignment = 0x8, size = 0x00000000 { };
|
||||
define block CSTACK with alignment = 0x8, size = 4096
|
||||
{
|
||||
section .stack
|
||||
};
|
||||
|
||||
define block FLASHBASE with fixed order
|
||||
{
|
||||
readonly section .intvec,
|
||||
readonly section .patch
|
||||
};
|
||||
|
||||
//
|
||||
// Set section properties.
|
||||
//
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
do not initialize { section .stack };
|
||||
|
||||
//
|
||||
// Place code sections in memory regions.
|
||||
//
|
||||
place at start of ROMEM { block FLASHBASE };
|
||||
place in ROMEM { readonly };
|
||||
place at start of RWMEM { block CSTACK};
|
||||
place in RWMEM { block HEAP, readwrite, section .noinit };
|
||||
+2987
File diff suppressed because it is too large
Load Diff
BIN
Binary file not shown.
+127
@@ -0,0 +1,127 @@
|
||||
[Stack]
|
||||
FillEnabled=0
|
||||
OverflowWarningsEnabled=1
|
||||
WarningThreshold=90
|
||||
SpWarningsEnabled=1
|
||||
WarnLogOnly=1
|
||||
UseTrigger=1
|
||||
TriggerName=main
|
||||
LimitSize=0
|
||||
ByteLimit=50
|
||||
[Breakpoints]
|
||||
Count=0
|
||||
[GDBSERVERDriver]
|
||||
GDB_LeaveTargetRunning=0x00000000
|
||||
[DebugChecksum]
|
||||
Checksum=-2034475309
|
||||
[Exceptions]
|
||||
StopOnUncaught=_ 0
|
||||
StopOnThrow=_ 0
|
||||
[CodeCoverage]
|
||||
Enabled=_ 0
|
||||
[CallStack]
|
||||
ShowArgs=0
|
||||
[Disassembly]
|
||||
MixedMode=1
|
||||
[JLinkDriver]
|
||||
CStepIntDis=_ 0
|
||||
LeaveTargetRunning=_ 0
|
||||
TraceBufferSize=0x00010000
|
||||
TraceStallIfFIFOFull=0x00000000
|
||||
TracePortSize=0x00000000
|
||||
[SWOTraceHWSettings]
|
||||
OverrideDefaultClocks=1
|
||||
CpuClock=6000000
|
||||
ClockAutoDetect=0
|
||||
ClockWanted=1000000
|
||||
JtagSpeed=1000000
|
||||
Prescaler=6
|
||||
TimeStampPrescIndex=0
|
||||
TimeStampPrescData=0
|
||||
PcSampCYCTAP=1
|
||||
PcSampPOSTCNT=15
|
||||
PcSampIndex=0
|
||||
DataLogMode=0
|
||||
ITMportsEnable=1
|
||||
ITMportsTermIO=1
|
||||
ITMportsLogFile=0
|
||||
ITMlogFile=$PROJ_DIR$\ITM.log
|
||||
[Trace1]
|
||||
Enabled=0
|
||||
ShowSource=1
|
||||
[Trace2]
|
||||
Enabled=0
|
||||
ShowSource=0
|
||||
[SWOTraceWindow]
|
||||
PcSampling=0
|
||||
InterruptLogs=0
|
||||
ForcedTimeStamps=0
|
||||
EventCPI=0
|
||||
EventEXC=0
|
||||
EventFOLD=0
|
||||
EventLSU=0
|
||||
EventSLEEP=0
|
||||
[PowerLog]
|
||||
Title_0=I0
|
||||
Symbol_0=0 4 0
|
||||
LogEnabled=0
|
||||
GraphEnabled=0
|
||||
ShowTimeLog=1
|
||||
LiveEnabled=0
|
||||
LiveFile=PowerLogLive.log
|
||||
[DataLog]
|
||||
LogEnabled=0
|
||||
GraphEnabled=0
|
||||
ShowTimeLog=1
|
||||
SumEnabled=0
|
||||
ShowTimeSum=1
|
||||
[EventLog]
|
||||
Title_0=Ch3
|
||||
Symbol_0=0 4 1
|
||||
Title_1=Ch2
|
||||
Symbol_1=0 4 1
|
||||
Title_2=Ch1
|
||||
Symbol_2=0 4 1
|
||||
Title_3=Ch0
|
||||
Symbol_3=0 4 1
|
||||
LogEnabled=0
|
||||
GraphEnabled=0
|
||||
ShowTimeLog=1
|
||||
SumEnabled=0
|
||||
ShowTimeSum=1
|
||||
SumSortOrder=0
|
||||
[InterruptLog]
|
||||
LogEnabled=0
|
||||
GraphEnabled=0
|
||||
ShowTimeLog=1
|
||||
SumEnabled=0
|
||||
ShowTimeSum=1
|
||||
SumSortOrder=0
|
||||
[Log file]
|
||||
LoggingEnabled=_ 0
|
||||
LogFile=_ ""
|
||||
Category=_ 0
|
||||
[TermIOLog]
|
||||
LoggingEnabled=_ 0
|
||||
LogFile=_ ""
|
||||
[DriverProfiling]
|
||||
Enabled=0
|
||||
Mode=1
|
||||
Graph=0
|
||||
Symbiont=0
|
||||
Exclusions=
|
||||
[CallStackLog]
|
||||
Enabled=0
|
||||
[CallStackStripe]
|
||||
ShowTiming=1
|
||||
[PowerProbe]
|
||||
Frequency=10000
|
||||
Probe0=I0
|
||||
ProbeSetup0=2 1 1 2 0 0
|
||||
[Disassemble mode]
|
||||
mode=0
|
||||
[Breakpoints2]
|
||||
Count=0
|
||||
[Aliases]
|
||||
Count=0
|
||||
SuppressDialog=0
|
||||
+167
@@ -0,0 +1,167 @@
|
||||
<?xml version="1.0"?>
|
||||
<settings>
|
||||
<DebugChecksum>
|
||||
<Checksum>1749499678</Checksum>
|
||||
</DebugChecksum>
|
||||
<Exceptions>
|
||||
<StopOnUncaught>_ 0</StopOnUncaught>
|
||||
<StopOnThrow>_ 0</StopOnThrow>
|
||||
</Exceptions>
|
||||
<CodeCoverage>
|
||||
<Enabled>_ 0</Enabled>
|
||||
</CodeCoverage>
|
||||
<Stack>
|
||||
<FillEnabled>0</FillEnabled>
|
||||
<OverflowWarningsEnabled>1</OverflowWarningsEnabled>
|
||||
<WarningThreshold>90</WarningThreshold>
|
||||
<SpWarningsEnabled>1</SpWarningsEnabled>
|
||||
<WarnLogOnly>1</WarnLogOnly>
|
||||
<UseTrigger>1</UseTrigger>
|
||||
<TriggerName>main</TriggerName>
|
||||
<LimitSize>0</LimitSize>
|
||||
<ByteLimit>50</ByteLimit>
|
||||
</Stack>
|
||||
<CallStack>
|
||||
<ShowArgs>0</ShowArgs>
|
||||
</CallStack>
|
||||
<JLinkDriver>
|
||||
<CStepIntDis>_ 0</CStepIntDis>
|
||||
<LeaveTargetRunning>_ 0</LeaveTargetRunning>
|
||||
</JLinkDriver>
|
||||
<SWOTraceHWSettings>
|
||||
<OverrideDefaultClocks>1</OverrideDefaultClocks>
|
||||
<CpuClock>6000000</CpuClock>
|
||||
<ClockAutoDetect>0</ClockAutoDetect>
|
||||
<ClockWanted>1000000</ClockWanted>
|
||||
<JtagSpeed>1000000</JtagSpeed>
|
||||
<Prescaler>6</Prescaler>
|
||||
<TimeStampPrescIndex>0</TimeStampPrescIndex>
|
||||
<TimeStampPrescData>0</TimeStampPrescData>
|
||||
<PcSampCYCTAP>1</PcSampCYCTAP>
|
||||
<PcSampPOSTCNT>15</PcSampPOSTCNT>
|
||||
<PcSampIndex>0</PcSampIndex>
|
||||
<DataLogMode>0</DataLogMode>
|
||||
<ITMportsEnable>1</ITMportsEnable>
|
||||
<ITMportsTermIO>1</ITMportsTermIO>
|
||||
<ITMportsLogFile>1</ITMportsLogFile>
|
||||
<ITMlogFile>$PROJ_DIR$\ITM.log</ITMlogFile>
|
||||
</SWOTraceHWSettings>
|
||||
<SfrWindow>
|
||||
<Show>1 1</Show>
|
||||
<Sort>4 0</Sort>
|
||||
</SfrWindow>
|
||||
<Disassembly>
|
||||
<InstrCount>0</InstrCount>
|
||||
<MixedMode>1</MixedMode>
|
||||
</Disassembly>
|
||||
<Interrupts>
|
||||
<Enabled>1</Enabled>
|
||||
</Interrupts>
|
||||
<MemConfig>
|
||||
<Base>1</Base>
|
||||
<Manual>0</Manual>
|
||||
<Ddf>1</Ddf>
|
||||
<TypeViol>0</TypeViol>
|
||||
<Stop>1</Stop>
|
||||
</MemConfig>
|
||||
<Simulator>
|
||||
<Freq>10000000</Freq>
|
||||
<FreqHi>0</FreqHi>
|
||||
<MultiCoreRunAll>1</MultiCoreRunAll>
|
||||
</Simulator>
|
||||
<Trace1>
|
||||
<Enabled>0</Enabled>
|
||||
<ShowSource>1</ShowSource>
|
||||
</Trace1>
|
||||
<Trace2>
|
||||
<Enabled>0</Enabled>
|
||||
<ShowSource>0</ShowSource>
|
||||
</Trace2>
|
||||
<SWOTraceWindow>
|
||||
<PcSampling>0</PcSampling>
|
||||
<InterruptLogs>0</InterruptLogs>
|
||||
<ForcedTimeStamps>0</ForcedTimeStamps>
|
||||
<EventCPI>0</EventCPI>
|
||||
<EventEXC>0</EventEXC>
|
||||
<EventFOLD>0</EventFOLD>
|
||||
<EventLSU>0</EventLSU>
|
||||
<EventSLEEP>0</EventSLEEP>
|
||||
</SWOTraceWindow>
|
||||
<PowerLog>
|
||||
<Title_0>I0</Title_0>
|
||||
<Symbol_0>0 4 0</Symbol_0>
|
||||
<LogEnabled>0</LogEnabled>
|
||||
<GraphEnabled>0</GraphEnabled>
|
||||
<ShowTimeLog>1</ShowTimeLog>
|
||||
<LiveEnabled>0</LiveEnabled>
|
||||
<LiveFile>PowerLogLive.log</LiveFile>
|
||||
</PowerLog>
|
||||
<DataLog>
|
||||
<LogEnabled>0</LogEnabled>
|
||||
<GraphEnabled>0</GraphEnabled>
|
||||
<ShowTimeLog>1</ShowTimeLog>
|
||||
<SumEnabled>0</SumEnabled>
|
||||
<ShowTimeSum>1</ShowTimeSum>
|
||||
</DataLog>
|
||||
<InterruptLog>
|
||||
<LogEnabled>0</LogEnabled>
|
||||
<GraphEnabled>0</GraphEnabled>
|
||||
<ShowTimeLog>1</ShowTimeLog>
|
||||
<SumEnabled>0</SumEnabled>
|
||||
<ShowTimeSum>1</ShowTimeSum>
|
||||
<SumSortOrder>0</SumSortOrder>
|
||||
</InterruptLog>
|
||||
<EventLog>
|
||||
<Title_0>Ch3</Title_0>
|
||||
<Symbol_0>0 0 1</Symbol_0>
|
||||
<Title_1>Ch2</Title_1>
|
||||
<Symbol_1>0 0 1</Symbol_1>
|
||||
<Title_2>Ch1</Title_2>
|
||||
<Symbol_2>0 0 1</Symbol_2>
|
||||
<Title_3>Ch0</Title_3>
|
||||
<Symbol_3>0 0 1</Symbol_3>
|
||||
<LogEnabled>0</LogEnabled>
|
||||
<GraphEnabled>0</GraphEnabled>
|
||||
<ShowTimeLog>1</ShowTimeLog>
|
||||
<SumEnabled>0</SumEnabled>
|
||||
<ShowTimeSum>1</ShowTimeSum>
|
||||
<SumSortOrder>0</SumSortOrder>
|
||||
</EventLog>
|
||||
<LogFile>
|
||||
<LoggingEnabled>_ 0</LoggingEnabled>
|
||||
<LogFile>_ ""</LogFile>
|
||||
<Category>_ 0</Category>
|
||||
</LogFile>
|
||||
<TermIOLog>
|
||||
<LoggingEnabled>_ 0</LoggingEnabled>
|
||||
<LogFile>_ ""</LogFile>
|
||||
</TermIOLog>
|
||||
<DriverProfiling>
|
||||
<Enabled>0</Enabled>
|
||||
<Mode>1</Mode>
|
||||
<Graph>0</Graph>
|
||||
<Symbiont>0</Symbiont>
|
||||
<Exclusions />
|
||||
</DriverProfiling>
|
||||
<CallStackLog>
|
||||
<Enabled>0</Enabled>
|
||||
</CallStackLog>
|
||||
<CallStackStripe>
|
||||
<ShowTiming>1</ShowTiming>
|
||||
</CallStackStripe>
|
||||
<PowerProbe>
|
||||
<Frequency>10000</Frequency>
|
||||
<Probe0>I0</Probe0>
|
||||
<ProbeSetup0>2 1 1 2 0 0</ProbeSetup0>
|
||||
</PowerProbe>
|
||||
<DisassembleMode>
|
||||
<mode>0</mode>
|
||||
</DisassembleMode>
|
||||
<Breakpoints2>
|
||||
<Count>0</Count>
|
||||
</Breakpoints2>
|
||||
<Aliases>
|
||||
<Count>0</Count>
|
||||
<SuppressDialog>0</SuppressDialog>
|
||||
</Aliases>
|
||||
</settings>
|
||||
+39
@@ -0,0 +1,39 @@
|
||||
[BREAKPOINTS]
|
||||
ForceImpTypeAny = 0
|
||||
ShowInfoWin = 1
|
||||
EnableFlashBP = 2
|
||||
BPDuringExecution = 0
|
||||
[CFI]
|
||||
CFISize = 0x00
|
||||
CFIAddr = 0x00
|
||||
[CPU]
|
||||
MonModeVTableAddr = 0xFFFFFFFF
|
||||
MonModeDebug = 0
|
||||
MaxNumAPs = 0
|
||||
LowPowerHandlingMode = 0
|
||||
OverrideMemMap = 0
|
||||
AllowSimulation = 1
|
||||
ScriptFile="AMA3B1KK-KBR.JLinkScript"
|
||||
[FLASH]
|
||||
CacheExcludeSize = 0x00
|
||||
CacheExcludeAddr = 0x00
|
||||
MinNumBytesFlashDL = 0
|
||||
SkipProgOnCRCMatch = 1
|
||||
VerifyDownload = 1
|
||||
AllowCaching = 1
|
||||
EnableFlashDL = 2
|
||||
Override = 1
|
||||
Device="AMA3B1KK-KBR"
|
||||
[GENERAL]
|
||||
WorkRAMSize = 0x00
|
||||
WorkRAMAddr = 0x00
|
||||
RAMUsageLimit = 0x00
|
||||
[SWO]
|
||||
SWOLogFile=""
|
||||
[MEM]
|
||||
RdOverrideOrMask = 0x00
|
||||
RdOverrideAndMask = 0xFFFFFFFF
|
||||
RdOverrideAddr = 0xFFFFFFFF
|
||||
WrOverrideOrMask = 0x00
|
||||
WrOverrideAndMask = 0xFFFFFFFF
|
||||
WrOverrideAddr = 0xFFFFFFFF
|
||||
+398
@@ -0,0 +1,398 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! @file startup_iar.c
|
||||
//!
|
||||
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (c) 2020, Ambiq Micro
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions are met:
|
||||
//
|
||||
// 1. Redistributions of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// 2. Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the distribution.
|
||||
//
|
||||
// 3. Neither the name of the copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// Third party software included in this distribution is subject to the
|
||||
// additional license terms as defined in the /docs/licenses directory.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Enable the IAR extensions for this source file.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#pragma language = extended
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Weak function links.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#pragma weak MemManage_Handler = HardFault_Handler
|
||||
#pragma weak BusFault_Handler = HardFault_Handler
|
||||
#pragma weak UsageFault_Handler = HardFault_Handler
|
||||
#pragma weak SecureFault_Handler = HardFault_Handler
|
||||
#pragma weak SVC_Handler = am_default_isr
|
||||
#pragma weak DebugMon_Handler = am_default_isr
|
||||
#pragma weak PendSV_Handler = am_default_isr
|
||||
#pragma weak SysTick_Handler = am_default_isr
|
||||
|
||||
#pragma weak am_brownout_isr = am_default_isr
|
||||
#pragma weak am_watchdog_isr = am_default_isr
|
||||
#pragma weak am_rtc_isr = am_default_isr
|
||||
#pragma weak am_vcomp_isr = am_default_isr
|
||||
#pragma weak am_ioslave_ios_isr = am_default_isr
|
||||
#pragma weak am_ioslave_acc_isr = am_default_isr
|
||||
#pragma weak am_iomaster0_isr = am_default_isr
|
||||
#pragma weak am_iomaster1_isr = am_default_isr
|
||||
#pragma weak am_iomaster2_isr = am_default_isr
|
||||
#pragma weak am_iomaster3_isr = am_default_isr
|
||||
#pragma weak am_iomaster4_isr = am_default_isr
|
||||
#pragma weak am_iomaster5_isr = am_default_isr
|
||||
#pragma weak am_ble_isr = am_default_isr
|
||||
#pragma weak am_gpio_isr = am_default_isr
|
||||
#pragma weak am_ctimer_isr = am_default_isr
|
||||
#pragma weak am_uart_isr = am_default_isr
|
||||
#pragma weak am_uart1_isr = am_default_isr
|
||||
#pragma weak am_scard_isr = am_default_isr
|
||||
#pragma weak am_adc_isr = am_default_isr
|
||||
#pragma weak am_pdm0_isr = am_default_isr
|
||||
#pragma weak am_mspi0_isr = am_default_isr
|
||||
#pragma weak am_software0_isr = am_default_isr
|
||||
#pragma weak am_stimer_isr = am_default_isr
|
||||
#pragma weak am_stimer_cmpr0_isr = am_default_isr
|
||||
#pragma weak am_stimer_cmpr1_isr = am_default_isr
|
||||
#pragma weak am_stimer_cmpr2_isr = am_default_isr
|
||||
#pragma weak am_stimer_cmpr3_isr = am_default_isr
|
||||
#pragma weak am_stimer_cmpr4_isr = am_default_isr
|
||||
#pragma weak am_stimer_cmpr5_isr = am_default_isr
|
||||
#pragma weak am_stimer_cmpr6_isr = am_default_isr
|
||||
#pragma weak am_stimer_cmpr7_isr = am_default_isr
|
||||
#pragma weak am_flash_isr = am_default_isr
|
||||
#pragma weak am_clkgen_isr = am_default_isr
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the default fault handlers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern __stackless void Reset_Handler(void);
|
||||
extern __weak void NMI_Handler(void);
|
||||
extern __weak void HardFault_Handler(void);
|
||||
extern void MemManage_Handler(void);
|
||||
extern void BusFault_Handler(void);
|
||||
extern void UsageFault_Handler(void);
|
||||
extern void SecureFault_Handler(void);
|
||||
extern void SVC_Handler(void);
|
||||
extern void DebugMon_Handler(void);
|
||||
extern void PendSV_Handler(void);
|
||||
extern void SysTick_Handler(void);
|
||||
|
||||
extern void am_brownout_isr(void);
|
||||
extern void am_watchdog_isr(void);
|
||||
extern void am_rtc_isr(void);
|
||||
extern void am_vcomp_isr(void);
|
||||
extern void am_ioslave_ios_isr(void);
|
||||
extern void am_ioslave_acc_isr(void);
|
||||
extern void am_iomaster0_isr(void);
|
||||
extern void am_iomaster1_isr(void);
|
||||
extern void am_iomaster2_isr(void);
|
||||
extern void am_iomaster3_isr(void);
|
||||
extern void am_iomaster4_isr(void);
|
||||
extern void am_iomaster5_isr(void);
|
||||
extern void am_ble_isr(void);
|
||||
extern void am_gpio_isr(void);
|
||||
extern void am_ctimer_isr(void);
|
||||
extern void am_uart_isr(void);
|
||||
extern void am_uart1_isr(void);
|
||||
extern void am_scard_isr(void);
|
||||
extern void am_adc_isr(void);
|
||||
extern void am_pdm0_isr(void);
|
||||
extern void am_mspi0_isr(void);
|
||||
extern void am_software0_isr(void);
|
||||
extern void am_stimer_isr(void);
|
||||
extern void am_stimer_cmpr0_isr(void);
|
||||
extern void am_stimer_cmpr1_isr(void);
|
||||
extern void am_stimer_cmpr2_isr(void);
|
||||
extern void am_stimer_cmpr3_isr(void);
|
||||
extern void am_stimer_cmpr4_isr(void);
|
||||
extern void am_stimer_cmpr5_isr(void);
|
||||
extern void am_stimer_cmpr6_isr(void);
|
||||
extern void am_stimer_cmpr7_isr(void);
|
||||
extern void am_flash_isr(void);
|
||||
extern void am_clkgen_isr(void);
|
||||
|
||||
extern void am_default_isr(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the application startup code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void __iar_program_start(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Reserve space for the system stack.
|
||||
//
|
||||
//*****************************************************************************
|
||||
static uint32_t pui32Stack[1024] @ ".stack";
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// A union that describes the entries of the vector table. The union is needed
|
||||
// since the first entry is the stack pointer and the remainder are function
|
||||
// pointers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef union
|
||||
{
|
||||
void (*pfnHandler)(void);
|
||||
uint32_t ui32Ptr;
|
||||
}
|
||||
uVectorEntry;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The vector table. Note that the proper constructs must be placed on this to
|
||||
// ensure that it ends up at physical address 0x0000.0000.
|
||||
//
|
||||
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
|
||||
// am_usagefault_isr does not work if am_fault_isr is defined externally.
|
||||
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__root const uVectorEntry __vector_table[] @ ".intvec" =
|
||||
{
|
||||
{ .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) },
|
||||
// The initial stack pointer
|
||||
Reset_Handler, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
MemManage_Handler, // The MemManage_Handler
|
||||
BusFault_Handler, // The BusFault_Handler
|
||||
UsageFault_Handler, // The UsageFault_Handler
|
||||
SecureFault_Handler, // The SecureFault_Handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVC_Handler, // SVCall handler
|
||||
DebugMon_Handler, // Debug monitor handler
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
//
|
||||
// Peripheral Interrupts
|
||||
//
|
||||
am_brownout_isr, // 0: Brownout (rstgen)
|
||||
am_watchdog_isr, // 1: Watchdog
|
||||
am_rtc_isr, // 2: RTC
|
||||
am_vcomp_isr, // 3: Voltage Comparator
|
||||
am_ioslave_ios_isr, // 4: I/O Slave general
|
||||
am_ioslave_acc_isr, // 5: I/O Slave access
|
||||
am_iomaster0_isr, // 6: I/O Master 0
|
||||
am_iomaster1_isr, // 7: I/O Master 1
|
||||
am_iomaster2_isr, // 8: I/O Master 2
|
||||
am_iomaster3_isr, // 9: I/O Master 3
|
||||
am_iomaster4_isr, // 10: I/O Master 4
|
||||
am_iomaster5_isr, // 11: I/O Master 5
|
||||
am_ble_isr, // 12: BLEIF
|
||||
am_gpio_isr, // 13: GPIO
|
||||
am_ctimer_isr, // 14: CTIMER
|
||||
am_uart_isr, // 15: UART0
|
||||
am_uart1_isr, // 16: UART1
|
||||
am_scard_isr, // 17: SCARD
|
||||
am_adc_isr, // 18: ADC
|
||||
am_pdm0_isr, // 19: PDM
|
||||
am_mspi0_isr, // 20: MSPI0
|
||||
am_software0_isr, // 21: SOFTWARE0
|
||||
am_stimer_isr, // 22: SYSTEM TIMER
|
||||
am_stimer_cmpr0_isr, // 23: SYSTEM TIMER COMPARE0
|
||||
am_stimer_cmpr1_isr, // 24: SYSTEM TIMER COMPARE1
|
||||
am_stimer_cmpr2_isr, // 25: SYSTEM TIMER COMPARE2
|
||||
am_stimer_cmpr3_isr, // 26: SYSTEM TIMER COMPARE3
|
||||
am_stimer_cmpr4_isr, // 27: SYSTEM TIMER COMPARE4
|
||||
am_stimer_cmpr5_isr, // 28: SYSTEM TIMER COMPARE5
|
||||
am_stimer_cmpr6_isr, // 29: SYSTEM TIMER COMPARE6
|
||||
am_stimer_cmpr7_isr, // 30: SYSTEM TIMER COMPARE7
|
||||
am_clkgen_isr, // 31: CLKGEN
|
||||
};
|
||||
|
||||
//******************************************************************************
|
||||
//
|
||||
// Place code immediately following vector table.
|
||||
//
|
||||
//******************************************************************************
|
||||
//******************************************************************************
|
||||
//
|
||||
// The Patch table.
|
||||
//
|
||||
// The patch table should pad the vector table size to a total of 64 entries
|
||||
// (16 core + 48 periph) such that code begins at offset 0x100.
|
||||
//
|
||||
//******************************************************************************
|
||||
__root const uint32_t __Patchable[] @ ".patch" =
|
||||
{
|
||||
0, // 32
|
||||
0, // 33
|
||||
0, // 34
|
||||
0, // 35
|
||||
0, // 36
|
||||
0, // 37
|
||||
0, // 38
|
||||
0, // 39
|
||||
0, // 40
|
||||
0, // 41
|
||||
0, // 42
|
||||
0, // 43
|
||||
0, // 44
|
||||
0, // 45
|
||||
0, // 46
|
||||
0, // 47
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Note - The template for this function is originally found in IAR's module,
|
||||
// low_level_init.c. As supplied by IAR, it is an empty function.
|
||||
//
|
||||
// This module contains the function `__low_level_init', a function
|
||||
// that is called before the `main' function of the program. Normally
|
||||
// low-level initializations - such as setting the prefered interrupt
|
||||
// level or setting the watchdog - can be performed here.
|
||||
//
|
||||
// Note that this function is called before the data segments are
|
||||
// initialized, this means that this function cannot rely on the
|
||||
// values of global or static variables.
|
||||
//
|
||||
// When this function returns zero, the startup code will inhibit the
|
||||
// initialization of the data segments. The result is faster startup,
|
||||
// the drawback is that neither global nor static data will be
|
||||
// initialized.
|
||||
//
|
||||
// Copyright 1999-2017 IAR Systems AB.
|
||||
//
|
||||
// $Revision: 112610 $
|
||||
//
|
||||
//
|
||||
//
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AM_REGVAL(x) (*((volatile uint32_t *)(x)))
|
||||
#define VTOR_ADDR 0xE000ED08
|
||||
|
||||
__interwork int __low_level_init(void)
|
||||
{
|
||||
|
||||
AM_REGVAL(VTOR_ADDR) = (uint32_t)&__vector_table;
|
||||
|
||||
/*==================================*/
|
||||
/* Choose if segment initialization */
|
||||
/* should be done or not. */
|
||||
/* Return: 0 to omit seg_init */
|
||||
/* 1 to run seg_init */
|
||||
/*==================================*/
|
||||
return 1;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// This is the code that gets called when the processor first starts execution
|
||||
// following a reset event. Only the absolutely necessary set is performed,
|
||||
// after which the application supplied entry() routine is called.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
Reset_Handler(void)
|
||||
{
|
||||
//
|
||||
// Call the application's entry point.
|
||||
//
|
||||
__iar_program_start();
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// This is the code that gets called when the processor receives a NMI. This
|
||||
// simply enters an infinite loop, preserving the system state for examination
|
||||
// by a debugger.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__weak void
|
||||
NMI_Handler(void)
|
||||
{
|
||||
//
|
||||
// Enter an infinite loop.
|
||||
//
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// This is the code that gets called when the processor receives a fault
|
||||
// interrupt. This simply enters an infinite loop, preserving the system state
|
||||
// for examination by a debugger.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__weak void
|
||||
HardFault_Handler(void)
|
||||
{
|
||||
//
|
||||
// Enter an infinite loop.
|
||||
//
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// This is the code that gets called when the processor receives an unexpected
|
||||
// interrupt. This simply enters an infinite loop, preserving the system state
|
||||
// for examination by a debugger.
|
||||
//
|
||||
//*****************************************************************************
|
||||
static void
|
||||
am_default_isr(void)
|
||||
{
|
||||
//
|
||||
// Go into an infinite loop.
|
||||
//
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user