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#******************************************************************************
#
# Makefile - Rules for compiling
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
# Include rules specific to this board
-include ../board-defs.mk
# All makefiles use this to find the top level directory.
SWROOT?=../../..
# Include rules for building the BSP.
include $(SWROOT)/makedefs/am_bsp.mk
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//*****************************************************************************
//
// am_bsp.h
//! @file
//!
//! @brief Functions to aid with configuring the GPIOs.
//!
//! @addtogroup BSP Board Support Package (BSP)
//! @addtogroup apollo3_fpga_bsp BSP for the Apollo3 Hotshot FPGA
//! @ingroup BSP
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_BSP_H
#define AM_BSP_H
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
#include "am_bsp_pins.h"
//
// Make individual includes to not require full port before usage.
//#include "am_devices.h"
//
#include "am_devices_led.h"
#include "am_devices_button.h"
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Print interface type
//
//*****************************************************************************
#define AM_BSP_PRINT_INFC_NONE 0
#define AM_BSP_PRINT_INFC_SWO 1
#define AM_BSP_PRINT_INFC_UART0 2
#define AM_BSP_PRINT_INFC_BUFFERED_UART0 3
//*****************************************************************************
//
// Button definitions.
//
//*****************************************************************************
#define AM_BSP_NUM_BUTTONS 3
extern am_devices_button_t am_bsp_psButtons[AM_BSP_NUM_BUTTONS];
//*****************************************************************************
//
// LED definitions.
//
//*****************************************************************************
#define AM_BSP_NUM_LEDS 5
extern am_devices_led_t am_bsp_psLEDs[AM_BSP_NUM_LEDS];
//*****************************************************************************
//
// PWM_LED peripheral assignments.
//
//*****************************************************************************
//
// The Apollo3 EVB LED1 is pin 30, which can use timer B2 or B4 as output.
// None of the other Apollo3 EVB LEDs can use CTx outputs.
//
#define AM_BSP_PIN_PWM_LED AM_BSP_GPIO_LED1
#define AM_BSP_PWM_LED_TIMER 2
#define AM_BSP_PWM_LED_TIMER_SEG AM_HAL_CTIMER_TIMERB
#define AM_BSP_PWM_LED_TIMER_INT AM_HAL_CTIMER_INT_TIMERB2C0
//*****************************************************************************
//
// UART definitions.
//
//*****************************************************************************
//
// Apollo3 has two UART instances.
// AM_BSP_UART_PRINT_INST should correspond to COM_UART.
//
#define AM_BSP_UART_IOS_INST 0
#define AM_BSP_UART_PRINT_INST 0
#define AM_BSP_UART_BOOTLOADER_INST 1
//*****************************************************************************
//
//! Structure containing UART configuration information while it is powered down.
//
//*****************************************************************************
typedef struct
{
bool bSaved;
uint32_t ui32TxPinNum;
uint32_t ui32TxPinCfg;
}
am_bsp_uart_pwrsave_t;
//*****************************************************************************
//
// External data definitions.
//
//*****************************************************************************
extern am_bsp_uart_pwrsave_t am_bsp_uart_pwrsave[AM_REG_UART_NUM_MODULES];
//*****************************************************************************
//
// External function definitions.
//
//*****************************************************************************
extern void am_bsp_low_power_init(void);
extern void am_bsp_iom_pins_enable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
extern void am_bsp_iom_pins_disable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
extern void am_bsp_mspi_pins_enable(uint32_t ui32Module, am_hal_mspi_device_e eMSPIDevice);
extern void am_bsp_mspi_pins_disable(uint32_t ui32Module, am_hal_mspi_device_e eMSPIDevice);
extern void am_bsp_ios_pins_enable(uint32_t ui32Module, uint32_t ui32IOSMode);
extern void am_bsp_ios_pins_disable(uint32_t ui32Module, uint32_t ui32IOSMode);
extern void am_bsp_debug_printf_enable(void);
extern void am_bsp_debug_printf_disable(void);
extern void am_bsp_itm_string_print(char *pcString);
extern void am_bsp_itm_printf_enable(void);
extern void am_bsp_itm_printf_disable(void);
extern void am_bsp_uart_string_print(char *pcString);
extern void am_bsp_uart_printf_enable(void);
extern void am_bsp_uart_printf_disable(void);
extern void am_bsp_buffered_uart_printf_enable(void);
extern void am_bsp_buffered_uart_service(void);
extern uint32_t am_bsp_com_uart_transfer(const am_hal_uart_transfer_t *psTransfer);
#ifdef __cplusplus
}
#endif
#endif // AM_BSP_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
@@ -0,0 +1,999 @@
//*****************************************************************************
//
// am_bsp_pins.c
//! @file
//!
//! @brief BSP pin configuration definitions.
//!
//! @addtogroup BSP Board Support Package (BSP)
//! @ingroup BSP
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include "am_bsp.h"
//*****************************************************************************
//
// BUTTON0 pin: Labeled BTN2 on the Apollo3 EVB.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BUTTON0 =
{
.uFuncSel = AM_HAL_PIN_16_GPIO,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
};
//*****************************************************************************
//
// BUTTON1 pin: Labeled BTN3 on the Apollo3 EVB.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BUTTON1 =
{
.uFuncSel = AM_HAL_PIN_18_GPIO,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
};
//*****************************************************************************
//
// BUTTON2 pin: Labeled BTN4 on the Apollo3 EVB.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BUTTON2 =
{
.uFuncSel = AM_HAL_PIN_19_GPIO,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
};
//*****************************************************************************
//
// LED0 pin: The LED nearest the end of the board.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED0 =
{
.uFuncSel = AM_HAL_PIN_10_GPIO,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
};
//*****************************************************************************
//
// LED1 pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED1 =
{
.uFuncSel = AM_HAL_PIN_30_GPIO,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
};
//*****************************************************************************
//
// LED2 pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED2 =
{
.uFuncSel = AM_HAL_PIN_15_GPIO,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
};
//*****************************************************************************
//
// LED3 pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED3 =
{
.uFuncSel = AM_HAL_PIN_14_GPIO,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
};
//*****************************************************************************
//
// LED4 pin: The LED at the most interior location.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED4 =
{
.uFuncSel = AM_HAL_PIN_17_GPIO,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
};
//*****************************************************************************
//
// COM_UART_TX pin: This pin is the COM_UART transmit pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX =
{
.uFuncSel = AM_HAL_PIN_22_UART0TX,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
};
//*****************************************************************************
//
// COM_UART_RX pin: This pin is the COM_UART receive pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX =
{
.uFuncSel = AM_HAL_PIN_23_UART0RX
};
//*****************************************************************************
//
// COM_UART_CTS pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_CTS =
{
.uFuncSel = AM_HAL_PIN_38_UART0CTS
};
//*****************************************************************************
//
// COM_UART_RTS pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RTS =
{
.uFuncSel = AM_HAL_PIN_37_UART0RTS,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
};
//*****************************************************************************
//
// UART_TX pin: This pin is the COM_UART transmit pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_UART_TX =
{
.uFuncSel = AM_HAL_PIN_35_UART1TX,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
};
//*****************************************************************************
//
// UART_RX pin: This pin is the COM_UART receive pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_UART_RX =
{
.uFuncSel = AM_HAL_PIN_36_UART1RX
};
//*****************************************************************************
//
// UART_CTS pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_UART_CTS =
{
.uFuncSel = AM_HAL_PIN_45_UART1CTS
};
//*****************************************************************************
//
// UART_RTS pin.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_UART_RTS =
{
.uFuncSel = AM_HAL_PIN_44_UART1RTS,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
};
//*****************************************************************************
//
// IOM0_CS pin: I/O Master 0 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS =
{
.uFuncSel = AM_HAL_PIN_11_NCE11,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 0,
.uNCE = 0,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM0_CS3 pin: I/O Master 0 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3 =
{
.uFuncSel = AM_HAL_PIN_15_NCE15,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 0,
.uNCE = 3,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM0_MISO pin: I/O Master 0 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO =
{
.uFuncSel = AM_HAL_PIN_6_M0MISO,
.uIOMnum = 0
};
//*****************************************************************************
//
// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI =
{
.uFuncSel = AM_HAL_PIN_7_M0MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 0
};
//*****************************************************************************
//
// IOM0_SCK pin: I/O Master 0 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK =
{
.uFuncSel = AM_HAL_PIN_5_M0SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 0
};
//*****************************************************************************
//
// IOM0_SCL pin: I/O Master 0 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL =
{
.uFuncSel = AM_HAL_PIN_5_M0SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 0
};
//*****************************************************************************
//
// IOM0_SDA pin: I/O Master 0 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA =
{
.uFuncSel = AM_HAL_PIN_6_M0SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 0
};
//*****************************************************************************
//
// IOM1_CS pin: I/O Master 1 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS =
{
.uFuncSel = AM_HAL_PIN_14_NCE14,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 1,
.uNCE = 2,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM1_MISO pin: I/O Master 1 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO =
{
.uFuncSel = AM_HAL_PIN_9_M1MISO,
.uIOMnum = 1
};
//*****************************************************************************
//
// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI =
{
.uFuncSel = AM_HAL_PIN_10_M1MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 1
};
//*****************************************************************************
//
// IOM1_SCK pin: I/O Master 1 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK =
{
.uFuncSel = AM_HAL_PIN_8_M1SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 1
};
//*****************************************************************************
//
// IOM1_SCL pin: I/O Master 1 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL =
{
.uFuncSel = AM_HAL_PIN_8_M1SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 1
};
//*****************************************************************************
//
// IOM1_SDA pin: I/O Master 1 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA =
{
.uFuncSel = AM_HAL_PIN_9_M1SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 1
};
//*****************************************************************************
//
// IOM2_CS pin: I/O Master 2 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS =
{
.uFuncSel = AM_HAL_PIN_15_NCE15,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 2,
.uNCE = 3,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM2_MISO pin: I/O Master 2 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO =
{
.uFuncSel = AM_HAL_PIN_25_M2MISO,
.uIOMnum = 2
};
//*****************************************************************************
//
// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI =
{
.uFuncSel = AM_HAL_PIN_28_M2MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 2
};
//*****************************************************************************
//
// IOM2_SCK pin: I/O Master 2 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK =
{
.uFuncSel = AM_HAL_PIN_27_M2SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 2
};
//*****************************************************************************
//
// IOM2_SCL pin: I/O Master 2 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL =
{
.uFuncSel = AM_HAL_PIN_27_M2SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 2
};
//*****************************************************************************
//
// IOM2_SDA pin: I/O Master 2 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA =
{
.uFuncSel = AM_HAL_PIN_25_M2SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 2
};
//*****************************************************************************
//
// IOM3_CS pin: I/O Master 3 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS =
{
.uFuncSel = AM_HAL_PIN_12_NCE12,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 3,
.uNCE = 0,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM3_MISO pin: I/O Master 3 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO =
{
.uFuncSel = AM_HAL_PIN_43_M3MISO,
.uIOMnum = 3
};
//*****************************************************************************
//
// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI =
{
.uFuncSel = AM_HAL_PIN_38_M3MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 3
};
//*****************************************************************************
//
// IOM3_SCK pin: I/O Master 3 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK =
{
.uFuncSel = AM_HAL_PIN_42_M3SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 3
};
//*****************************************************************************
//
// IOM3_SCL pin: I/O Master 3 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL =
{
.uFuncSel = AM_HAL_PIN_42_M3SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 3
};
//*****************************************************************************
//
// IOM3_SDA pin: I/O Master 3 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA =
{
.uFuncSel = AM_HAL_PIN_43_M3SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 3
};
//*****************************************************************************
//
// IOM4_CS pin: I/O Master 4 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS =
{
.uFuncSel = AM_HAL_PIN_13_NCE13,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 4,
.uNCE = 1,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM4_MISO pin: I/O Master 4 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO =
{
.uFuncSel = AM_HAL_PIN_40_M4MISO,
.uIOMnum = 4
};
//*****************************************************************************
//
// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI =
{
.uFuncSel = AM_HAL_PIN_44_M4MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 4
};
//*****************************************************************************
//
// IOM4_SCK pin: I/O Master 4 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK =
{
.uFuncSel = AM_HAL_PIN_39_M4SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 4
};
//*****************************************************************************
//
// IOM4_SCL pin: I/O Master 4 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL =
{
.uFuncSel = AM_HAL_PIN_39_M4SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 4
};
//*****************************************************************************
//
// IOM4_SDA pin: I/O Master 4 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA =
{
.uFuncSel = AM_HAL_PIN_40_M4SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 4
};
//*****************************************************************************
//
// IOM5_CS pin: I/O Master 5 chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS =
{
.uFuncSel = AM_HAL_PIN_16_NCE16,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 5,
.uNCE = 0,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOM5_MISO pin: I/O Master 5 SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO =
{
.uFuncSel = AM_HAL_PIN_49_M5MISO,
.uIOMnum = 5
};
//*****************************************************************************
//
// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI =
{
.uFuncSel = AM_HAL_PIN_47_M5MOSI,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 5
};
//*****************************************************************************
//
// IOM5_SCK pin: I/O Master 5 SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK =
{
.uFuncSel = AM_HAL_PIN_48_M5SCK,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.uIOMnum = 5
};
//*****************************************************************************
//
// IOM5_SCL pin: I/O Master 5 I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL =
{
.uFuncSel = AM_HAL_PIN_48_M5SCL,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 5
};
//*****************************************************************************
//
// IOM5_SDA pin: I/O Master 5 I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA =
{
.uFuncSel = AM_HAL_PIN_49_M5SDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN,
.uIOMnum = 5
};
//*****************************************************************************
//
// MSPI_CE0 pin: MSPI chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0 =
{
.uFuncSel = AM_HAL_PIN_19_NCE19,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6,
.uNCE = 0,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// MSPI_CE1 pin: MSPI chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1 =
{
.uFuncSel = AM_HAL_PIN_41_NCE41,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6,
.uNCE = 1,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// MSPI_D0 pin: MSPI data 0.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0 =
{
.uFuncSel = AM_HAL_PIN_22_MSPI0,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D1 pin: MSPI data 1.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1 =
{
.uFuncSel = AM_HAL_PIN_26_MSPI1,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D2 pin: MSPI data 2.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2 =
{
.uFuncSel = AM_HAL_PIN_4_MSPI2,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D3 pin: MSPI data 3.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3 =
{
.uFuncSel = AM_HAL_PIN_23_MSPI13,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D4 pin: MSPI data 4.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4 =
{
.uFuncSel = AM_HAL_PIN_0_MSPI4,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D5 pin: MSPI data 5.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5 =
{
.uFuncSel = AM_HAL_PIN_1_MSPI5,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D6 pin: MSPI data 6.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6 =
{
.uFuncSel = AM_HAL_PIN_2_MSPI6,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_D7 pin: MSPI data 7.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7 =
{
.uFuncSel = AM_HAL_PIN_3_MSPI7,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// MSPI_SCK pin: MSPI clock.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK =
{
.uFuncSel = AM_HAL_PIN_24_MSPI8,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 6
};
//*****************************************************************************
//
// IOS_CE pin: I/O Slave chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE =
{
.uFuncSel = AM_HAL_PIN_3_SLnCE,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE,
.uNCE = 0,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// IOS_MISO pin: I/O Slave SPI MISO signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO =
{
.uFuncSel = AM_HAL_PIN_2_SLMISO,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA
};
//*****************************************************************************
//
// IOS_MOSI pin: I/O Slave SPI MOSI signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI =
{
.uFuncSel = AM_HAL_PIN_1_SLMOSI,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
};
//*****************************************************************************
//
// IOS_SCK pin: I/O Slave SPI SCK signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK =
{
.uFuncSel = AM_HAL_PIN_0_SLSCK,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
};
//*****************************************************************************
//
// IOS_SCL pin: I/O Slave I2C clock signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL =
{
.uFuncSel = AM_HAL_PIN_0_SLSCL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE
};
//*****************************************************************************
//
// IOS_SDA pin: I/O Slave I2C data signal.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA =
{
.uFuncSel = AM_HAL_PIN_1_SLSDAWIR3,
.ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN
};
//*****************************************************************************
//
// ITM_SWO pin: ITM Serial Wire Output.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_ITM_SWO =
{
.uFuncSel = AM_HAL_PIN_41_SWO,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA
};
//*****************************************************************************
//
// SWDCK pin: Cortex Serial Wire DCK.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK =
{
.uFuncSel = AM_HAL_PIN_20_SWDCK
};
//*****************************************************************************
//
// SWDIO pin: Cortex Serial Wire DIO.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO =
{
.uFuncSel = AM_HAL_PIN_21_SWDIO
};
//*****************************************************************************
//
// FIREBALL_CE pin: Fireball device test board chip select.
//
//*****************************************************************************
const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_FIREBALL_CE =
{
.uFuncSel = AM_HAL_PIN_30_NCE30,
.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA,
.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL,
.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE,
.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI,
.uIOMnum = 5,
.uNCE = 3,
.eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW
};
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
@@ -0,0 +1,680 @@
//*****************************************************************************
//
// am_bsp_pins.h
//! @file
//!
//! @brief BSP pin configuration definitions.
//!
//! @addtogroup BSP Board Support Package (BSP)
//! @addtogroup apollo3_bsp BSP for the Apollo3 EVB.
//! @ingroup BSP
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_BSP_PINS_H
#define AM_BSP_PINS_H
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// BUTTON0 pin: Labeled BTN2 on the Apollo3 EVB.
//
//*****************************************************************************
#define AM_BSP_GPIO_BUTTON0 16
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BUTTON0;
//*****************************************************************************
//
// BUTTON1 pin: Labeled BTN3 on the Apollo3 EVB.
//
//*****************************************************************************
#define AM_BSP_GPIO_BUTTON1 18
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BUTTON1;
//*****************************************************************************
//
// BUTTON2 pin: Labeled BTN4 on the Apollo3 EVB.
//
//*****************************************************************************
#define AM_BSP_GPIO_BUTTON2 19
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BUTTON2;
//*****************************************************************************
//
// LED0 pin: The LED nearest the end of the board.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED0 10
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED0;
//*****************************************************************************
//
// LED1 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED1 30
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED1;
//*****************************************************************************
//
// LED2 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED2 15
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED2;
//*****************************************************************************
//
// LED3 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED3 14
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED3;
//*****************************************************************************
//
// LED4 pin: The LED at the most interior location.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED4 17
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED4;
//*****************************************************************************
//
// COM_UART_TX pin: This pin is the COM_UART transmit pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_COM_UART_TX 22
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX;
//*****************************************************************************
//
// COM_UART_RX pin: This pin is the COM_UART receive pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_COM_UART_RX 23
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX;
//*****************************************************************************
//
// COM_UART_CTS pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_COM_UART_CTS 38
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_CTS;
//*****************************************************************************
//
// COM_UART_RTS pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_COM_UART_RTS 37
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RTS;
//*****************************************************************************
//
// UART_TX pin: This pin is the COM_UART transmit pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_UART_TX 35
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_UART_TX;
//*****************************************************************************
//
// UART_RX pin: This pin is the COM_UART receive pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_UART_RX 36
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_UART_RX;
//*****************************************************************************
//
// UART_CTS pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_UART_CTS 45
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_UART_CTS;
//*****************************************************************************
//
// UART_RTS pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_UART_RTS 44
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_UART_RTS;
//*****************************************************************************
//
// IOM0_CS pin: I/O Master 0 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_CS 11
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS;
#define AM_BSP_IOM0_CS_CHNL 0
//*****************************************************************************
//
// IOM0_CS3 pin: I/O Master 0 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_CS3 15
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3;
#define AM_BSP_IOM0_CS3_CHNL 3
//*****************************************************************************
//
// IOM0_MISO pin: I/O Master 0 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_MISO 6
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO;
//*****************************************************************************
//
// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_MOSI 7
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI;
//*****************************************************************************
//
// IOM0_SCK pin: I/O Master 0 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SCK 5
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK;
//*****************************************************************************
//
// IOM0_SCL pin: I/O Master 0 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SCL 5
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL;
//*****************************************************************************
//
// IOM0_SDA pin: I/O Master 0 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SDA 6
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA;
//*****************************************************************************
//
// IOM1_CS pin: I/O Master 1 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_CS 14
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS;
#define AM_BSP_IOM1_CS_CHNL 2
//*****************************************************************************
//
// IOM1_MISO pin: I/O Master 1 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_MISO 9
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO;
//*****************************************************************************
//
// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_MOSI 10
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI;
//*****************************************************************************
//
// IOM1_SCK pin: I/O Master 1 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SCK 8
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK;
//*****************************************************************************
//
// IOM1_SCL pin: I/O Master 1 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SCL 8
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL;
//*****************************************************************************
//
// IOM1_SDA pin: I/O Master 1 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SDA 9
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA;
//*****************************************************************************
//
// IOM2_CS pin: I/O Master 2 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_CS 15
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS;
#define AM_BSP_IOM2_CS_CHNL 3
//*****************************************************************************
//
// IOM2_MISO pin: I/O Master 2 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_MISO 25
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO;
//*****************************************************************************
//
// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_MOSI 28
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI;
//*****************************************************************************
//
// IOM2_SCK pin: I/O Master 2 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SCK 27
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK;
//*****************************************************************************
//
// IOM2_SCL pin: I/O Master 2 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SCL 27
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL;
//*****************************************************************************
//
// IOM2_SDA pin: I/O Master 2 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SDA 25
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA;
//*****************************************************************************
//
// IOM3_CS pin: I/O Master 3 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_CS 12
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS;
#define AM_BSP_IOM3_CS_CHNL 0
//*****************************************************************************
//
// IOM3_MISO pin: I/O Master 3 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_MISO 43
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO;
//*****************************************************************************
//
// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_MOSI 38
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI;
//*****************************************************************************
//
// IOM3_SCK pin: I/O Master 3 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SCK 42
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK;
//*****************************************************************************
//
// IOM3_SCL pin: I/O Master 3 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SCL 42
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL;
//*****************************************************************************
//
// IOM3_SDA pin: I/O Master 3 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SDA 43
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA;
//*****************************************************************************
//
// IOM4_CS pin: I/O Master 4 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_CS 13
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS;
#define AM_BSP_IOM4_CS_CHNL 1
//*****************************************************************************
//
// IOM4_MISO pin: I/O Master 4 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_MISO 40
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO;
//*****************************************************************************
//
// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_MOSI 44
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI;
//*****************************************************************************
//
// IOM4_SCK pin: I/O Master 4 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SCK 39
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK;
//*****************************************************************************
//
// IOM4_SCL pin: I/O Master 4 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SCL 39
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL;
//*****************************************************************************
//
// IOM4_SDA pin: I/O Master 4 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SDA 40
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA;
//*****************************************************************************
//
// IOM5_CS pin: I/O Master 5 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_CS 16
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS;
#define AM_BSP_IOM5_CS_CHNL 0
//*****************************************************************************
//
// IOM5_MISO pin: I/O Master 5 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_MISO 49
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO;
//*****************************************************************************
//
// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_MOSI 47
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI;
//*****************************************************************************
//
// IOM5_SCK pin: I/O Master 5 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SCK 48
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK;
//*****************************************************************************
//
// IOM5_SCL pin: I/O Master 5 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SCL 48
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL;
//*****************************************************************************
//
// IOM5_SDA pin: I/O Master 5 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SDA 49
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA;
//*****************************************************************************
//
// MSPI_CE0 pin: MSPI chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_CE0 19
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0;
#define AM_BSP_MSPI_CE0_CHNL 0
//*****************************************************************************
//
// MSPI_CE1 pin: MSPI chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_CE1 41
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1;
#define AM_BSP_MSPI_CE1_CHNL 1
//*****************************************************************************
//
// MSPI_D0 pin: MSPI data 0.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D0 22
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0;
//*****************************************************************************
//
// MSPI_D1 pin: MSPI data 1.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D1 26
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1;
//*****************************************************************************
//
// MSPI_D2 pin: MSPI data 2.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D2 4
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2;
//*****************************************************************************
//
// MSPI_D3 pin: MSPI data 3.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D3 23
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3;
//*****************************************************************************
//
// MSPI_D4 pin: MSPI data 4.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D4 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4;
//*****************************************************************************
//
// MSPI_D5 pin: MSPI data 5.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D5 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5;
//*****************************************************************************
//
// MSPI_D6 pin: MSPI data 6.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D6 2
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6;
//*****************************************************************************
//
// MSPI_D7 pin: MSPI data 7.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D7 3
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7;
//*****************************************************************************
//
// MSPI_SCK pin: MSPI clock.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_SCK 24
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK;
//*****************************************************************************
//
// IOS_CE pin: I/O Slave chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_CE 3
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE;
#define AM_BSP_IOS_CE_CHNL 0
//*****************************************************************************
//
// IOS_MISO pin: I/O Slave SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_MISO 2
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO;
//*****************************************************************************
//
// IOS_MOSI pin: I/O Slave SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_MOSI 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI;
//*****************************************************************************
//
// IOS_SCK pin: I/O Slave SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SCK 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK;
//*****************************************************************************
//
// IOS_SCL pin: I/O Slave I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SCL 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL;
//*****************************************************************************
//
// IOS_SDA pin: I/O Slave I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SDA 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA;
//*****************************************************************************
//
// ITM_SWO pin: ITM Serial Wire Output.
//
//*****************************************************************************
#define AM_BSP_GPIO_ITM_SWO 41
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_ITM_SWO;
//*****************************************************************************
//
// SWDCK pin: Cortex Serial Wire DCK.
//
//*****************************************************************************
#define AM_BSP_GPIO_SWDCK 20
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK;
//*****************************************************************************
//
// SWDIO pin: Cortex Serial Wire DIO.
//
//*****************************************************************************
#define AM_BSP_GPIO_SWDIO 21
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO;
//*****************************************************************************
//
// FIREBALL_CE pin: Fireball device test board chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_FIREBALL_CE 30
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_FIREBALL_CE;
#define AM_BSP_FIREBALL_CE_CHNL 3
#ifdef __cplusplus
}
#endif
#endif // AM_BSP_PINS_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
@@ -0,0 +1,806 @@
# *****************************************************************************
# *
# bsp_pins.src *
# *
# Ambiq Micro BSP pins definitions *
# *
# *****************************************************************************
# *****************************************************************************
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
# *****************************************************************************
# *****************************************************************************
# *
# This file contains descriptors for the various BSP pin definitions. *
# After completing the pin descriptors, the file is processed by a *
# Python script to generate the appropriate C and header file. *
# *
# NOTEs: *
# - This file should contain NO TAB characters, only spaces. *
# - Indentation is required, but the amount of indentation is not critical, *
# only the consistency of indentation. *
# - Comment lines always begin with a '#' sign. *
# - Letter case of keywords (left side of equal) is not important. *
# Letter case of the value (right side of equal) is not important when *
# processing standard values (e.g. "lo2hi"). However, letter case is *
# maintained when used for creating defines. *
# *
# Top level keywords: *
# pinsrc_ver: The format version of this .src file. *
# pin: Attributes for describing each pin. See below for details. *
# *
# Version 0x0103 (Apollo3p) 'pin' keywords: *
# ----------------------------------------- *
# All of the Apollo3 (version 0x0003) keywords plus/except: *
# bIomMSPIn 1 (or IOM) if this pin is describing an IOM. *
# 0 (or MSPI) if MSPI. *
# IOMnum The IOM or MSPI number pertaining to the CE. *
# If bIomMSPIn == 1: 0-5 *
# If bIomMSPIn == 0: 0-2 *
# Note: CEnum and CEpol remain the same as version 1. *
# *
# Version 0x0003 (Apollo3) 'pin' keywords: *
# ---------------------------------------- *
# All of the following keywords should begin in column 4. *
# name The name to be used for the pin. This name will be used as a *
# base for generating defines. Each pin name must be unique. *
# desc Optional: A description, if provided, will appear in the *
# generated header file. *
# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. *
# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. *
# pinnum The pin number for the pin being defined (0-49). *
# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. *
# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3) *
# One of: disable, pushpull, opendrain, tristate. *
# Also acceptable is a value 0-3, or a macro. *
# GPinput Only used if the pin is being defined as GPIO (funcsel=3). *
# One of: true, false. *
# GPRdZero One of readpin, zero (or true or false). *
# intdir One of: none, lo2hi, hi2lo, either. *
# Note - does not enable any interrupt. Only configures the *
# direction for when it is enabled. *
# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. *
# 1_5K - 24K: valid on I2C pins. *
# weak: Valid for pullups on all other (non-I2C) pins. *
# pulldown: Valid for pin 20 only. *
# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). *
# PowerSw One of: VDD or VSS. *
# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). *
# *
# The following 3 parameters are used when the pin is being defined as a *
# chip enable, i.e. for SPI or MSPI. *
# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. *
# Also acceptable is a macro (e.g. one defined in am_bsp.h). *
# CEnum A value from 0-3. *
# If a value 0-3, a macro is created of the form: *
# #define AM_BSP_<name>_CHNL <CEnum> *
# Also acceptable is a macro (e.g. one defined in am_bsp.h), *
# in this case no other macro is created. *
# CEpol Chip enable polarity, active low or active high. *
# One of: LOW (default) or HIGH. *
# *
# *****************************************************************************
# *****************************************************************************
# *
# The .src file version determines the appropriate pin template to be used *
# and thus is device dependent. *
# Apollo3: 0x0003. *
# *
# *****************************************************************************
pinsrc_ver = 0x0003
# *****************************************************************************
# LEDs and buttons
# *****************************************************************************
pin
name = BUTTON0
desc = Labeled BTN2 on the Apollo3 EVB.
pinnum = 16
func_sel = AM_HAL_PIN_16_GPIO
drvstrength = 2
GPinput = true
pin
name = BUTTON1
desc = Labeled BTN3 on the Apollo3 EVB.
pinnum = 18
func_sel = AM_HAL_PIN_18_GPIO
drvstrength = 2
GPinput = true
pin
name = BUTTON2
desc = Labeled BTN4 on the Apollo3 EVB.
pinnum = 19
func_sel = AM_HAL_PIN_19_GPIO
drvstrength = 2
GPinput = true
pin
name = LED0
desc = The LED nearest the end of the board.
pinnum = 10
func_sel = AM_HAL_PIN_10_GPIO
drvstrength = 2
pin
name = LED1
pinnum = 30
func_sel = AM_HAL_PIN_30_GPIO
drvstrength = 2
pin
name = LED2
pinnum = 15
func_sel = AM_HAL_PIN_15_GPIO
drvstrength = 2
pin
name = LED3
pinnum = 14
func_sel = AM_HAL_PIN_14_GPIO
drvstrength = 2
pin
name = LED4
desc = The LED at the most interior location.
pinnum = 17
func_sel = AM_HAL_PIN_17_GPIO
drvstrength = 2
# *****************************************************************************
# COM UART pins (UART0).
# *****************************************************************************
pin
name = COM_UART_TX
desc = This pin is the COM_UART transmit pin.
pinnum = 22
func_sel = AM_HAL_PIN_22_UART0TX
drvstrength = 2
pin
name = COM_UART_RX
desc = This pin is the COM_UART receive pin.
pinnum = 23
func_sel = AM_HAL_PIN_23_UART0RX
pin
name = COM_UART_CTS
pinnum = 38
func_sel = AM_HAL_PIN_38_UART0CTS
pin
name = COM_UART_RTS
pinnum = 37
func_sel = AM_HAL_PIN_37_UART0RTS
drvstrength = 2
# *****************************************************************************
# UART pins (UART1).
# *****************************************************************************
pin
name = UART_TX
desc = This pin is the COM_UART transmit pin.
pinnum = 35
func_sel = AM_HAL_PIN_35_UART1TX
drvstrength = 2
pin
name = UART_RX
desc = This pin is the COM_UART receive pin.
pinnum = 36
func_sel = AM_HAL_PIN_36_UART1RX
pin
name = UART_CTS
pinnum = 45
func_sel = AM_HAL_PIN_45_UART1CTS
pin
name = UART_RTS
pinnum = 44
func_sel = AM_HAL_PIN_44_UART1RTS
drvstrength = 2
# *****************************************************************************
# IOM0 pins.
# *****************************************************************************
pin
name = IOM0_CS
desc = I/O Master 0 chip select.
pinnum = 11
func_sel = AM_HAL_PIN_11_NCE11
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 0
CEnum = 0
CEpol = low
pin
name = IOM0_CS3
desc = I/O Master 0 chip select.
pinnum = 15
func_sel = AM_HAL_PIN_15_NCE15
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 0
CEnum = 3
CEpol = low
pin
name = IOM0_MISO
desc = I/O Master 0 SPI MISO signal.
pinnum = 6
func_sel = AM_HAL_PIN_6_M0MISO
IOMnum = 0
pin
name = IOM0_MOSI
desc = I/O Master 0 SPI MOSI signal.
pinnum = 7
func_sel = AM_HAL_PIN_7_M0MOSI
drvstrength = 12
IOMnum = 0
pin
name = IOM0_SCK
desc = I/O Master 0 SPI SCK signal.
pinnum = 5
func_sel = AM_HAL_PIN_5_M0SCK
drvstrength = 12
IOMnum = 0
pin
name = IOM0_SCL
desc = I/O Master 0 I2C clock signal.
pinnum = 5
func_sel = AM_HAL_PIN_5_M0SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 0
pin
name = IOM0_SDA
desc = I/O Master 0 I2C data signal.
pinnum = 6
func_sel = AM_HAL_PIN_6_M0SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 0
# *****************************************************************************
# IOM1 pins.
# *****************************************************************************
pin
name = IOM1_CS
desc = I/O Master 1 chip select.
pinnum = 14
func_sel = AM_HAL_PIN_14_NCE14
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 1
CEnum = 2
CEpol = low
pin
name = IOM1_MISO
desc = I/O Master 1 SPI MISO signal.
pinnum = 9
func_sel = AM_HAL_PIN_9_M1MISO
IOMnum = 1
pin
name = IOM1_MOSI
desc = I/O Master 1 SPI MOSI signal.
pinnum = 10
func_sel = AM_HAL_PIN_10_M1MOSI
drvstrength = 12
IOMnum = 1
pin
name = IOM1_SCK
desc = I/O Master 1 SPI SCK signal.
pinnum = 8
func_sel = AM_HAL_PIN_8_M1SCK
drvstrength = 12
IOMnum = 1
pin
name = IOM1_SCL
desc = I/O Master 1 I2C clock signal.
pinnum = 8
func_sel = AM_HAL_PIN_8_M1SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 1
pin
name = IOM1_SDA
desc = I/O Master 1 I2C data signal.
pinnum = 9
func_sel = AM_HAL_PIN_9_M1SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 1
# *****************************************************************************
# IOM2 pins.
# *****************************************************************************
pin
name = IOM2_CS
desc = I/O Master 2 chip select.
pinnum = 15
func_sel = AM_HAL_PIN_15_NCE15
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 2
CEnum = 3
CEpol = low
pin
name = IOM2_MISO
desc = I/O Master 2 SPI MISO signal.
pinnum = 25
func_sel = AM_HAL_PIN_25_M2MISO
IOMnum = 2
pin
name = IOM2_MOSI
desc = I/O Master 2 SPI MOSI signal.
pinnum = 28
func_sel = AM_HAL_PIN_28_M2MOSI
drvstrength = 12
IOMnum = 2
pin
name = IOM2_SCK
desc = I/O Master 2 SPI SCK signal.
pinnum = 27
func_sel = AM_HAL_PIN_27_M2SCK
drvstrength = 12
IOMnum = 2
pin
name = IOM2_SCL
desc = I/O Master 2 I2C clock signal.
pinnum = 27
func_sel = AM_HAL_PIN_27_M2SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 2
pin
name = IOM2_SDA
desc = I/O Master 2 I2C data signal.
pinnum = 25
func_sel = AM_HAL_PIN_25_M2SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 2
# *****************************************************************************
# IOM3 pins.
# *****************************************************************************
pin
name = IOM3_CS
desc = I/O Master 3 chip select.
pinnum = 12
func_sel = AM_HAL_PIN_12_NCE12
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 3
CEnum = 0
CEpol = low
pin
name = IOM3_MISO
desc = I/O Master 3 SPI MISO signal.
pinnum = 43
func_sel = AM_HAL_PIN_43_M3MISO
IOMnum = 3
pin
name = IOM3_MOSI
desc = I/O Master 3 SPI MOSI signal.
pinnum = 38
func_sel = AM_HAL_PIN_38_M3MOSI
drvstrength = 12
IOMnum = 3
pin
name = IOM3_SCK
desc = I/O Master 3 SPI SCK signal.
pinnum = 42
func_sel = AM_HAL_PIN_42_M3SCK
drvstrength = 12
IOMnum = 3
pin
name = IOM3_SCL
desc = I/O Master 3 I2C clock signal.
pinnum = 42
func_sel = AM_HAL_PIN_42_M3SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 3
pin
name = IOM3_SDA
desc = I/O Master 3 I2C data signal.
pinnum = 43
func_sel = AM_HAL_PIN_43_M3SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 3
# *****************************************************************************
# IOM4 pins.
# *****************************************************************************
pin
name = IOM4_CS
desc = I/O Master 4 chip select.
pinnum = 13
func_sel = AM_HAL_PIN_13_NCE13
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 4
CEnum = 1
CEpol = low
pin
name = IOM4_MISO
desc = I/O Master 4 SPI MISO signal.
pinnum = 40
func_sel = AM_HAL_PIN_40_M4MISO
IOMnum = 4
pin
name = IOM4_MOSI
desc = I/O Master 4 SPI MOSI signal.
pinnum = 44
func_sel = AM_HAL_PIN_44_M4MOSI
drvstrength = 12
IOMnum = 4
pin
name = IOM4_SCK
desc = I/O Master 4 SPI SCK signal.
pinnum = 39
func_sel = AM_HAL_PIN_39_M4SCK
drvstrength = 12
IOMnum = 4
pin
name = IOM4_SCL
desc = I/O Master 4 I2C clock signal.
pinnum = 39
func_sel = AM_HAL_PIN_39_M4SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 4
pin
name = IOM4_SDA
desc = I/O Master 4 I2C data signal.
pinnum = 40
func_sel = AM_HAL_PIN_40_M4SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 4
# *****************************************************************************
# IOM5 pins.
# *****************************************************************************
pin
name = IOM5_CS
desc = I/O Master 5 chip select.
pinnum = 16
func_sel = AM_HAL_PIN_16_NCE16
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 5
CEnum = 0
CEpol = low
pin
name = IOM5_MISO
desc = I/O Master 5 SPI MISO signal.
pinnum = 49
func_sel = AM_HAL_PIN_49_M5MISO
IOMnum = 5
pin
name = IOM5_MOSI
desc = I/O Master 5 SPI MOSI signal.
pinnum = 47
func_sel = AM_HAL_PIN_47_M5MOSI
drvstrength = 12
IOMnum = 5
pin
name = IOM5_SCK
desc = I/O Master 5 SPI SCK signal.
pinnum = 48
func_sel = AM_HAL_PIN_48_M5SCK
drvstrength = 12
IOMnum = 5
pin
name = IOM5_SCL
desc = I/O Master 5 I2C clock signal.
pinnum = 48
func_sel = AM_HAL_PIN_48_M5SCL
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 5
pin
name = IOM5_SDA
desc = I/O Master 5 I2C data signal.
pinnum = 49
func_sel = AM_HAL_PIN_49_M5SDAWIR3
GPOutcfg = opendrain
drvstrength = 12
pullup = 1_5K
IOMnum = 5
# *****************************************************************************
# MSPI pins.
# *****************************************************************************
pin
name = MSPI_CE0
desc = MSPI chip select.
pinnum = 19
func_sel = AM_HAL_PIN_19_NCE19
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 6
CEnum = 0
CEpol = low
pin
name = MSPI_CE1
desc = MSPI chip select.
pinnum = 41
func_sel = AM_HAL_PIN_41_NCE41
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 6
CEnum = 1
CEpol = low
pin
name = MSPI_D0
desc = MSPI data 0.
pinnum = 22
func_sel = AM_HAL_PIN_22_MSPI0
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D1
desc = MSPI data 1.
pinnum = 26
func_sel = AM_HAL_PIN_26_MSPI1
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D2
desc = MSPI data 2.
pinnum = 4
func_sel = AM_HAL_PIN_4_MSPI2
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D3
desc = MSPI data 3.
pinnum = 23
func_sel = AM_HAL_PIN_23_MSPI13
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D4
desc = MSPI data 4.
pinnum = 0
func_sel = AM_HAL_PIN_0_MSPI4
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D5
desc = MSPI data 5.
pinnum = 1
func_sel = AM_HAL_PIN_1_MSPI5
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D6
desc = MSPI data 6.
pinnum = 2
func_sel = AM_HAL_PIN_2_MSPI6
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_D7
desc = MSPI data 7.
pinnum = 3
func_sel = AM_HAL_PIN_3_MSPI7
drvstrength = 8
intdir = lo2hi
IOMnum = 6
pin
name = MSPI_SCK
desc = MSPI clock.
pinnum = 24
func_sel = AM_HAL_PIN_24_MSPI8
drvstrength = 12
intdir = lo2hi
IOMnum = 6
# *****************************************************************************
# IOS pins.
# *****************************************************************************
pin
name = IOS_CE
desc = I/O Slave chip select.
pinnum = 3
func_sel = AM_HAL_PIN_3_SLnCE
GPinput = true
CEnum = 0
CEpol = low
pin
name = IOS_MISO
desc = I/O Slave SPI MISO signal.
pinnum = 2
func_sel = AM_HAL_PIN_2_SLMISO
drvstrength = 12
pin
name = IOS_MOSI
desc = I/O Slave SPI MOSI signal.
pinnum = 1
func_sel = AM_HAL_PIN_1_SLMOSI
GPinput = true
pin
name = IOS_SCK
desc = I/O Slave SPI SCK signal.
pinnum = 0
func_sel = AM_HAL_PIN_0_SLSCK
GPinput = true
pin
name = IOS_SCL
desc = I/O Slave I2C clock signal.
pinnum = 0
func_sel = AM_HAL_PIN_0_SLSCL
GPinput = true
pin
name = IOS_SDA
desc = I/O Slave I2C data signal.
pinnum = 1
func_sel = AM_HAL_PIN_1_SLSDAWIR3
GPOutcfg = opendrain
pullup = 1_5K
# *****************************************************************************
# ITM pins.
# *****************************************************************************
pin
name = ITM_SWO
desc = ITM Serial Wire Output.
pinnum = 41
func_sel = AM_HAL_PIN_41_SWO
drvstrength = 2
# *****************************************************************************
# CORE pins.
# *****************************************************************************
pin
name = SWDCK
desc = Cortex Serial Wire DCK.
pinnum = 20
func_sel = AM_HAL_PIN_20_SWDCK
pin
name = SWDIO
desc = Cortex Serial Wire DIO.
pinnum = 21
func_sel = AM_HAL_PIN_21_SWDIO
# *****************************************************************************
# FIREBALL pins.
# *****************************************************************************
pin
name = FIREBALL_CE
desc = Fireball device test board chip select.
pinnum = 30
func_sel = AM_HAL_PIN_30_NCE30
drvstrength = 12
intdir = lo2hi
GPOutcfg = pushpull
GPinput = false
IOMnum = 5
CEnum = 3
CEpol = low
@@ -0,0 +1,149 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := libam_bsp
COMPILERNAME := gcc
PROJECT := libam_bsp_gcc
CONFIG := bin
SHELL:=/bin/bash
#### Setup ####
TOOLCHAIN ?= arm-none-eabi
PART = apollo3
CPU = cortex-m4
FPU = fpv4-sp-d16
# Default to FPU hardware calling convention. However, some customers and/or
# applications may need the software calling convention.
#FABI = softfp
FABI = hard
#### Required Executables ####
CC = $(TOOLCHAIN)-gcc
GCC = $(TOOLCHAIN)-gcc
CPP = $(TOOLCHAIN)-cpp
LD = $(TOOLCHAIN)-ld
CP = $(TOOLCHAIN)-objcopy
OD = $(TOOLCHAIN)-objdump
RD = $(TOOLCHAIN)-readelf
AR = $(TOOLCHAIN)-ar
SIZE = $(TOOLCHAIN)-size
RM = $(shell which rm 2>/dev/null)
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
K := $(foreach exec,$(EXECUTABLES),\
$(if $(shell which $($(exec)) 2>/dev/null),,\
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
ifneq ($(strip $(value K)),)
all clean:
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
DEFINES = -DAM_PART_APOLLO3
DEFINES+= -DAM_PACKAGE_BGA
DEFINES+= -Dgcc
INCLUDES = -I../../../../CMSIS/AmbiqMicro/Include
INCLUDES+= -I../../../../devices
INCLUDES+= -I../../../../mcu/apollo3
INCLUDES+= -I../../../../CMSIS/ARM/Include
INCLUDES+= -I../../../../utils
VPATH = ..
SRC = am_bsp.c
SRC += am_bsp_pins.c
CSRC = $(filter %.c,$(SRC))
ASRC = $(filter %.s,$(SRC))
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
CFLAGS+= -ffunction-sections -fdata-sections
CFLAGS+= -MMD -MP -std=c99 -Wall
# Libraries O3 for production, examples O0 for debug.
CFLAGS+= -O3
CFLAGS+= $(DEFINES)
CFLAGS+= $(INCLUDES)
CFLAGS+=
# Additional user specified CFLAGS
CFLAGS+=$(EXTRA_CFLAGS)
ODFLAGS = -S
#### Rules ####
all: directories $(CONFIG)/$(TARGET).a
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS)
@echo " Compiling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS)
@echo " Assembling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/$(TARGET).a: $(OBJS)
@echo " Library $(COMPILERNAME) $@" ;\
$(AR) rsvc $@ $(OBJS)
clean:
@echo "Cleaning..." ;\
$(RM) -f $(OBJS) $(DEPS) \
$(CONFIG)/$(TARGET).a
$(CONFIG)/%.d: ;
# Automatically include any generated dependencies
-include $(DEPS)
endif
.PHONY: all clean directories
@@ -0,0 +1,81 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := libam_bsp
COMPILERNAME := iar
PROJECT := libam_bsp_iar
CONFIG := bin
AM_SoftwareRoot ?= ../../..
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p IarBuild.exe)
RM = $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
LIBS = ${libraries}
INCS = ${incs}
all: directories $(CONFIG)/$(TARGET).a
# Source Dependencies must be defined before they are used.
SRCS = .././am_bsp.c
SRCS += .././am_bsp_pins.c
$(CONFIG)/$(TARGET).a: $(LIBS) $(INCS) $(SRCS)
IarBuild.exe libam_bsp.ewp -make Debug -log info
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
# BSP's need this.
clean:
@echo Cleaning... ;\
IarBuild.exe libam_bsp.ewp -clean Debug -log all
endif
.PHONY: all clean directories
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\libam_bsp.ewp</path>
</project>
<batchBuild/>
</workspace>
@@ -0,0 +1,86 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := libam_bsp
COMPILERNAME := Keil
PROJECT := libam_bsp_Keil
CONFIG := bin
AM_SoftwareRoot ?= ../../../..
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p UV4.exe)
RM := $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
LIBS =
INCS = ../../../../CMSIS/AmbiqMicro/Include
INCS+= ../../../../devices
INCS+= ../../../../mcu/apollo3
INCS+= ../../../../CMSIS/ARM/Include
INCS+= ../../../../utils
all: directories $(CONFIG)/$(TARGET).lib
# Source Dependencies must be defined before they are used.
SRCS = .././am_bsp.c
SRCS += .././am_bsp_pins.c
$(CONFIG)/$(TARGET).lib: $(LIBS) $(INCS) $(SRCS)
UV4.exe -b -t "libam_bsp" libam_bsp.uvprojx -j0 || [ $$? -eq 1 ]
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
# BSP's need this.
clean:
@echo Cleaning... ;\
$(RM) -rf $(CONFIG)
endif
.PHONY: all clean directories
@@ -0,0 +1,216 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>libam_bsp</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>48000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\Listings\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>0</tLdApp>
<tGomain>0</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>3</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile>.\Dbg_RAM.ini</tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U483027775 -O2510 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP0 -TB1 -TFE0 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo3.FLM -FS00 -FL0100000 -FP0($$Device:AMA3B1KK-KBR$Flash\Apollo3.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DbgCM</Key>
<Name>-U-O206 -O206 -S2 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo -FS00 -FL080000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>-UV0264NGE -O2510 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS8002 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo3.FLM -FS00 -FL0100000 -FP0($$Device:AMA3B1KK-KBR$Flash\Apollo3.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>1</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<Lin2Executable></Lin2Executable>
<Lin2ConfigFile></Lin2ConfigFile>
<bLin2Auto>0</bLin2Auto>
<bAutoGenD>0</bAutoGenD>
<bAuto2GenD>0</bAuto2GenD>
</TargetOption>
</Target>
<Group>
<GroupName>source_files</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>.././am_bsp.c</PathWithFileName>
<FilenameWithoutPath>am_bsp.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>.././am_bsp_pins.c</PathWithFileName>
<FilenameWithoutPath>am_bsp_pins.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
</ProjectOpt>
@@ -0,0 +1,411 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>libam_bsp</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pArmCC></pArmCC>
<TargetOption>
<TargetCommonOption>
<Device>AMA3B1KK-KBR</Device>
<Vendor>Ambiq Micro</Vendor>
<PackID>AmbiqMicro.Apollo_DFP.1.1.0</PackID>
<PackURL>http://s3.asia.ambiqmicro.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x100000) IRAM(0x10000000,0x60000) CPUTYPE("Cortex-M4") FPU2 CLOCK(48000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10000000 -FC4000 -FN1 -FF0Apollo3 -FS00 -FL010000 -FP0($$Device:AMA3B1KK-KBR$Flash\Apollo3.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:AMA3B1KK-KBR$SVD\apollo3.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath>1024 BGA$Device\Include\apollo3.h\</RegisterFilePath>
<DBRegisterFilePath>1024 BGA$Device\Include\apollo3.h\</DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\bin\</OutputDirectory>
<OutputName>libam_bsp</OutputName>
<CreateExecutable>0</CreateExecutable>
<CreateLib>1</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>0</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\Listings\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin --output bin\libam_bsp.bin bin\libam_bsp.axf</UserProg1Name>
<UserProg2Name>fromelf -cedrst --output bin\libam_bsp.txt bin\libam_bsp.axf</UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x60000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x100000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x100000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x60000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>4</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>AM_PART_APOLLO3 AM_PACKAGE_BGA keil</Define>
<Undefine></Undefine>
<IncludePath>../../../../CMSIS/AmbiqMicro/Include;../../../../devices;../../../../mcu/apollo3;../../../../CMSIS/ARM/Include;../../../../utils</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x0</TextAddressRange>
<DataAddressRange>0x10000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>source_files</GroupName>
<Files>
<File>
<FileName>am_bsp.c</FileName>
<FileType>1</FileType>
<FilePath>../am_bsp.c</FilePath>
</File>
<File>
<FileName>am_bsp_pins.c</FileName>
<FileType>1</FileType>
<FilePath>../am_bsp_pins.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>lib</GroupName>
<Files>
</Files>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
</Project>