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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/Makefile
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#******************************************************************************
#
# Makefile - Rules for compiling
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
# Include rules specific to this board
-include ../../board-defs.mk
-include example-defs.mk
# All makefiles use this to find the top level directory.
SWROOT?=../../../..
# Include rules for building generic examples.
include $(SWROOT)/makedefs/example.mk
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/README.txt
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Name:
=====
multi_boot
Description:
============
Bootloader program accepting multiple host protocols.
Multiboot is a bootloader program that supports flash programming over UART,
SPI, and I2C. The correct protocol is selected automatically at boot time.
The messaging is expected to follow little-endian format, which is native to
the Cortex M4 used in Apollo and Apollo2.
If a valid image is already present on the target device, Multiboot will run
that image. Otherwise it will wait for a new image to be downloaded from
the host. A new image download can be forced on the target by using the
"override" capability via one of the pins.
Running this example requires 2 EVBs - one EVB to run multi_boot, the second
to run a host example such as spi_boot_host or i2c_boot_host. The two EVBs
are generally fly wired together as shown below.
The most straightforward method of running the demonstration is to use two
EVBs of the same type (i.e. 2 Apollo EVBs or 2 Apollo2 EVBs) as both the
host and the target. Then the pins on the two EVBs are connected as shown
in the chart including the optional reset and override pins. With these
connections, the host controls everything and no user intervention is
required other than the press the reset button on the host to initiate the
process.
The host downloads an executable (target) image to the slave that will run
on the target. By default that image is binary_counter, which is obvious
to see running on the slave.
In the default scenario (two boards of the same type), the image downloaded
by the host is compatible with the host board type, so it will run without
modification on the target. In the case of the host device being different
from the target, the image downloaded from the host must be modified to be
compatible with the target (requires rebuilding the host example).
The EVB Button1 (usually labelled BTN2 on the EVB silkscreen) is the manual
override which can be used to force downloading of a new image even if a
valid image already exists on the target. The host examples use the same
"override" pin signal when downloading a new image.
PIN fly lead connections assumed by multi_boot:
HOST SLAVE (multi_boot target)
-------- --------
GPIO[2] GPIO Interrupt (slave to host) GPIO[4] GPIO interrupt
GPIO[4] OVERRIDE pin (host to slave) GPIO[18] Override pin or n/c
GPIO[5] IOM0 SPI CLK/I2C SCL GPIO[0] IOS SPI SCK/I2C SCL
GPIO[6] IOM0 SPI MISO/I2C SDA GPIO[1] IOS SPI MISO/I2C SDA
GPIO[7] IOM0 SPI MOSI GPIO[2] IOS SPI MOSI
GPIO[11] IOM0 SPI nCE GPIO[3] IOS SPI nCE
GPIO[17] Slave reset (host to slave) Reset Pin (NRST) or n/c
GND GND
Reset and Override pin connections from Host are optional
Keeping Button1 pressed on target has same effect as host driving override
******************************************************************************
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/gcc/Makefile
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := multi_boot
COMPILERNAME := gcc
PROJECT := multi_boot_gcc
CONFIG := bin
SHELL:=/bin/bash
#### Setup ####
TOOLCHAIN ?= arm-none-eabi
PART = apollo2
CPU = cortex-m4
FPU = fpv4-sp-d16
#FABI = softfp
FABI = hard
LINKER_FILE := ./multi_boot.ld
STARTUP_FILE := ./startup_$(COMPILERNAME).c
#### Required Executables ####
CC = $(TOOLCHAIN)-gcc
GCC = $(TOOLCHAIN)-gcc
CPP = $(TOOLCHAIN)-cpp
LD = $(TOOLCHAIN)-ld
CP = $(TOOLCHAIN)-objcopy
OD = $(TOOLCHAIN)-objdump
RD = $(TOOLCHAIN)-readelf
AR = $(TOOLCHAIN)-ar
SIZE = $(TOOLCHAIN)-size
RM = $(shell which rm 2>/dev/null)
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
K := $(foreach exec,$(EXECUTABLES),\
$(if $(shell which $($(exec)) 2>/dev/null),,\
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
ifneq ($(strip $(value K)),)
all clean:
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
DEFINES = -DPART_$(PART)
DEFINES+= -D'AM_MULTIBOOT_CONFIG_FILE="am_multi_boot_config.h"'
DEFINES+= -DAM_PART_APOLLO2
DEFINES+= -DAM_PACKAGE_BGA
DEFINES+= -Dgcc
INCLUDES = -I../../../../../utils
INCLUDES+= -I../../../../../devices
INCLUDES+= -I../../../bsp
INCLUDES+= -I../../../../../mcu/apollo2
INCLUDES+= -I../../../../..
INCLUDES+= -I../src
INCLUDES+= -I../../../../../bootloader
VPATH = ../../../../../utils
VPATH+=:../src
VPATH+=:../../../../../devices
VPATH+=:../../../../../bootloader
SRC = extflash.c
SRC += multi_boot.c
SRC += am_util_delay.c
SRC += am_util_stdio.c
SRC += am_devices_spiflash.c
SRC += am_bootloader.c
SRC += am_ios_boot_handlers.c
SRC += am_multi_boot.c
SRC += am_uart_boot_handlers.c
SRC += startup_gcc.c
CSRC = $(filter %.c,$(SRC))
ASRC = $(filter %.s,$(SRC))
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
LIBS = ../../../bsp/gcc/bin/libam_bsp.a
LIBS += ../../../../../mcu/apollo2/hal/gcc/bin/libam_hal.a
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
CFLAGS+= -ffunction-sections -fdata-sections -fomit-frame-pointer
CFLAGS+= -MMD -MP -std=c99 -Wall -g
CFLAGS+= -O0
CFLAGS+= $(DEFINES)
CFLAGS+= $(INCLUDES)
CFLAGS+=
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
LFLAGS+= -nostartfiles -static
LFLAGS+= -Wl,--gc-sections,--entry,am_reset_isr,-Map,$(CONFIG)/$(TARGET).map
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
LFLAGS+=
# Additional user specified CFLAGS
CFLAGS+=$(EXTRA_CFLAGS)
CPFLAGS = -Obinary
ODFLAGS = -S
#### Rules ####
all: directories $(CONFIG)/$(TARGET).bin
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
@echo " Compiling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
@echo " Assembling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/$(TARGET).axf: $(OBJS) $(LIBS)
@echo " Linking $(COMPILERNAME) $@" ;\
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
$(CONFIG)/$(TARGET).bin: $(CONFIG)/$(TARGET).axf
@echo " Copying $(COMPILERNAME) $@..." ;\
$(CP) $(CPFLAGS) $< $@ ;\
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
clean:
@echo "Cleaning..." ;\
$(RM) -f $(OBJS) $(DEPS) \
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map
$(CONFIG)/%.d: ;
../../../bsp/gcc/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
../../../../../mcu/apollo2/hal/gcc/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo2/hal
# Automatically include any generated dependencies
-include $(DEPS)
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/gcc/multi_boot.ld
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/******************************************************************************
*
* multi_boot.ld - Linker script for applications using startup_gnu.c
*
*****************************************************************************/
ENTRY(am_reset_isr)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 24K
SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 88K
}
SECTIONS
{
.text :
{
. = ALIGN(4);
KEEP(*(.isr_vector))
*(.text)
*(.text*)
*(.rodata)
*(.rodata*)
. = ALIGN(4);
_etext = .;
} > FLASH
/* User stack section initialized by startup code. */
.stack (NOLOAD):
{
. = ALIGN(8);
*(.stack)
*(.stack*)
. = ALIGN(8);
} > SRAM
.data :
{
. = ALIGN(4);
_sdata = .;
*(.data)
*(.data*)
. = ALIGN(4);
_edata = .;
} > SRAM AT>FLASH
/* used by startup to initialize data */
_init_data = LOADADDR(.data);
.bss :
{
. = ALIGN(4);
_sbss = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} > SRAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/gcc/startup_gcc.c
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//*****************************************************************************
//
//! @file startup_gcc.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Forward declaration of interrupt handlers.
//
//*****************************************************************************
extern void am_reset_isr(void) __attribute ((naked));
extern void am_nmi_isr(void) __attribute ((weak));
extern void am_fault_isr(void) __attribute ((weak));
extern void am_mpufault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_busfault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_usagefault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_svcall_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_debugmon_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_pendsv_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_systick_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_brownout_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_watchdog_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_clkgen_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_vcomp_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_ios_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_acc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster2_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster3_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster4_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster5_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_gpio_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ctimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_uart_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_uart1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_adc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_pdm0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr2_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr3_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr4_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr5_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr6_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_stimer_cmpr7_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_flash_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software2_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software3_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_default_isr(void) __attribute ((weak));
//*****************************************************************************
//
// The entry point for the application.
//
//*****************************************************************************
extern int main(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
__attribute__ ((section(".stack")))
static uint32_t g_pui32Stack[1024];
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__attribute__ ((section(".isr_vector")))
void (* const g_am_pfnVectors[])(void) =
{
(void (*)(void))((uint32_t)g_pui32Stack + sizeof(g_pui32Stack)),
// The initial stack pointer
am_reset_isr, // The reset handler
am_nmi_isr, // The NMI handler
am_fault_isr, // The hard fault handler
am_fault_isr, // The MPU fault handler
am_fault_isr, // The bus fault handler
am_fault_isr, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
am_svcall_isr, // SVCall handle
am_debugmon_isr, // Debug monitor handler
0, // Reserved
am_pendsv_isr, // The PendSV handler
am_systick_isr, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout
am_watchdog_isr, // 1: Watchdog
am_clkgen_isr, // 2: CLKGEN
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_iomaster2_isr, // 8: I/O Master 2
am_iomaster3_isr, // 9: I/O Master 3
am_iomaster4_isr, // 10: I/O Master 4
am_iomaster5_isr, // 11: I/O Master 5
am_gpio_isr, // 12: GPIO
am_ctimer_isr, // 13: CTIMER
am_uart_isr, // 14: UART
am_uart1_isr, // 15: UART
am_adc_isr, // 16: ADC
am_pdm0_isr, // 17: PDM
am_stimer_isr, // 18: SYSTEM TIMER
am_stimer_cmpr0_isr, // 19: SYSTEM TIMER COMPARE0
am_stimer_cmpr1_isr, // 20: SYSTEM TIMER COMPARE1
am_stimer_cmpr2_isr, // 21: SYSTEM TIMER COMPARE2
am_stimer_cmpr3_isr, // 22: SYSTEM TIMER COMPARE3
am_stimer_cmpr4_isr, // 23: SYSTEM TIMER COMPARE4
am_stimer_cmpr5_isr, // 24: SYSTEM TIMER COMPARE5
am_stimer_cmpr6_isr, // 25: SYSTEM TIMER COMPARE6
am_stimer_cmpr7_isr, // 26: SYSTEM TIMER COMPARE7
am_flash_isr, // 27: FLASH
am_software0_isr, // 28: SOFTWARE0
am_software1_isr, // 29: SOFTWARE1
am_software2_isr, // 30: SOFTWARE2
am_software3_isr // 31: SOFTWARE3
};
//*****************************************************************************
//
// The following are constructs created by the linker, indicating where the
// the "data" and "bss" segments reside in memory. The initializers for the
// "data" segment resides immediately following the "text" segment.
//
//*****************************************************************************
extern uint32_t _etext;
extern uint32_t _sdata;
extern uint32_t _edata;
extern uint32_t _sbss;
extern uint32_t _ebss;
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
#if defined(__GNUC_STDC_INLINE__)
void
am_reset_isr(void)
{
//
// Set the vector table pointer.
//
__asm(" ldr r0, =0xE000ED08\n"
" ldr r1, =g_am_pfnVectors\n"
" str r1, [r0]");
//
// Set the stack pointer.
//
__asm(" ldr sp, [r1]");
#ifndef NOFPU
//
// Enable the FPU.
//
__asm("ldr r0, =0xE000ED88\n"
"ldr r1,[r0]\n"
"orr r1,#(0xF << 20)\n"
"str r1,[r0]\n"
"dsb\n"
"isb\n");
#endif
//
// Copy the data segment initializers from flash to SRAM.
//
__asm(" ldr r0, =_init_data\n"
" ldr r1, =_sdata\n"
" ldr r2, =_edata\n"
"copy_loop:\n"
" ldr r3, [r0], #4\n"
" str r3, [r1], #4\n"
" cmp r1, r2\n"
" blt copy_loop\n");
//
// Zero fill the bss segment.
//
__asm(" ldr r0, =_sbss\n"
" ldr r1, =_ebss\n"
" mov r2, #0\n"
"zero_loop:\n"
" cmp r0, r1\n"
" it lt\n"
" strlt r2, [r0], #4\n"
" blt zero_loop");
//
// Call the application's entry point.
//
main();
//
// If main returns then execute a break point instruction
//
__asm(" bkpt ");
}
#else
#error GNU STDC inline not supported.
#endif
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
void
am_nmi_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_fault_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/iar/Makefile
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := multi_boot
COMPILERNAME := iar
PROJECT := multi_boot_iar
CONFIG := bin
AM_SoftwareRoot ?= ../../../..
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p IarBuild.exe)
RM = $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
IarBuild.exe multi_boot.ewp -make Debug -log info
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
IarBuild.exe multi_boot.ewp -clean Debug -log all
../../../bsp/iar/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
../../../../../mcu/apollo2/hal/iar/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo2/hal
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/iar/bin/multi_boot.log
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/iar/multi_boot.ewd
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/iar/multi_boot.ewp
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/iar/multi_boot.eww
+10
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\multi_boot.ewp</path>
</project>
<batchBuild/>
</workspace>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/iar/multi_boot.icf
+101
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//*****************************************************************************
//
// multi_boot.icf
//
// IAR linker Configuration File
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
//
// Define a memory section that covers the entire 4 GB addressable space of the
// processor. (32-bit can address up to 4GB)
//
define memory mem with size = 4G;
//
// Define a region for the flash.
//
define region FLASH = mem:[from 0x00000000 to 0x00006000];
//
// Define a region for the SRAM.
//
define region SRAM = mem:[from 0x10000000 to 0x10016000];
//
// Define a block for the heap.
//
define block HEAP with alignment = 0x8, size = 0x00000000 { };
//
// Define a block for the stack.
//
define block CSTACK with alignment = 0x8, size = 1024 { };
//
// Read/Write values should be initialized by copying from flash.
//
initialize by copy { readwrite };
//
// Indicate that the noinit values should be left alone.
//
do not initialize { section .noinit };
//
// Place the interrupt vectors at the start of flash.
//
place at start of FLASH { readonly section .intvec };
//
// Place the remainder of the read-only items into flash.
//
place in FLASH { readonly };
//
// Place the stack at the start of SRAM.
//
place at start of SRAM { block CSTACK, section .noinit };
//
// Place all read/write items into SRAM.
//
place in SRAM { block HEAP, readwrite };
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/iar/startup_iar.c
+359
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@@ -0,0 +1,359 @@
//*****************************************************************************
//
//! @file startup_iar.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Enable the IAR extensions for this source file.
//
//*****************************************************************************
#pragma language = extended
//*****************************************************************************
//
// Weak function links.
//
//*****************************************************************************
#pragma weak am_mpufault_isr = am_fault_isr
#pragma weak am_busfault_isr = am_fault_isr
#pragma weak am_usagefault_isr = am_fault_isr
#pragma weak am_svcall_isr = am_default_isr
#pragma weak am_debugmon_isr = am_default_isr
#pragma weak am_pendsv_isr = am_default_isr
#pragma weak am_systick_isr = am_default_isr
#pragma weak am_brownout_isr = am_default_isr
#pragma weak am_watchdog_isr = am_default_isr
#pragma weak am_clkgen_isr = am_default_isr
#pragma weak am_vcomp_isr = am_default_isr
#pragma weak am_ioslave_ios_isr = am_default_isr
#pragma weak am_ioslave_acc_isr = am_default_isr
#pragma weak am_iomaster0_isr = am_default_isr
#pragma weak am_iomaster1_isr = am_default_isr
#pragma weak am_iomaster2_isr = am_default_isr
#pragma weak am_iomaster3_isr = am_default_isr
#pragma weak am_iomaster4_isr = am_default_isr
#pragma weak am_iomaster5_isr = am_default_isr
#pragma weak am_gpio_isr = am_default_isr
#pragma weak am_ctimer_isr = am_default_isr
#pragma weak am_uart_isr = am_default_isr
#pragma weak am_uart1_isr = am_default_isr
#pragma weak am_adc_isr = am_default_isr
#pragma weak am_pdm0_isr = am_default_isr
#pragma weak am_stimer_isr = am_default_isr
#pragma weak am_stimer_cmpr0_isr = am_default_isr
#pragma weak am_stimer_cmpr1_isr = am_default_isr
#pragma weak am_stimer_cmpr2_isr = am_default_isr
#pragma weak am_stimer_cmpr3_isr = am_default_isr
#pragma weak am_stimer_cmpr4_isr = am_default_isr
#pragma weak am_stimer_cmpr5_isr = am_default_isr
#pragma weak am_stimer_cmpr6_isr = am_default_isr
#pragma weak am_stimer_cmpr7_isr = am_default_isr
#pragma weak am_flash_isr = am_default_isr
#pragma weak am_software0_isr = am_default_isr
#pragma weak am_software1_isr = am_default_isr
#pragma weak am_software2_isr = am_default_isr
#pragma weak am_software3_isr = am_default_isr
//*****************************************************************************
//
// Forward declaration of the default fault handlers.
//
//*****************************************************************************
extern __stackless void am_reset_isr(void);
extern __weak void am_nmi_isr(void);
extern __weak void am_fault_isr(void);
extern void am_mpufault_isr(void);
extern void am_busfault_isr(void);
extern void am_usagefault_isr(void);
extern void am_svcall_isr(void);
extern void am_debugmon_isr(void);
extern void am_pendsv_isr(void);
extern void am_systick_isr(void);
extern void am_brownout_isr(void);
extern void am_watchdog_isr(void);
extern void am_clkgen_isr(void);
extern void am_vcomp_isr(void);
extern void am_ioslave_ios_isr(void);
extern void am_ioslave_acc_isr(void);
extern void am_iomaster0_isr(void);
extern void am_iomaster1_isr(void);
extern void am_iomaster2_isr(void);
extern void am_iomaster3_isr(void);
extern void am_iomaster4_isr(void);
extern void am_iomaster5_isr(void);
extern void am_gpio_isr(void);
extern void am_ctimer_isr(void);
extern void am_uart_isr(void);
extern void am_uart1_isr(void);
extern void am_adc_isr(void);
extern void am_pdm0_isr(void);
extern void am_stimer_isr(void);
extern void am_stimer_cmpr0_isr(void);
extern void am_stimer_cmpr1_isr(void);
extern void am_stimer_cmpr2_isr(void);
extern void am_stimer_cmpr3_isr(void);
extern void am_stimer_cmpr4_isr(void);
extern void am_stimer_cmpr5_isr(void);
extern void am_stimer_cmpr6_isr(void);
extern void am_stimer_cmpr7_isr(void);
extern void am_flash_isr(void);
extern void am_software0_isr(void);
extern void am_software1_isr(void);
extern void am_software2_isr(void);
extern void am_software3_isr(void);
extern void am_default_isr(void);
//*****************************************************************************
//
// The entry point for the application startup code.
//
//*****************************************************************************
extern void __iar_program_start(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
static uint32_t pui32Stack[1024] @ ".noinit";
//*****************************************************************************
//
// A union that describes the entries of the vector table. The union is needed
// since the first entry is the stack pointer and the remainder are function
// pointers.
//
//*****************************************************************************
typedef union
{
void (*pfnHandler)(void);
uint32_t ui32Ptr;
}
uVectorEntry;
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__root const uVectorEntry __vector_table[] @ ".intvec" =
{
{ .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) },
// The initial stack pointer
am_reset_isr, // The reset handler
am_nmi_isr, // The NMI handler
am_fault_isr, // The hard fault handler
am_fault_isr, // The MPU fault handler
am_fault_isr, // The bus fault handler
am_fault_isr, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
am_svcall_isr, // SVCall handle
am_debugmon_isr, // Debug monitor handler
0, // Reserved
am_pendsv_isr, // The PendSV handler
am_systick_isr, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout
am_watchdog_isr, // 1: Watchdog
am_clkgen_isr, // 2: CLKGEN
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_iomaster2_isr, // 8: I/O Master 2
am_iomaster3_isr, // 9: I/O Master 3
am_iomaster4_isr, // 10: I/O Master 4
am_iomaster5_isr, // 11: I/O Master 5
am_gpio_isr, // 12: GPIO
am_ctimer_isr, // 13: CTIMER
am_uart_isr, // 14: UART0
am_uart1_isr, // 15: UART1
am_adc_isr, // 16: ADC
am_pdm0_isr, // 17: PDM
am_stimer_isr, // 18: STIMER
am_stimer_cmpr0_isr, // 19: STIMER COMPARE0
am_stimer_cmpr1_isr, // 20: STIMER COMPARE1
am_stimer_cmpr2_isr, // 21: STIMER COMPARE2
am_stimer_cmpr3_isr, // 22: STIMER COMPARE3
am_stimer_cmpr4_isr, // 23: STIMER COMPARE4
am_stimer_cmpr5_isr, // 24: STIMER COMPARE5
am_stimer_cmpr6_isr, // 25: STIMER COMPARE6
am_stimer_cmpr7_isr, // 26: STIMER COMPARE7
am_flash_isr, // 27: FLASH
am_software0_isr, // 28: SOFTWARE0
am_software1_isr, // 29: SOFTWARE1
am_software2_isr, // 30: SOFTWARE2
am_software3_isr // 31: SOFTWARE3
};
//*****************************************************************************
//
// Note - The template for this function is originally found in IAR's module,
// low_level_init.c. As supplied by IAR, it is an empty function.
//
// This module contains the function `__low_level_init', a function
// that is called before the `main' function of the program. Normally
// low-level initializations - such as setting the prefered interrupt
// level or setting the watchdog - can be performed here.
//
// Note that this function is called before the data segments are
// initialized, this means that this function cannot rely on the
// values of global or static variables.
//
// When this function returns zero, the startup code will inhibit the
// initialization of the data segments. The result is faster startup,
// the drawback is that neither global nor static data will be
// initialized.
//
// Copyright 1999-2017 IAR Systems AB.
//
// $Revision: 112610 $
//
//
//
//
//*****************************************************************************
#define AM_REGVAL(x) (*((volatile uint32_t *)(x)))
#define VTOR_ADDR 0xE000ED08
__interwork int __low_level_init(void)
{
AM_REGVAL(VTOR_ADDR) = (uint32_t)&__vector_table;
/*==================================*/
/* Choose if segment initialization */
/* should be done or not. */
/* Return: 0 to omit seg_init */
/* 1 to run seg_init */
/*==================================*/
return 1;
}
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
void
am_reset_isr(void)
{
//
// Call the application's entry point.
//
__iar_program_start();
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
__weak void
am_nmi_isr(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
__weak void
am_fault_isr(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
static void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/keil/Dbg_RAM.ini
+62
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/*----------------------------------------------------------------------------
* Name: Dbg_RAM.ini
* Purpose: RAM Debug Initialization File
* Note(s):
*----------------------------------------------------------------------------
* This file is part of the uVision/ARM development tools.
* This software may only be used under the terms of a valid, current,
* end user licence from KEIL for a compatible version of KEIL software
* development tools. Nothing else gives you the right to use this software.
*
* This software is supplied "AS IS" without warranties of any kind.
*
* Copyright (c) 2008-2013 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
TraceSetup() Turn on ITM clocks, etc.
*----------------------------------------------------------------------------*/
FUNC void TraceSetup (void)
{
// turn on the ITM/TPIU clock
_WDWORD(0x40020250, 0x00000201); // TPIU clock enabled at 3MHz
}
/*----------------------------------------------------------------------------
Setup() configure PC & SP for RAM Debug
*----------------------------------------------------------------------------*/
FUNC void Setup (void) {
SP = _RDWORD(0x00000000+0x0); // Setup Stack Pointer
PC = _RDWORD(0x00000000+0x4); // Setup Program Counter
_WDWORD(0xE000ED08, 0x00000000+0x0); // Setup Vector Table Offset Register (done in system file)
}
LOAD %L INCREMENTAL // load the application
// Executed after reset via uVision's 'Reset'-button
FUNC void OnResetExec (void)
{
//Set_ui32HALflags();
//TraceSetup();
}
FUNC void Set_ui32HALflags (void)
{
TraceSetup();
//g_ui32HALflags = 0x00000001;
_break_ = 1;
}
Setup(); // Setup for Running
BS main, 1, "Set_ui32HALflags()";
g
/*----------------------------------------------------------------------------
*----------------------------------------------------------------------------*/
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/keil/JLinkSettings.ini
+40
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@@ -0,0 +1,40 @@
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
MonModeVTableAddr = 0xFFFFFFFF
MonModeDebug = 0
MaxNumAPs = 0
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile=""
[FLASH]
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 1
Device="AMAPH1KK-KBR"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/keil/Makefile
+80
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := multi_boot
COMPILERNAME := Keil
PROJECT := multi_boot_Keil
CONFIG := bin
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p UV4.exe)
RM := $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
UV4.exe -b -t "multi_boot" multi_boot.uvprojx -j0 || [ $$? -eq 1 ]
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
$(RM) -rf $(CONFIG)
../../../bsp/keil/bin/libam_bsp.lib:
$(MAKE) -C ../../../bsp
../../../../../mcu/apollo2/hal/keil/bin/libam_hal.lib:
$(MAKE) -C ../../../../../mcu/apollo2/hal
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/keil/bin/multi_boot.txt
+5855
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/keil/multi_boot.sct
+59
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@@ -0,0 +1,59 @@
;******************************************************************************
;
; multi_boot.sct
;
; Scatter file for Keil linker configuration.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
LR_1 0x00000000
{
FLASH 0x00000000 0x00006000
{
*.o (RESET, +First)
* (+RO)
}
SRAM 0x10000000 0x00016000
{
* (+RW, +ZI)
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/keil/multi_boot.uvoptx
+395
View File
@@ -0,0 +1,395 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>multi_boot</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>48000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\Listings\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>0</tLdApp>
<tGomain>0</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>3</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile>.\Dbg_RAM.ini</tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name></Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U483027775 -O2510 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP0 -TB1 -TFE0 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo2.FLM -FS00 -FL0100000 -FP0($$Device:AMAPH1KK-KBR$Flash\Apollo2.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DbgCM</Key>
<Name>-U-O206 -O206 -S2 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo -FS00 -FL080000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>-UV0264NGE -O2510 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS8002 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo2.FLM -FS00 -FL0100000 -FP0($$Device:AMAPH1KK-KBR$Flash\Apollo2.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>1</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<Lin2Executable></Lin2Executable>
<Lin2ConfigFile></Lin2ConfigFile>
<bLin2Auto>0</bLin2Auto>
<bAutoGenD>0</bAutoGenD>
<bAuto2GenD>0</bAuto2GenD>
</TargetOption>
</Target>
<Group>
<GroupName>src</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../src/extflash.c</PathWithFileName>
<FilenameWithoutPath>extflash.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../src/multi_boot.c</PathWithFileName>
<FilenameWithoutPath>multi_boot.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>utils</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_delay.c</PathWithFileName>
<FilenameWithoutPath>am_util_delay.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
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<PathWithFileName>../../../../../utils/am_util_stdio.c</PathWithFileName>
<FilenameWithoutPath>am_util_stdio.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
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</File>
</Group>
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<GroupName>devices</GroupName>
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<PathWithFileName>../../../../../devices/am_devices_spiflash.c</PathWithFileName>
<FilenameWithoutPath>am_devices_spiflash.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
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</File>
</Group>
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<GroupName>bootloader</GroupName>
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<File>
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<FilenameWithoutPath>am_bootloader.c</FilenameWithoutPath>
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</File>
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<FileNumber>7</FileNumber>
<FileType>1</FileType>
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<tvExpOptDlg>0</tvExpOptDlg>
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<PathWithFileName>../../../../../bootloader/am_ios_boot_handlers.c</PathWithFileName>
<FilenameWithoutPath>am_ios_boot_handlers.c</FilenameWithoutPath>
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<bShared>0</bShared>
</File>
<File>
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<PathWithFileName>../../../../../bootloader/am_multi_boot.c</PathWithFileName>
<FilenameWithoutPath>am_multi_boot.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>4</GroupNumber>
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<FileType>1</FileType>
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<PathWithFileName>../../../../../bootloader/am_uart_boot_handlers.c</PathWithFileName>
<FilenameWithoutPath>am_uart_boot_handlers.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
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</File>
</Group>
<Group>
<GroupName>keil</GroupName>
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<tvExpOptDlg>0</tvExpOptDlg>
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<PathWithFileName>../keil/startup_keil.s</PathWithFileName>
<FilenameWithoutPath>startup_keil.s</FilenameWithoutPath>
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</File>
</Group>
</ProjectOpt>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/keil/multi_boot.uvprojx
+474
View File
@@ -0,0 +1,474 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>multi_boot</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pArmCC></pArmCC>
<TargetOption>
<TargetCommonOption>
<Device>AMAPH1KK-KBR</Device>
<Vendor>Ambiq Micro</Vendor>
<PackID>AmbiqMicro.Apollo_DFP.1.0.0</PackID>
<PackURL>http://s3.asia.ambiqmicro.com/pack/</PackURL>
<Cpu>IRAM(0x10000000,0x40000) IROM(0x00000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10000000 -FC4000 -FN1 -FF0Apollo2 -FS00 -FL010000 -FP0($$Device:AMAPH1KK-KBR$Flash\Apollo2.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:AMAPH1KK-KBR$SVD\apollo2.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath>1024 BGA$Device\Include\Apollo2.h\</RegisterFilePath>
<DBRegisterFilePath>1024 BGA$Device\Include\Apollo2.h\</DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\bin\</OutputDirectory>
<OutputName>multi_boot</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\Listings\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>1</RunUserProg2>
<UserProg1Name>fromelf --bin --output bin\multi_boot.bin bin\multi_boot.axf</UserProg1Name>
<UserProg2Name>fromelf -cedrst --output bin\multi_boot.txt bin\multi_boot.axf</UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
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<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x40000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x100000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x100000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x40000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>AM_MULTIBOOT_CONFIG_FILE=\"am_multi_boot_config.h\" AM_PART_APOLLO2 AM_PACKAGE_BGA keil</Define>
<Undefine></Undefine>
<IncludePath>../../../../../utils;../../../../../devices;../../../bsp;../../../../../mcu/apollo2;../../../../..;../src;../../../../../bootloader</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x0</TextAddressRange>
<DataAddressRange>0x10000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\multi_boot.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>../../../../../mcu/apollo2/hal/keil/bin/libam_hal.lib(am_hal_global.o) --keep=am_hal_global.o(.data) </Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>src</GroupName>
<Files>
<File>
<FileName>extflash.c</FileName>
<FileType>1</FileType>
<FilePath>../src/extflash.c</FilePath>
</File>
<File>
<FileName>multi_boot.c</FileName>
<FileType>1</FileType>
<FilePath>../src/multi_boot.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>utils</GroupName>
<Files>
<File>
<FileName>am_util_delay.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_delay.c</FilePath>
</File>
<File>
<FileName>am_util_stdio.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_stdio.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>devices</GroupName>
<Files>
<File>
<FileName>am_devices_spiflash.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../devices/am_devices_spiflash.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>bootloader</GroupName>
<Files>
<File>
<FileName>am_bootloader.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../bootloader/am_bootloader.c</FilePath>
</File>
<File>
<FileName>am_ios_boot_handlers.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../bootloader/am_ios_boot_handlers.c</FilePath>
</File>
<File>
<FileName>am_multi_boot.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../bootloader/am_multi_boot.c</FilePath>
</File>
<File>
<FileName>am_uart_boot_handlers.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../bootloader/am_uart_boot_handlers.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>keil</GroupName>
<Files>
<File>
<FileName>startup_keil.s</FileName>
<FileType>1</FileType>
<FilePath>../keil/startup_keil.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>lib</GroupName>
<Files>
<File>
<FileName>libam_bsp.lib</FileName>
<FileType>4</FileType>
<FilePath>../../../bsp/keil/bin/libam_bsp.lib</FilePath>
</File>
<File>
<FileName>libam_hal.lib</FileName>
<FileType>4</FileType>
<FilePath>../../../../../mcu/apollo2/hal/keil/bin/libam_hal.lib</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/keil/startup_keil.s
+351
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@@ -0,0 +1,351 @@
;******************************************************************************
;
;! @file startup_keil.s
;!
;! @brief Definitions for Apollo2 interrupt handlers, the vector table, and the stack.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
;******************************************************************************
;
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;************************************************************************
Stack EQU 0x00001000
;******************************************************************************
;
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;
;******************************************************************************
Heap EQU 0x00000000
;******************************************************************************
;
; Allocate space for the stack.
;
;******************************************************************************
AREA STACK, NOINIT, READWRITE, ALIGN=3
StackMem
SPACE Stack
__initial_sp
;******************************************************************************
;
; Allocate space for the heap.
;
;******************************************************************************
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
HeapMem
SPACE Heap
__heap_limit
;******************************************************************************
;
; Indicate that the code in this file preserves 8-byte alignment of the stack.
;
;******************************************************************************
PRESERVE8
;******************************************************************************
;
; Place code into the reset code section.
;
;******************************************************************************
AREA RESET, CODE, READONLY
THUMB
;******************************************************************************
;
; The vector table.
;
;******************************************************************************
;
; Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
; am_usagefault_isr does not work if am_fault_isr is defined externally.
; Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
;
EXPORT __Vectors
__Vectors
DCD StackMem + Stack ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD am_nmi_isr ; NMI Handler
DCD am_fault_isr ; Hard Fault Handler
DCD am_fault_isr ; The MPU fault handler
DCD am_fault_isr ; The bus fault handler
DCD am_fault_isr ; The usage fault handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD am_svcall_isr ; SVCall handler
DCD am_debugmon_isr ; Debug monitor handler
DCD 0 ; Reserved
DCD am_pendsv_isr ; The PendSV handler
DCD am_systick_isr ; The SysTick handler
;
; Peripheral Interrupts
;
DCD am_brownout_isr ; 0: Reserved
DCD am_watchdog_isr ; 1: Reserved
DCD am_clkgen_isr ; 2: CLKGEN
DCD am_vcomp_isr ; 3: Voltage Comparator
DCD am_ioslave_ios_isr ; 4: I/O Slave general
DCD am_ioslave_acc_isr ; 5: I/O Slave access
DCD am_iomaster0_isr ; 6: I/O Master 0
DCD am_iomaster1_isr ; 7: I/O Master 1
DCD am_iomaster2_isr ; 8: I/O Master 2
DCD am_iomaster3_isr ; 9: I/O Master 3
DCD am_iomaster4_isr ; 10: I/O Master 4
DCD am_iomaster5_isr ; 11: I/O Master 5
DCD am_gpio_isr ; 12: GPIO
DCD am_ctimer_isr ; 13: CTIMER
DCD am_uart_isr ; 14: UART0
DCD am_uart1_isr ; 15: UART1
DCD am_adc_isr ; 16: ADC
DCD am_pdm0_isr ; 17: PDM
DCD am_stimer_isr ; 18: SYSTEM TIMER
DCD am_stimer_cmpr0_isr ; 19: SYSTEM TIMER COMPARE0
DCD am_stimer_cmpr1_isr ; 20: SYSTEM TIMER COMPARE1
DCD am_stimer_cmpr2_isr ; 21: SYSTEM TIMER COMPARE2
DCD am_stimer_cmpr3_isr ; 22: SYSTEM TIMER COMPARE3
DCD am_stimer_cmpr4_isr ; 23: SYSTEM TIMER COMPARE4
DCD am_stimer_cmpr5_isr ; 24: SYSTEM TIMER COMPARE5
DCD am_stimer_cmpr6_isr ; 25: SYSTEM TIMER COMPARE6
DCD am_stimer_cmpr7_isr ; 26: SYSTEM TIMER COMPARE7
DCD am_flash_isr ; 27: FLASH
DCD am_software0_isr ; 28: SOFTWARE0
DCD am_software1_isr ; 29: SOFTWARE1
DCD am_software2_isr ; 30: SOFTWARE2
DCD am_software3_isr ; 31: SOFTWARE3
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
;******************************************************************************
;
; This is the code that gets called when the processor first starts execution
; following a reset event.
;
;******************************************************************************
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
;
; Enable the FPU.
;
MOVW R0, #0xED88
MOVT R0, #0xE000
LDR R1, [R0]
ORR R1, #0x00F00000
STR R1, [R0]
DSB
ISB
;
; Branch to main.
;
LDR R0, =__main
BX R0
ENDP
;******************************************************************************
;
; Weak Exception Handlers.
;
;******************************************************************************
am_nmi_isr PROC
EXPORT am_nmi_isr [WEAK]
B .
ENDP
am_fault_isr\
PROC
EXPORT am_fault_isr [WEAK]
B .
ENDP
am_memmanage_isr\
PROC
EXPORT am_memmanage_isr [WEAK]
B .
ENDP
am_default_isr\
PROC
EXPORT am_svcall_isr [WEAK]
EXPORT am_debugmon_isr [WEAK]
EXPORT am_pendsv_isr [WEAK]
EXPORT am_systick_isr [WEAK]
EXPORT am_brownout_isr [WEAK]
EXPORT am_adc_isr [WEAK]
EXPORT am_watchdog_isr [WEAK]
EXPORT am_clkgen_isr [WEAK]
EXPORT am_vcomp_isr [WEAK]
EXPORT am_ioslave_ios_isr [WEAK]
EXPORT am_ioslave_acc_isr [WEAK]
EXPORT am_iomaster0_isr [WEAK]
EXPORT am_iomaster1_isr [WEAK]
EXPORT am_iomaster2_isr [WEAK]
EXPORT am_iomaster3_isr [WEAK]
EXPORT am_iomaster4_isr [WEAK]
EXPORT am_iomaster5_isr [WEAK]
EXPORT am_gpio_isr [WEAK]
EXPORT am_ctimer_isr [WEAK]
EXPORT am_uart_isr [WEAK]
EXPORT am_uart0_isr [WEAK]
EXPORT am_uart1_isr [WEAK]
EXPORT am_pdm0_isr [WEAK]
EXPORT am_stimer_isr [WEAK]
EXPORT am_stimer_cmpr0_isr [WEAK]
EXPORT am_stimer_cmpr1_isr [WEAK]
EXPORT am_stimer_cmpr2_isr [WEAK]
EXPORT am_stimer_cmpr3_isr [WEAK]
EXPORT am_stimer_cmpr4_isr [WEAK]
EXPORT am_stimer_cmpr5_isr [WEAK]
EXPORT am_stimer_cmpr6_isr [WEAK]
EXPORT am_stimer_cmpr7_isr [WEAK]
EXPORT am_flash_isr [WEAK]
EXPORT am_software0_isr [WEAK]
EXPORT am_software1_isr [WEAK]
EXPORT am_software2_isr [WEAK]
EXPORT am_software3_isr [WEAK]
am_svcall_isr
am_debugmon_isr
am_pendsv_isr
am_systick_isr
am_brownout_isr
am_adc_isr
am_watchdog_isr
am_clkgen_isr
am_vcomp_isr
am_ioslave_ios_isr
am_ioslave_acc_isr
am_iomaster0_isr
am_iomaster1_isr
am_iomaster2_isr
am_iomaster3_isr
am_iomaster4_isr
am_iomaster5_isr
am_gpio_isr
am_ctimer_isr
am_uart_isr
am_uart0_isr
am_uart1_isr
am_pdm0_isr
am_stimer_isr
am_stimer_cmpr0_isr
am_stimer_cmpr1_isr
am_stimer_cmpr2_isr
am_stimer_cmpr3_isr
am_stimer_cmpr4_isr
am_stimer_cmpr5_isr
am_stimer_cmpr6_isr
am_stimer_cmpr7_isr
am_flash_isr
am_software0_isr
am_software1_isr
am_software2_isr
am_software3_isr
; all device interrupts go here unless the weak label is over
; ridden in the linker hard spin so the debugger will know it
; was an unhandled interrupt request a come-from-buffer or
; instruction trace hardware would sure be nice if you get here
B .
ENDP
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; Initialization of the heap and stack.
;
;******************************************************************************
AREA |.text|, CODE, READONLY
;******************************************************************************
;
; User Initial Stack & Heap.
;
;******************************************************************************
IF :DEF: __MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =HeapMem
LDR R1, =(StackMem + Stack)
LDR R2, =(HeapMem + Heap)
LDR R3, =StackMem
BX LR
ENDP
ENDIF
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; All Done
;
;******************************************************************************
END
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/src/am_multi_boot_config.h
+148
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@@ -0,0 +1,148 @@
//*****************************************************************************
//
//! @file am_multi_boot_config.h
//!
//! @brief Global bootloader information.
//!
//! This is a bootloader program that supports flash programming over UART,
//! SPI, and I2C. The correct protocol is selected automatically at boot time.
//!
//! SWO is configured in 1M baud, 8-n-1 mode.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_MULTI_BOOT_CONFIG_H
#define AM_MULTI_BOOT_CONFIG_H
//*****************************************************************************
//
// Run with flag page.
//
//*****************************************************************************
#define USE_FLAG_PAGE 1
//*****************************************************************************
//
// Support for external SPI NOR Flash.
//
//*****************************************************************************
// Note: this will increase the bootloader size by about 8.5KB.
// Note: this will increase the SRAM size by about 60KB.
#define USE_EXTERNAL_FLASH 0
//*****************************************************************************
//
// Location of the flag page.
//
//*****************************************************************************
#define FLAG_PAGE_LOCATION 0x00006000
//*****************************************************************************
//
// Max Size of Bootloader.
//
//*****************************************************************************
// The value here must match (at least) with the ROLength restriction imposed at
// bootloader linker configuration
#if USE_EXTERNAL_FLASH == 1
#define MAX_BOOTLOADER_SIZE 0x00005000
#else
#define MAX_BOOTLOADER_SIZE 0x00003000
#endif //USE_EXTERNAL_FLASH == 1
// The value here must match (at least) with the RWLength restriction imposed at
// bootloader linker configuration
#if USE_EXTERNAL_FLASH == 1
#define MAX_SRAM_USED 0x00016000
#else
#define MAX_SRAM_USED 0x00006000
#endif
//*****************************************************************************
//
// Default Override Pin mapped to Button1
//
//*****************************************************************************
#define DEFAULT_OVERRIDE_GPIO AM_BSP_GPIO_BUTTON1
//*****************************************************************************
//
// I2C Address to use
//
//*****************************************************************************
#define I2C_SLAVE_ADDR 0x10
//*****************************************************************************
// Definitions below are don't care for multiboot-core
//*****************************************************************************
//*****************************************************************************
//
// Multiboot mode supported.
//
//*****************************************************************************
#define AM_MULTIBOOT_SUPPORT_IOS // enables support for boot over IOS (SPI/I2C)
#define AM_MULTIBOOT_SUPPORT_UART // enables support for boot over UART
#define AM_MULTIBOOT_SUPPORT_OTA // enables support for OTA upgrade
//*****************************************************************************
//
// Location of the OTA_POINTER
// This should ideally be a separate page.
// However, currently set to an offset within the flag page, just to avoid
// wasting a flash page.
//
//*****************************************************************************
//#define OTA_POINTER_LOCATION 0x16000
#define OTA_POINTER_LOCATION (FLAG_PAGE_LOCATION + 256)
//
// IOS interrupt pin to use
//
#define MULTIBOOT_IOS_INTERRUPT_PIN 4
// Time to wait for host to initiate download over IOS before switching to UART
#define WAIT_IOS_BOOT_MS 200
#define WAIT_IOS_BOOT_SYSTICK ((AM_HAL_CLKGEN_FREQ_MAX_HZ/1000)*WAIT_IOS_BOOT_MS)
#define MULTIBOOT_DETECT_BAUDRATE
#define MULTIBOOT_UART_BAUDRATE 115200
#endif // AM_MULTI_BOOT_CONFIG_H
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/src/extflash.c
+221
View File
@@ -0,0 +1,221 @@
//*****************************************************************************
//
//! @file extflash.c
//!
//! @brief This file provides the external flash handling interfaces
//!
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include "am_mcu_apollo.h"
#include "am_devices.h"
#include "am_bsp.h"
#include "am_util.h"
#include "am_multi_boot.h"
#include "extflash.h"
//*****************************************************************************
//
// External Flash handling
//
//*****************************************************************************
#ifndef AM_BSP_FLASH_IOM
#define AM_BSP_FLASH_IOM 0
#endif
#ifndef AM_BSP_FLASH_CS
#define AM_BSP_FLASH_CS 4
#endif
#ifndef AM_BSP_GPIO_FLASH_CS
#define AM_BSP_GPIO_FLASH_CS 31
#endif
#ifndef AM_BSP_GPIO_CFG_FLASH_CS
#define AM_BSP_GPIO_CFG_FLASH_CS AM_HAL_PIN_31_M0nCE4
#endif
//*****************************************************************************
//
// Device structure for the SPI flash.
//
//*****************************************************************************
am_devices_spiflash_t g_sSpiFlash =
{
.ui32IOMModule = AM_BSP_FLASH_IOM,
.ui32ChipSelect = AM_BSP_FLASH_CS,
};
//*****************************************************************************
//
// Configuration structure for the IO Master.
//
//*****************************************************************************
am_hal_iom_config_t g_sIOMConfig =
{
.ui32InterfaceMode = AM_HAL_IOM_SPIMODE,
.ui32ClockFrequency = AM_HAL_IOM_8MHZ,
.bSPHA = 0,
.bSPOL = 0,
.ui8WriteThreshold = 0,
.ui8ReadThreshold = 60,
};
//*****************************************************************************
//
// Configure GPIOs for communicating with a SPI flash
//
//*****************************************************************************
static void
configure_spiflash_pins(void)
{
//
// Set up IOM1 SPI pins.
//
am_bsp_iom_spi_pins_enable(AM_BSP_FLASH_IOM);
//
// Enable the chip-select and data-ready pins for the SPI FLASH
//
am_bsp_pin_enable(FLASH_CS);
}
static int ext_flash_erase_sector(uint32_t ui32DstAddr)
{
am_devices_spiflash_sector_erase(ui32DstAddr);
return 0;
}
static int
ext_flash_init(void)
{
//storage in external flash
#if defined(AM_PART_APOLLO2)
//
// Power on SPI
//
am_hal_iom_pwrctrl_enable(AM_BSP_FLASH_IOM);
#endif
//
// initialize spi interface with external flash
//
am_hal_iom_config(AM_BSP_FLASH_IOM, &g_sIOMConfig);
#if defined(AM_PART_APOLLO2)
//
// Save the configuration
//
am_hal_iom_power_off_save(AM_BSP_FLASH_IOM);
#endif
//
// configure pins for iom interface
//
configure_spiflash_pins();
//
// Initialize the spiflash driver with the IOM information for the second
// flash device.
//
am_devices_spiflash_init(&g_sSpiFlash);
return 0;
}
static int
ext_flash_enable(void)
{
//
// Turn on the IOM for this operation.
//
#if defined(AM_PART_APOLLO2)
am_hal_iom_power_on_restore(AM_BSP_FLASH_IOM);
#endif
am_hal_iom_enable(AM_BSP_FLASH_IOM);
am_bsp_iom_spi_pins_enable(AM_BSP_FLASH_IOM);
return 0;
}
static int
ext_flash_disable(void)
{
//
// Disable IOM1 SPI pins and turn off the IOM for this operation.
//
am_bsp_iom_spi_pins_disable(AM_BSP_FLASH_IOM);
am_hal_iom_disable(AM_BSP_FLASH_IOM);
#if defined(AM_PART_APOLLO2)
am_hal_iom_power_off_save(AM_BSP_FLASH_IOM);
#endif
return 0;
}
static int
ext_flash_deinit(void)
{
return 0;
}
static int
ext_flash_write_page(uint32_t ui32DestAddr, uint32_t *pSrc, uint32_t ui32Length)
{
am_devices_spiflash_write((uint8_t *)pSrc, ui32DestAddr, ui32Length);
return 0;
}
static int
ext_flash_read_page(uint32_t ui32DestAddr, uint32_t *pSrc, uint32_t ui32Length)
{
am_devices_spiflash_read((uint8_t *)ui32DestAddr, (uint32_t)pSrc, ui32Length);
return 0;
}
am_multiboot_flash_info_t g_extFlash =
{
.flashPageSize = AM_DEVICES_SPIFLASH_PAGE_SIZE,
.flashSectorSize = AM_DEVICES_SPIFLASH_SECTOR_SIZE,
.flash_init = ext_flash_init,
.flash_deinit = ext_flash_deinit,
.flash_enable = ext_flash_enable,
.flash_disable = ext_flash_disable,
.flash_read_page = ext_flash_read_page,
.flash_write_page = ext_flash_write_page,
.flash_erase_sector = ext_flash_erase_sector,
};
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/src/extflash.h
+94
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@@ -0,0 +1,94 @@
//*****************************************************************************
//
//! @file extflash.h
//!
//! @brief Brief description of the header. No need to get fancy here.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AMOTAS_EXTFLASH_H
#define AMOTAS_EXTFLASH_H
#include "am_mcu_apollo.h"
#include "am_devices.h"
#include "am_bsp.h"
#include "am_util.h"
#include "am_multi_boot.h"
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Macro definitions
//
//*****************************************************************************
//
// Fixed external SPI Flash storage start address to be defined by user.
//
#define AMOTA_EXT_FLASH_STORAGE_START_ADDRESS 0
//*****************************************************************************
//
// External variable definitions
//
//*****************************************************************************
extern am_multiboot_flash_info_t g_extFlash;
//*****************************************************************************
//
// External function definitions.
//
//*****************************************************************************
//*****************************************************************************
//
// function definitions
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // AMOTAS_EXTFLASH_H
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo2_evb/examples/multi_boot/src/multi_boot.c
+401
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@@ -0,0 +1,401 @@
//*****************************************************************************
//
//! @file multi_boot.c
//!
//! @brief Bootloader program accepting multiple host protocols.
//!
//! Multiboot is a bootloader program that supports flash programming over UART,
//! SPI, and I2C. The correct protocol is selected automatically at boot time.
//! The messaging is expected to follow little-endian format, which is native to
//! the Cortex M4 used in Apollo and Apollo2.
//!
//! If a valid image is already present on the target device, Multiboot will run
//! that image. Otherwise it will wait for a new image to be downloaded from
//! the host. A new image download can be forced on the target by using the
//! "override" capability via one of the pins.
//!
//! Running this example requires 2 EVBs - one EVB to run multi_boot, the second
//! to run a host example such as spi_boot_host or i2c_boot_host. The two EVBs
//! are generally fly wired together as shown below.
//!
//! The most straightforward method of running the demonstration is to use two
//! EVBs of the same type (i.e. 2 Apollo EVBs or 2 Apollo2 EVBs) as both the
//! host and the target. Then the pins on the two EVBs are connected as shown
//! in the chart including the optional reset and override pins. With these
//! connections, the host controls everything and no user intervention is
//! required other than the press the reset button on the host to initiate the
//! process.
//!
//! The host downloads an executable (target) image to the slave that will run
//! on the target. By default that image is binary_counter, which is obvious
//! to see running on the slave.
//!
//! In the default scenario (two boards of the same type), the image downloaded
//! by the host is compatible with the host board type, so it will run without
//! modification on the target. In the case of the host device being different
//! from the target, the image downloaded from the host must be modified to be
//! compatible with the target (requires rebuilding the host example).
//!
//! The EVB Button1 (usually labelled BTN2 on the EVB silkscreen) is the manual
//! override which can be used to force downloading of a new image even if a
//! valid image already exists on the target. The host examples use the same
//! "override" pin signal when downloading a new image.
//!
//! @verbatim
//! PIN fly lead connections assumed by multi_boot:
//! HOST SLAVE (multi_boot target)
//! -------- --------
//! GPIO[2] GPIO Interrupt (slave to host) GPIO[4] GPIO interrupt
//! GPIO[4] OVERRIDE pin (host to slave) GPIO[18] Override pin or n/c
//! GPIO[5] IOM0 SPI CLK/I2C SCL GPIO[0] IOS SPI SCK/I2C SCL
//! GPIO[6] IOM0 SPI MISO/I2C SDA GPIO[1] IOS SPI MISO/I2C SDA
//! GPIO[7] IOM0 SPI MOSI GPIO[2] IOS SPI MOSI
//! GPIO[11] IOM0 SPI nCE GPIO[3] IOS SPI nCE
//! GPIO[17] Slave reset (host to slave) Reset Pin (NRST) or n/c
//! GND GND
//! Reset and Override pin connections from Host are optional
//! Keeping Button1 pressed on target has same effect as host driving override
//! @endverbatim
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include "am_mcu_apollo.h"
#include "am_bsp.h"
#include "am_util.h"
#include "am_multi_boot_config.h"
#include "am_multi_boot.h"
#if USE_EXTERNAL_FLASH == 1
#include "extflash.h"
#endif //USE_EXTERNAL_FLASH == 1
#ifdef AM_MULTIBOOT_SUPPORT_IOS
//*****************************************************************************
//
// Global variable to let the main loop know whether the IOS interface has been
// used yet.
//
//*****************************************************************************
volatile bool g_bIOSActive = false;
//*****************************************************************************
//
// IO Slave Register Access ISR.
//
//*****************************************************************************
void
am_ioslave_acc_isr(void)
{
//
// Make sure the main loop knows that the IOS is currently in use.
//
g_bIOSActive = true;
am_multiboot_ios_acc_isr_handler();
}
#endif
#ifdef AM_MULTIBOOT_SUPPORT_UART
#ifdef MULTIBOOT_DETECT_BAUDRATE
volatile bool g_bUartConfigured = false;
//*****************************************************************************
//
// Setting up a GPIO ISR for the UART autobaud feature.
//
//*****************************************************************************
void
am_gpio_isr(void)
{
uint32_t ui32BaudRate;
ui32BaudRate = am_multiboot_uart_detect_baudrate(AM_BSP_GPIO_BOOTLOADER_UART_RX);
//
// Now that we have a baud rate, we can configure our UART.
//
am_multiboot_setup_serial(AM_BSP_UART_BOOTLOADER_INST, ui32BaudRate);
//
// Send a '0x55' to give the boot host some indication that we have the
// correct baud rate and to let it know that our UART is ready for further
// traffic.
//
am_hal_uart_char_transmit_polled(AM_BSP_UART_BOOTLOADER_INST, 0x55);
g_bUartConfigured = true;
}
#endif
//*****************************************************************************
//
// UART ISR
//
//*****************************************************************************
void
#if (AM_BSP_UART_BOOTLOADER_INST == 0)
am_uart_isr(void)
#elif (AM_BSP_UART_BOOTLOADER_INST == 1)
am_uart1_isr(void)
#endif
{
am_multiboot_uart_isr_handler(AM_BSP_UART_BOOTLOADER_INST);
}
#endif
// Need temporary buf equal to one flash sector size (larger of int or ext, if ext flash is supported)
// We accumulate data in this buffer and perform Writes only on page boundaries in
// multiple of page lentghs
#if (USE_EXTERNAL_FLASH == 1) && (AM_DEVICES_SPIFLASH_SECTOR_SIZE > AM_HAL_FLASH_PAGE_SIZE)
#define TEMP_BUFSIZE AM_DEVICES_SPIFLASH_SECTOR_SIZE
#else
#define TEMP_BUFSIZE AM_HAL_FLASH_PAGE_SIZE
#endif
uint32_t sramTempBuf[TEMP_BUFSIZE / 4];
#ifdef AM_MULTIBOOT_SUPPORT_OTA
// Invalidate the OTA - so that it is not processed again for next boot
void invalidate_ota(am_multiboot_ota_t *pOtaInfo)
{
uint32_t tempZero;
uint32_t otaPtrVal = *((uint32_t *)OTA_POINTER_LOCATION);
// CAUTION: We can reprogram a bit in flash to 0 only once...so make sure we do not re-clear bits
tempZero = ~otaPtrVal;
// clear the value for subsequent boots
am_bootloader_write_flash_within_page(OTA_POINTER_LOCATION, &tempZero, 1);
}
#endif
//*****************************************************************************
//
// Main function.
//
//*****************************************************************************
int
main(void)
{
am_bootloader_image_t *pBootImage;
bool bOverride = false;
bool bBootFromFlash = false;
#ifdef AM_MULTIBOOT_SUPPORT_OTA
uint32_t otaPtrVal = *((uint32_t *)OTA_POINTER_LOCATION);
#endif
#ifdef AM_MULTIBOOT_SUPPORT_IOS
//
// Set the (active LOW) interrupt pin so the host knows we don't have a
// message to send yet.
//
am_hal_gpio_out_bit_set(MULTIBOOT_IOS_INTERRUPT_PIN);
am_hal_gpio_pin_config(MULTIBOOT_IOS_INTERRUPT_PIN, AM_HAL_PIN_OUTPUT);
#endif
bBootFromFlash = am_multiboot_check_boot_from_flash(&bOverride, &pBootImage);
if (!bOverride)
{
#ifdef AM_MULTIBOOT_SUPPORT_OTA
// Check if OTA available
if ((otaPtrVal != 0xFFFFFFFF) && (otaPtrVal != 0))
{
//
// Configure the board for low power.
//
am_bsp_low_power_init();
//
// If we get here, we're going to try to download a new image from a host
// processor. Speed up the clocks and start turning on peripherals.
//
am_hal_clkgen_sysclk_select(AM_HAL_CLKGEN_SYSCLK_MAX);
// function below does not return in case of success
#if USE_EXTERNAL_FLASH == 1
if (am_multiboot_ota_handler((void *)otaPtrVal, sramTempBuf, sizeof(sramTempBuf), invalidate_ota, &g_extFlash) == false)
#else
if (am_multiboot_ota_handler((void *)otaPtrVal, sramTempBuf, sizeof(sramTempBuf), invalidate_ota, NULL) == false)
#endif //USE_EXTERNAL_FLASH == 1
{
if (bBootFromFlash)
{
// We want to run the flash image with clean slate...
// So doing a POI here, and the image will be run in the next boot
//
// Perform a software reset.
//
am_hal_reset_poi();
}
}
}
#endif
if (bBootFromFlash)
{
#ifdef AM_MULTIBOOT_SUPPORT_IOS
//
// If everything looks good, disable the interrupt pin and run.
//
am_hal_gpio_pin_config(MULTIBOOT_IOS_INTERRUPT_PIN, AM_HAL_PIN_DISABLE);
#endif
am_bootloader_image_run(pBootImage);
}
}
//
// If we get here, we're going to try to download a new image from a host
// processor. Speed up the clocks and start turning on peripherals.
//
am_hal_clkgen_sysclk_select(AM_HAL_CLKGEN_SYSCLK_MAX);
//
// Configure the board for low power.
//
am_bsp_low_power_init();
//
// Provide temp buffer for multiboot to operate on
//
am_multiboot_init(sramTempBuf, sizeof(sramTempBuf));
#ifdef AM_MULTIBOOT_SUPPORT_IOS
//
// Start systick to measure time for the IOS timeout.
//
am_hal_systick_load(0x00FFFFFF);
am_hal_systick_start();
//
// Enable the IOS. Choose the correct protocol based on the state of pin 0.
//
am_multiboot_setup_ios_interface(MULTIBOOT_IOS_INTERRUPT_PIN);
//
// Wait for a few milliseconds to see if anyone will send us data.
//
while ( g_bIOSActive
#ifdef AM_MULTIBOOT_SUPPORT_UART
|| am_hal_systick_count() > (0xFFFFFF - WAIT_IOS_BOOT_SYSTICK)
#endif
)
{
//
// Delay to avoid polling peripheral registers so frequently.
//
am_util_delay_ms(1);
}
//
// If we didn't get any IOS packets, we'll move on to the UART option.
//
am_multiboot_cleanup_ios_interface();
am_hal_gpio_pin_config(MULTIBOOT_IOS_INTERRUPT_PIN, AM_HAL_PIN_DISABLE);
#endif
#ifdef AM_MULTIBOOT_SUPPORT_UART
#ifdef MULTIBOOT_DETECT_BAUDRATE
//
// Re-Start systick to measure time for autobaud and for the IOS timeout.
//
am_hal_systick_stop();
am_hal_systick_load(0x00FFFFFF);
am_hal_systick_start();
//
// Configure our RX pin as a GPIO input with a falling edge interrupt.
//
am_hal_gpio_pin_config(AM_BSP_GPIO_BOOTLOADER_UART_RX, AM_HAL_GPIO_INPUT);
am_hal_gpio_int_polarity_bit_set(AM_BSP_GPIO_BOOTLOADER_UART_RX, AM_HAL_GPIO_FALLING);
am_hal_gpio_int_clear(AM_HAL_GPIO_BIT(AM_BSP_GPIO_BOOTLOADER_UART_RX));
am_hal_gpio_int_enable(AM_HAL_GPIO_BIT(AM_BSP_GPIO_BOOTLOADER_UART_RX));
am_hal_interrupt_enable(AM_HAL_INTERRUPT_GPIO);
//
// Enable interrupts so we can receive messages from the boot host.
//
am_hal_interrupt_master_enable();
while (1)
{
//
// Disable interrupt while we decide whether we're going to sleep.
//
uint32_t ui32IntStatus = am_hal_interrupt_master_disable();
if (!g_bUartConfigured)
{
// Wait for Baud rate detection
am_hal_sysctrl_sleep(false);
//
// Enable interrupts
//
am_hal_interrupt_master_set(ui32IntStatus);
}
else
{
//
// Enable interrupts
//
am_hal_interrupt_master_set(ui32IntStatus);
break;
}
}
// ISR has already configured the UART by now
am_hal_gpio_int_disable(AM_HAL_GPIO_BIT(AM_BSP_GPIO_BOOTLOADER_UART_RX));
am_hal_interrupt_disable(AM_HAL_INTERRUPT_GPIO);
#else
//
// Now that we have a baud rate, we can configure our UART.
//
am_multiboot_setup_serial(AM_BSP_UART_BOOTLOADER_INST, MULTIBOOT_UART_BAUDRATE);
#endif
//
// Make sure the UART RX and TX pins are enabled.
//
am_hal_gpio_pin_config(AM_BSP_GPIO_BOOTLOADER_UART_TX, AM_BSP_GPIO_CFG_BOOTLOADER_UART_TX);
am_hal_gpio_pin_config(AM_BSP_GPIO_BOOTLOADER_UART_RX, AM_BSP_GPIO_CFG_BOOTLOADER_UART_RX);
//
// Enable interrupts so we can receive messages from the boot host.
//
am_hal_interrupt_master_enable();
#endif
//
// Loop forever - should never reach here
//
while (1)
{
}
}