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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/Makefile
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
SUBDIRS:=$(dir $(wildcard */Makefile))
all subdirs:
@for i in ${SUBDIRS}; do \
$(MAKE) -C $${i} || exit $$? ;\
done
clean:
@for i in ${SUBDIRS}; do \
$(MAKE) -C $${i} $@ || exit $$? ;\
done
.PHONY: $(SUBDIRS) all subdirs clean
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/Makefile
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#******************************************************************************
#
# Makefile - Rules for compiling
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
# Include rules specific to this board
-include ../../board-defs.mk
-include example-defs.mk
# All makefiles use this to find the top level directory.
SWROOT?=../../../..
# Include rules for building generic examples.
include $(SWROOT)/makedefs/example.mk
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/README.txt
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Name:
=====
adc_vbatt
Description:
============
ADC VBATT voltage divider, BATT load, and temperature reading example.
This example initializes the ADC, and a timer. Two times per second it
reads the VBATT voltage divider and temperature sensor and prints them.
It monitors button 0 and if pressed, it turns on the BATT LOAD resistor.
One should monitor MCU current to see when the load is on or off.
Printing takes place over the ITM at 1M Baud.
******************************************************************************
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/gcc/Makefile
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := adc_vbatt
COMPILERNAME := gcc
PROJECT := adc_vbatt_gcc
CONFIG := bin
SHELL:=/bin/bash
#### Setup ####
TOOLCHAIN ?= arm-none-eabi
PART = apollo
CPU = cortex-m4
FPU = fpv4-sp-d16
#FABI = softfp
FABI = hard
LINKER_FILE := ./adc_vbatt.ld
STARTUP_FILE := ./startup_$(COMPILERNAME).c
#### Required Executables ####
CC = $(TOOLCHAIN)-gcc
GCC = $(TOOLCHAIN)-gcc
CPP = $(TOOLCHAIN)-cpp
LD = $(TOOLCHAIN)-ld
CP = $(TOOLCHAIN)-objcopy
OD = $(TOOLCHAIN)-objdump
RD = $(TOOLCHAIN)-readelf
AR = $(TOOLCHAIN)-ar
SIZE = $(TOOLCHAIN)-size
RM = $(shell which rm 2>/dev/null)
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
K := $(foreach exec,$(EXECUTABLES),\
$(if $(shell which $($(exec)) 2>/dev/null),,\
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
ifneq ($(strip $(value K)),)
all clean:
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
DEFINES = -DPART_$(PART)
DEFINES+= -DAM_PART_APOLLO
DEFINES+= -DAM_PACKAGE_BGA
DEFINES+= -Dgcc
INCLUDES = -I../../../../../devices
INCLUDES+= -I../../../../../mcu/apollo
INCLUDES+= -I../src
INCLUDES+= -I../../../bsp
INCLUDES+= -I../../../../../utils
INCLUDES+= -I../../../../..
VPATH = ../../../../../devices
VPATH+=:../src
VPATH+=:../../../../../utils
SRC = adc_vbatt.c
SRC += am_devices_led.c
SRC += am_util_delay.c
SRC += am_util_faultisr.c
SRC += am_util_stdio.c
SRC += startup_gcc.c
CSRC = $(filter %.c,$(SRC))
ASRC = $(filter %.s,$(SRC))
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
LIBS = ../../../../../mcu/apollo/hal/gcc/bin/libam_hal.a
LIBS += ../../../bsp/gcc/bin/libam_bsp.a
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
CFLAGS+= -ffunction-sections -fdata-sections
CFLAGS+= -MMD -MP -std=c99 -Wall -g
CFLAGS+= -O0
CFLAGS+= $(DEFINES)
CFLAGS+= $(INCLUDES)
CFLAGS+=
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
LFLAGS+= -nostartfiles -static
LFLAGS+= -Wl,--gc-sections,--entry,am_reset_isr,-Map,$(CONFIG)/$(TARGET).map
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
LFLAGS+=
# Additional user specified CFLAGS
CFLAGS+=$(EXTRA_CFLAGS)
CPFLAGS = -Obinary
ODFLAGS = -S
#### Rules ####
all: directories $(CONFIG)/$(TARGET).bin
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
@echo " Compiling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
@echo " Assembling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/$(TARGET).axf: $(OBJS) $(LIBS)
@echo " Linking $(COMPILERNAME) $@" ;\
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
$(CONFIG)/$(TARGET).bin: $(CONFIG)/$(TARGET).axf
@echo " Copying $(COMPILERNAME) $@..." ;\
$(CP) $(CPFLAGS) $< $@ ;\
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
clean:
@echo "Cleaning..." ;\
$(RM) -f $(OBJS) $(DEPS) \
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map
$(CONFIG)/%.d: ;
../../../../../mcu/apollo/hal/gcc/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo/hal
../../../bsp/gcc/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
# Automatically include any generated dependencies
-include $(DEPS)
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/gcc/adc_vbatt.ld
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/******************************************************************************
*
* adc_vbatt.ld - Linker script for applications using startup_gnu.c
*
*****************************************************************************/
ENTRY(am_reset_isr)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
}
SECTIONS
{
.text :
{
. = ALIGN(4);
KEEP(*(.isr_vector))
KEEP(*(.patch))
*(.text)
*(.text*)
*(.rodata)
*(.rodata*)
. = ALIGN(4);
_etext = .;
} > FLASH
/* User stack section initialized by startup code. */
.stack (NOLOAD):
{
. = ALIGN(8);
*(.stack)
*(.stack*)
. = ALIGN(8);
} > SRAM
.data :
{
. = ALIGN(4);
_sdata = .;
*(.data)
*(.data*)
. = ALIGN(4);
_edata = .;
} > SRAM AT>FLASH
/* used by startup to initialize data */
_init_data = LOADADDR(.data);
.bss :
{
. = ALIGN(4);
_sbss = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} > SRAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/gcc/startup_gcc.c
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//*****************************************************************************
//
//! @file startup_gcc.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Forward declaration of interrupt handlers.
//
//*****************************************************************************
extern void am_reset_isr(void) __attribute ((naked));
extern void am_nmi_isr(void) __attribute ((weak));
extern void am_fault_isr(void) __attribute ((weak));
extern void am_mpufault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_busfault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_usagefault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_svcall_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_debugmon_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_pendsv_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_systick_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_brownout_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_adc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_watchdog_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_clkgen_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_vcomp_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_ios_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_acc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_gpio_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ctimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_uart_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software12_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software13_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software14_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software15_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_default_isr(void) __attribute ((weak));
//*****************************************************************************
//
// The entry point for the application.
//
//*****************************************************************************
extern int main(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
__attribute__ ((section(".stack")))
static uint32_t g_pui32Stack[4096];
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__attribute__ ((section(".isr_vector")))
void (* const g_am_pfnVectors[])(void) =
{
(void (*)(void))((uint32_t)g_pui32Stack + sizeof(g_pui32Stack)),
// The initial stack pointer
am_reset_isr, // The reset handler
am_nmi_isr, // The NMI handler
am_fault_isr, // The hard fault handler
am_fault_isr, // The MPU fault handler
am_fault_isr, // The bus fault handler
am_fault_isr, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
am_svcall_isr, // SVCall handle
am_debugmon_isr, // Debug monitor handler
0, // Reserved
am_pendsv_isr, // The PendSV handler
am_systick_isr, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout
am_watchdog_isr, // 1: Watchdog
am_clkgen_isr, // 2: CLKGEN
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_adc_isr, // 8: ADC
am_gpio_isr, // 9: GPIO
am_ctimer_isr, // 10: CTIMER
am_uart_isr, // 11: UART
am_software12_isr, // 12: Software Interrupt
am_software13_isr, // 13: Software Interrupt
am_software14_isr, // 14: Software Interrupt
am_software15_isr // 15: Software Interrupt
};
//*****************************************************************************
//
// The following are constructs created by the linker, indicating where the
// the "data" and "bss" segments reside in memory. The initializers for the
// "data" segment resides immediately following the "text" segment.
//
//*****************************************************************************
extern uint32_t _etext;
extern uint32_t _sdata;
extern uint32_t _edata;
extern uint32_t _sbss;
extern uint32_t _ebss;
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
#if defined(__GNUC_STDC_INLINE__)
void
am_reset_isr(void)
{
//
// Set the vector table pointer.
//
__asm(" ldr r0, =0xE000ED08\n"
" ldr r1, =g_am_pfnVectors\n"
" str r1, [r0]");
//
// Set the stack pointer.
//
__asm(" ldr sp, [r1]");
#ifndef NOFPU
//
// Enable the FPU.
//
__asm("ldr r0, =0xE000ED88\n"
"ldr r1,[r0]\n"
"orr r1,#(0xF << 20)\n"
"str r1,[r0]\n"
"dsb\n"
"isb\n");
#endif
//
// Copy the data segment initializers from flash to SRAM.
//
__asm(" ldr r0, =_init_data\n"
" ldr r1, =_sdata\n"
" ldr r2, =_edata\n"
"copy_loop:\n"
" ldr r3, [r0], #4\n"
" str r3, [r1], #4\n"
" cmp r1, r2\n"
" blt copy_loop\n");
//
// Zero fill the bss segment.
//
__asm(" ldr r0, =_sbss\n"
" ldr r1, =_ebss\n"
" mov r2, #0\n"
"zero_loop:\n"
" cmp r0, r1\n"
" it lt\n"
" strlt r2, [r0], #4\n"
" blt zero_loop");
//
// Call the application's entry point.
//
main();
//
// If main returns then execute a break point instruction
//
__asm(" bkpt ");
}
#else
#error GNU STDC inline not supported.
#endif
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
void
am_nmi_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_fault_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/iar/Makefile
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := adc_vbatt
COMPILERNAME := iar
PROJECT := adc_vbatt_iar
CONFIG := bin
AM_SoftwareRoot ?= ../../../..
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p IarBuild.exe)
RM = $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
IarBuild.exe adc_vbatt.ewp -make Debug -log info
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
IarBuild.exe adc_vbatt.ewp -clean Debug -log all
../../../../../mcu/apollo/hal/iar/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo/hal
../../../bsp/iar/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/iar/adc_vbatt.ewd
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/iar/adc_vbatt.eww
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\adc_vbatt.ewp</path>
</project>
<batchBuild/>
</workspace>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/iar/adc_vbatt.icf
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//*****************************************************************************
//
// adc_vbatt.icf
//
// IAR linker Configuration File
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
//
// Define a memory section that covers the entire 4 GB addressable space of the
// processor. (32-bit can address up to 4GB)
//
define memory mem with size = 4G;
//
// Define a region for the flash.
//
define region FLASH = mem:[from 0x00000000 to 0x00080000];
//
// Define a region for the SRAM.
//
define region SRAM = mem:[from 0x10000000 to 0x10010000];
//
// Define a block for the heap.
//
define block HEAP with alignment = 0x8, size = 0x00000000 { };
//
// Define a block for the stack.
//
define block CSTACK with alignment = 0x8, size = 4096 { };
//
// Read/Write values should be initialized by copying from flash.
//
initialize by copy { readwrite };
//
// Indicate that the noinit values should be left alone.
//
do not initialize { section .noinit };
//
// Place the interrupt vectors at the start of flash.
//
place at start of FLASH { readonly section .intvec };
//
// Place the remainder of the read-only items into flash.
//
place in FLASH { readonly };
//
// Place the stack at the start of SRAM.
//
place at start of SRAM { block CSTACK, section .noinit };
//
// Place all read/write items into SRAM.
//
place in SRAM { block HEAP, readwrite };
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/iar/bin/adc_vbatt.log
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/iar/bin/adc_vbatt.out
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/iar/startup_iar.c
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//*****************************************************************************
//
//! @file startup_iar.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Enable the IAR extensions for this source file.
//
//*****************************************************************************
#pragma language = extended
//*****************************************************************************
//
// Weak function links.
//
//*****************************************************************************
#pragma weak am_mpufault_isr = am_fault_isr
#pragma weak am_busfault_isr = am_fault_isr
#pragma weak am_usagefault_isr = am_fault_isr
#pragma weak am_svcall_isr = am_default_isr
#pragma weak am_debugmon_isr = am_default_isr
#pragma weak am_pendsv_isr = am_default_isr
#pragma weak am_systick_isr = am_default_isr
#pragma weak am_brownout_isr = am_default_isr
#pragma weak am_adc_isr = am_default_isr
#pragma weak am_watchdog_isr = am_default_isr
#pragma weak am_clkgen_isr = am_default_isr
#pragma weak am_vcomp_isr = am_default_isr
#pragma weak am_ioslave_ios_isr = am_default_isr
#pragma weak am_ioslave_acc_isr = am_default_isr
#pragma weak am_iomaster0_isr = am_default_isr
#pragma weak am_iomaster1_isr = am_default_isr
#pragma weak am_gpio_isr = am_default_isr
#pragma weak am_ctimer_isr = am_default_isr
#pragma weak am_uart_isr = am_default_isr
//*****************************************************************************
//
// Forward declaration of the default fault handlers.
//
//*****************************************************************************
extern __stackless void am_reset_isr(void);
extern __weak void am_nmi_isr(void);
extern __weak void am_fault_isr(void);
extern void am_mpufault_isr(void);
extern void am_busfault_isr(void);
extern void am_usagefault_isr(void);
extern void am_svcall_isr(void);
extern void am_debugmon_isr(void);
extern void am_pendsv_isr(void);
extern void am_systick_isr(void);
extern void am_brownout_isr(void);
extern void am_adc_isr(void);
extern void am_watchdog_isr(void);
extern void am_clkgen_isr(void);
extern void am_vcomp_isr(void);
extern void am_ioslave_ios_isr(void);
extern void am_ioslave_acc_isr(void);
extern void am_iomaster0_isr(void);
extern void am_iomaster1_isr(void);
extern void am_gpio_isr(void);
extern void am_ctimer_isr(void);
extern void am_uart_isr(void);
extern void am_default_isr(void);
//*****************************************************************************
//
// The entry point for the application startup code.
//
//*****************************************************************************
extern void __iar_program_start(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
static uint32_t pui32Stack[4096] @ ".noinit";
//*****************************************************************************
//
// A union that describes the entries of the vector table. The union is needed
// since the first entry is the stack pointer and the remainder are function
// pointers.
//
//*****************************************************************************
typedef union
{
void (*pfnHandler)(void);
uint32_t ui32Ptr;
}
uVectorEntry;
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__root const uVectorEntry __vector_table[] @ ".intvec" =
{
{ .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) },
// The initial stack pointer
am_reset_isr, // The reset handler
am_nmi_isr, // The NMI handler
am_fault_isr, // The hard fault handler
am_fault_isr, // The MPU fault handler
am_fault_isr, // The bus fault handler
am_fault_isr, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
am_svcall_isr, // SVCall handle
am_debugmon_isr, // Debug monitor handler
0, // Reserved
am_pendsv_isr, // The PendSV handler
am_systick_isr, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout
am_watchdog_isr, // 1: Watchdog
am_clkgen_isr, // 2: CLKGEN
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_adc_isr, // 8: ADC
am_gpio_isr, // 9: GPIO
am_ctimer_isr, // 10: CTIMER
am_uart_isr // 11: UART
};
//*****************************************************************************
//
// Note - The template for this function is originally found in IAR's module,
// low_level_init.c. As supplied by IAR, it is an empty function.
//
// This module contains the function `__low_level_init', a function
// that is called before the `main' function of the program. Normally
// low-level initializations - such as setting the prefered interrupt
// level or setting the watchdog - can be performed here.
//
// Note that this function is called before the data segments are
// initialized, this means that this function cannot rely on the
// values of global or static variables.
//
// When this function returns zero, the startup code will inhibit the
// initialization of the data segments. The result is faster startup,
// the drawback is that neither global nor static data will be
// initialized.
//
// Copyright 1999-2017 IAR Systems AB.
//
// $Revision: 112610 $
//
//
//
//
//*****************************************************************************
#define AM_REGVAL(x) (*((volatile uint32_t *)(x)))
#define VTOR_ADDR 0xE000ED08
__interwork int __low_level_init(void)
{
AM_REGVAL(VTOR_ADDR) = (uint32_t)&__vector_table;
/*==================================*/
/* Choose if segment initialization */
/* should be done or not. */
/* Return: 0 to omit seg_init */
/* 1 to run seg_init */
/*==================================*/
return 1;
}
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
void
am_reset_isr(void)
{
//
// Call the application's entry point.
//
__iar_program_start();
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
__weak void
am_nmi_isr(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
__weak void
am_fault_isr(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
static void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/keil/Dbg_RAM.ini
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/*----------------------------------------------------------------------------
* Name: Dbg_RAM.ini
* Purpose: RAM Debug Initialization File
* Note(s):
*----------------------------------------------------------------------------
* This file is part of the uVision/ARM development tools.
* This software may only be used under the terms of a valid, current,
* end user licence from KEIL for a compatible version of KEIL software
* development tools. Nothing else gives you the right to use this software.
*
* This software is supplied "AS IS" without warranties of any kind.
*
* Copyright (c) 2008-2013 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
TraceSetup() Turn on ITM clocks, etc.
*----------------------------------------------------------------------------*/
FUNC void TraceSetup (void) {
// turn on the ITM/TPIU clock
_WDWORD(0x40020250, 0x00000201); // TPIU clock enabled at 3MHz
}
/*----------------------------------------------------------------------------
Setup() configure PC & SP for RAM Debug
*----------------------------------------------------------------------------*/
FUNC void Setup (void) {
SP = _RDWORD(0x00000000+0x0); // Setup Stack Pointer
PC = _RDWORD(0x00000000+0x4); // Setup Program Counter
_WDWORD(0xE000ED08, 0x00000000+0x0); // Setup Vector Table Offset Register (done in system file)
}
LOAD %L INCREMENTAL // load the application
// Executed after reset via uVision's 'Reset'-button
FUNC void OnResetExec (void) {
//Set_ui32HALflags();
//TraceSetup();
}
FUNC void Set_ui32HALflags (void) {
TraceSetup();
g_ui32HALflags = 0x00000001;
_break_ = 1;
}
Setup(); // Setup for Running
BS main, 1, "Set_ui32HALflags()";
g
/*----------------------------------------------------------------------------
*----------------------------------------------------------------------------*/
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/keil/JLinkSettings.ini
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[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
MonModeVTableAddr = 0xFFFFFFFF
MonModeDebug = 0
MaxNumAPs = 0
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile=""
[FLASH]
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 1
Device="APOLLO512-KBR"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/keil/Makefile
+80
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := adc_vbatt
COMPILERNAME := Keil
PROJECT := adc_vbatt_Keil
CONFIG := bin
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p UV4.exe)
RM := $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
UV4.exe -b -t "adc_vbatt" adc_vbatt.uvprojx -j0 || [ $$? -eq 1 ]
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
$(RM) -rf $(CONFIG)
../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib:
$(MAKE) -C ../../../../../mcu/apollo/hal
../../../bsp/keil/bin/libam_bsp.lib:
$(MAKE) -C ../../../bsp
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/keil/adc_vbatt.sct
+59
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;******************************************************************************
;
; adc_vbatt.sct
;
; Scatter file for Keil linker configuration.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
LR_1 0x00000000
{
FLASH 0x00000000 0x00080000
{
*.o (RESET, +First)
* (+RO)
}
SRAM 0x10000000 0x00010000
{
* (+RW, +ZI)
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/keil/adc_vbatt.uvoptx
+324
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>adc_vbatt</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>24000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\Listings\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>0</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>3</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile>.\Dbg_RAM.ini</tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>/</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U483025288 -O462 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP8 -TB1 -TFE0 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo -FS00 -FL080000 -FP0($$Device:APOLLO512-KBR$Flash\Apollo.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name></Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DbgCM</Key>
<Name>-U-O206 -O206 -S2 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo -FS00 -FL080000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>-UV0236LFE -O462 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS8002 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo.FLM -FS00 -FL080000 -FP0($$Device:APOLLO512-KBR$Flash\Apollo.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>1</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<Lin2Executable></Lin2Executable>
<Lin2ConfigFile></Lin2ConfigFile>
<bLin2Auto>0</bLin2Auto>
<bAutoGenD>0</bAutoGenD>
<bAuto2GenD>0</bAuto2GenD>
</TargetOption>
</Target>
<Group>
<GroupName>src</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../src/adc_vbatt.c</PathWithFileName>
<FilenameWithoutPath>adc_vbatt.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>devices</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../devices/am_devices_led.c</PathWithFileName>
<FilenameWithoutPath>am_devices_led.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>utils</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_delay.c</PathWithFileName>
<FilenameWithoutPath>am_util_delay.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_faultisr.c</PathWithFileName>
<FilenameWithoutPath>am_util_faultisr.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>5</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_stdio.c</PathWithFileName>
<FilenameWithoutPath>am_util_stdio.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>keil</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>6</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../keil/startup_keil.s</PathWithFileName>
<FilenameWithoutPath>startup_keil.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
</ProjectOpt>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/keil/adc_vbatt.uvprojx
+449
View File
@@ -0,0 +1,449 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>adc_vbatt</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pArmCC></pArmCC>
<TargetOption>
<TargetCommonOption>
<Device>APOLLO512-KBR</Device>
<Vendor>Ambiq Micro</Vendor>
<PackID>AmbiqMicro.Apollo_DFP.1.0.0</PackID>
<PackURL>http://s3.asia.ambiqmicro.com/pack/</PackURL>
<Cpu>IRAM(0x10000000,0x10000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10000000 -FC2000 -FN1 -FF0Apollo -FS00 -FL010000 -FP0($Device:APOLLO512-KBR$Flash\Apollo.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:APOLLO512-KBR$Device\Include\Apollo.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:APOLLO512-KBR$SVD\apollo.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\bin\</OutputDirectory>
<OutputName>adc_vbatt</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\Listings\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>1</RunUserProg2>
<UserProg1Name>fromelf --bin --output bin\adc_vbatt.bin bin\adc_vbatt.axf</UserProg1Name>
<UserProg2Name>fromelf -cedrst --output bin\adc_vbatt.txt bin\adc_vbatt.axf</UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x10000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>AM_PART_APOLLO AM_PACKAGE_BGA keil</Define>
<Undefine></Undefine>
<IncludePath>../../../../../devices;../../../../../mcu/apollo;../src;../../../bsp;../../../../../utils;../../../../..</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x0</TextAddressRange>
<DataAddressRange>0x10000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\adc_vbatt.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib(am_hal_global.o) --keep=am_hal_global.o(.data) </Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>src</GroupName>
<Files>
<File>
<FileName>adc_vbatt.c</FileName>
<FileType>1</FileType>
<FilePath>../src/adc_vbatt.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>devices</GroupName>
<Files>
<File>
<FileName>am_devices_led.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../devices/am_devices_led.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>utils</GroupName>
<Files>
<File>
<FileName>am_util_delay.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_delay.c</FilePath>
</File>
<File>
<FileName>am_util_faultisr.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_faultisr.c</FilePath>
</File>
<File>
<FileName>am_util_stdio.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_stdio.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>keil</GroupName>
<Files>
<File>
<FileName>startup_keil.s</FileName>
<FileType>1</FileType>
<FilePath>../keil/startup_keil.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>lib</GroupName>
<Files>
<File>
<FileName>libam_hal.lib</FileName>
<FileType>4</FileType>
<FilePath>../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib</FilePath>
</File>
<File>
<FileName>libam_bsp.lib</FileName>
<FileType>4</FileType>
<FilePath>../../../bsp/keil/bin/libam_bsp.lib</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/keil/bin/adc_vbatt.txt
+4391
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/keil/startup_keil.s
+289
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@@ -0,0 +1,289 @@
;******************************************************************************
;
;! @file startup_keil.s
;!
;! @brief Definitions for Apollo1 interrupt handlers, the vector table, and the stack.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
;******************************************************************************
;
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;************************************************************************
Stack EQU 0x00004000
;******************************************************************************
;
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;
;******************************************************************************
Heap EQU 0x00000000
;******************************************************************************
;
; Allocate space for the stack.
;
;******************************************************************************
AREA STACK, NOINIT, READWRITE, ALIGN=3
StackMem
SPACE Stack
__initial_sp
;******************************************************************************
;
; Allocate space for the heap.
;
;******************************************************************************
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
HeapMem
SPACE Heap
__heap_limit
;******************************************************************************
;
; Indicate that the code in this file preserves 8-byte alignment of the stack.
;
;******************************************************************************
PRESERVE8
;******************************************************************************
;
; Place code into the reset code section.
;
;******************************************************************************
AREA RESET, CODE, READONLY
THUMB
;******************************************************************************
;
; The vector table.
;
;******************************************************************************
;
; Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
; am_usagefault_isr does not work if am_fault_isr is defined externally.
; Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
;
EXPORT __Vectors
__Vectors
DCD StackMem + Stack ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD am_nmi_isr ; NMI Handler
DCD am_fault_isr ; Hard Fault Handler
DCD am_fault_isr ; The MPU fault handler
DCD am_fault_isr ; The bus fault handler
DCD am_fault_isr ; The usage fault handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD am_svcall_isr ; SVCall handler
DCD am_debugmon_isr ; Debug monitor handler
DCD 0 ; Reserved
DCD am_pendsv_isr ; The PendSV handler
DCD am_systick_isr ; The SysTick handler
;
; Peripheral Interrupts
;
DCD am_brownout_isr ; 0: Reserved
DCD am_watchdog_isr ; 1: Reserved
DCD am_clkgen_isr ; 2: CLKGEN
DCD am_vcomp_isr ; 3: Voltage Comparator
DCD am_ioslave_ios_isr ; 4: I/O Slave general
DCD am_ioslave_acc_isr ; 5: I/O Slave access
DCD am_iomaster0_isr ; 6: I/O Master 0
DCD am_iomaster1_isr ; 7: I/O Master 1
DCD am_adc_isr ; 8: Reserved
DCD am_gpio_isr ; 9: GPIO
DCD am_ctimer_isr ; 10: CTIMER
DCD am_uart_isr ; 11: UART
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
;******************************************************************************
;
; This is the code that gets called when the processor first starts execution
; following a reset event.
;
;******************************************************************************
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
;
; Enable the FPU.
;
MOVW R0, #0xED88
MOVT R0, #0xE000
LDR R1, [R0]
ORR R1, #0x00F00000
STR R1, [R0]
DSB
ISB
;
; Branch to main.
;
LDR R0, =__main
BX R0
ENDP
;******************************************************************************
;
; Weak Exception Handlers.
;
;******************************************************************************
am_nmi_isr PROC
EXPORT am_nmi_isr [WEAK]
B .
ENDP
am_fault_isr\
PROC
EXPORT am_fault_isr [WEAK]
B .
ENDP
am_memmanage_isr\
PROC
EXPORT am_memmanage_isr [WEAK]
B .
ENDP
am_default_isr\
PROC
EXPORT am_svcall_isr [WEAK]
EXPORT am_debugmon_isr [WEAK]
EXPORT am_pendsv_isr [WEAK]
EXPORT am_systick_isr [WEAK]
EXPORT am_brownout_isr [WEAK]
EXPORT am_adc_isr [WEAK]
EXPORT am_watchdog_isr [WEAK]
EXPORT am_clkgen_isr [WEAK]
EXPORT am_vcomp_isr [WEAK]
EXPORT am_ioslave_ios_isr [WEAK]
EXPORT am_ioslave_acc_isr [WEAK]
EXPORT am_iomaster0_isr [WEAK]
EXPORT am_iomaster1_isr [WEAK]
EXPORT am_gpio_isr [WEAK]
EXPORT am_ctimer_isr [WEAK]
EXPORT am_uart_isr [WEAK]
am_svcall_isr
am_debugmon_isr
am_pendsv_isr
am_systick_isr
am_brownout_isr
am_adc_isr
am_watchdog_isr
am_clkgen_isr
am_vcomp_isr
am_ioslave_ios_isr
am_ioslave_acc_isr
am_iomaster0_isr
am_iomaster1_isr
am_gpio_isr
am_ctimer_isr
am_uart_isr
; all device interrupts go here unless the weak label is over
; ridden in the linker hard spin so the debugger will know it
; was an unhandled interrupt request a come-from-buffer or
; instruction trace hardware would sure be nice if you get here
B .
ENDP
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; Initialization of the heap and stack.
;
;******************************************************************************
AREA |.text|, CODE, READONLY
;******************************************************************************
;
; User Initial Stack & Heap.
;
;******************************************************************************
IF :DEF: __MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =HeapMem
LDR R1, =(StackMem + Stack)
LDR R2, =(HeapMem + Heap)
LDR R3, =StackMem
BX LR
ENDP
ENDIF
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; All Done
;
;******************************************************************************
END
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/adc_vbatt/src/adc_vbatt.c
+597
View File
@@ -0,0 +1,597 @@
//*****************************************************************************
//
//! @file adc_vbatt.c
//!
//! @brief ADC VBATT voltage divider, BATT load, and temperature reading example.
//!
//! This example initializes the ADC, and a timer. Two times per second it
//! reads the VBATT voltage divider and temperature sensor and prints them.
//! It monitors button 0 and if pressed, it turns on the BATT LOAD resistor.
//! One should monitor MCU current to see when the load is on or off.
//!
//! Printing takes place over the ITM at 1M Baud.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include "am_mcu_apollo.h"
#include "am_bsp.h"
#include "am_util.h"
//*****************************************************************************
//
// Global Variables
//
//*****************************************************************************
// Sample Count semaphore from ADC ISR to base level.
uint32_t g_ui32SampleCount;
// ADC code for voltage divider from ADC ISR to base level.
uint16_t g_ui16ADCVDD_code;
// ADC code for temperature sensor from ADC ISR to base level.
uint16_t g_ui16ADCTEMP_code;
//*****************************************************************************
//
// ADC Configuration
//
//*****************************************************************************
am_hal_adc_config_t g_sADC_CfgA =
{
#if AM_PART_APOLLO2
//
// Select the ADC Clock source.
//
.ui32Clock = AM_HAL_ADC_CLOCK_DIV2,
//
// Select the ADC trigger source using a trigger source macro.
//
.ui32TriggerConfig = AM_HAL_ADC_TRIGGER_SOFT,
//
// Select the ADC reference voltage.
//
.ui32Reference = AM_HAL_ADC_REF_INT_1P5,
.ui32ClockMode = AM_HAL_ADC_CK_LOW_POWER,
//
// Choose the power mode for the ADC's idle state.
//
.ui32PowerMode = AM_HAL_ADC_LPMODE_1,
//
// Enable repeating samples using Timer3A.
//
.ui32Repeat = AM_HAL_ADC_REPEAT
#else
// Select the ADC Clock source using one of the clock source macros.
AM_HAL_ADC_CLOCK_1_5MHZ,
// Select the ADC trigger source using a trigger source macro.
AM_HAL_ADC_TRIGGER_SOFT,
// Use a macro to select the ADC reference voltage.
AM_HAL_ADC_REF_INT,
// Use a macro to choose a maximum sample rate setting.
AM_HAL_ADC_MODE_1MSPS,
// Use a macro to choose the power mode for the ADC's idle state.
AM_HAL_ADC_LPMODE_2,
// Use the Repeat macro to enable repeating samples using Timer3A.
AM_HAL_ADC_REPEAT,
// Power Off the temp sensor.
AM_HAL_ADC_PON_TEMP,
// Set the ADC window limits using the window limit macro.
AM_HAL_ADC_WINDOW(768, 256) // arbitrary window setting, not used here.
#endif
};
//*****************************************************************************
//
// Timer configurations.
//
//*****************************************************************************
am_hal_ctimer_config_t g_sTimer3 =
{
// do not link A and B together to make a long 32-bit counter.
0,
// Set up timer 3A to drive the ADC
(AM_HAL_CTIMER_FN_PWM_REPEAT |
AM_HAL_CTIMER_LFRC_32HZ),
// Timer 3B is not used in this example.
0,
};
//*****************************************************************************
//
// ADC Interrupt Service Routine (ISR)
//
//*****************************************************************************
void
am_adc_isr(void)
{
#if AM_PART_APOLLO2
uint32_t ui32fifodata;
volatile uint32_t ui32Status;
//
// Clear timer 3 interrupt.
//
ui32Status = am_hal_adc_int_status_get(true);
am_hal_adc_int_clear(ui32Status);
//
// Toggle LED 3.
//
am_devices_led_toggle(am_bsp_psLEDs, 3);
//
// Keep grabbing value from the ADC FIFO until it goes empty.
//
while ( AM_HAL_ADC_FIFO_COUNT(am_hal_adc_fifo_peek()) )
{
ui32fifodata = am_hal_adc_fifo_pop();
//
// Select which one of the two enabled slots is here right now.
//
if ( AM_HAL_ADC_FIFO_SLOT(ui32fifodata) == 5)
{
//
// Just grab the ADC code for the battery voltage divider.
//
g_ui16ADCVDD_code = AM_HAL_ADC_FIFO_FULL_SAMPLE(ui32fifodata);
}
else
{
//
// Just grab the ADC code for the temperature sensor.
// We need the integer part in the low 16-bits.
//
g_ui16ADCTEMP_code = AM_HAL_ADC_FIFO_FULL_SAMPLE(ui32fifodata) & 0xFFC0;
}
}
#else
am_hal_adc_fifo_read_t fifo_info;
//
// Clear ADC Interrupt (write to clear).
//
AM_REGn(CTIMER, 0, INTCLR) = AM_REG_CTIMER_INTCLR_CTMRA0INT_M;
//
// Toggle LED 3.
//
am_devices_led_toggle(am_bsp_psLEDs, 3);
//
// Keep grabbing value from the ADC FIFO until it goes empty.
//
while (am_hal_adc_fifo_read(&fifo_info))
{
//
// Select which one of the two enabled slots is here right now.
//
if (fifo_info.ui8Slot == 5)
{
//
// Just grab the ADC code for the battery voltage divider.
//
g_ui16ADCVDD_code = fifo_info.ui16Data;
}
else
{
//
// Just grab the ADC code for the temperature sensor.
//
g_ui16ADCTEMP_code = fifo_info.ui16Data;
}
}
#endif // AM_PART_APOLLO2
//
// Signal interrupt arrival to base level.
//
g_ui32SampleCount++;
}
//*****************************************************************************
//
// ADC INIT Function
//
//*****************************************************************************
void
adc_init(void)
{
#if AM_PART_APOLLO
//
// We MUST turn on band gap to use the Temp Sensor.
// The ADC hardware in mode 2 will cycle the power to the bandgap
// automatically.
//
am_hal_mcuctrl_bandgap_enable();
#endif
#if AM_PART_APOLLO2
//
// Enable the ADC power domain.
//
am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_ADC);
#endif
//
// Configure the ADC.
//
am_hal_adc_config(&g_sADC_CfgA);
//
// Initialize the slot control registers.
//
am_hal_adc_slot_config(0, 0); // unused slot
am_hal_adc_slot_config(1, 0); // unused slot
am_hal_adc_slot_config(2, 0); // unused slot
am_hal_adc_slot_config(3, 0); // unused slot
am_hal_adc_slot_config(4, 0); // unused slot
am_hal_adc_slot_config(5, (AM_HAL_ADC_SLOT_AVG_1 |
AM_HAL_ADC_SLOT_CHSEL_VBATT |
AM_HAL_ADC_SLOT_WINDOW_EN |
AM_HAL_ADC_SLOT_ENABLE));
am_hal_adc_slot_config(6, 0); // unused slot
#if AM_PART_APOLLO
am_hal_adc_slot_config(7, (AM_HAL_ADC_SLOT_AVG_1 |
AM_HAL_ADC_SLOT_CHSEL_TEMP |
AM_HAL_ADC_SLOT_WINDOW_EN |
AM_HAL_ADC_SLOT_ENABLE));
#endif
#if AM_PART_APOLLO2
am_hal_adc_slot_config(7, (AM_HAL_ADC_SLOT_AVG_1 |
AM_HAL_ADC_SLOT_CHSEL_TEMP |
AM_HAL_ADC_SLOT_10BIT |
AM_HAL_ADC_SLOT_WINDOW_EN |
AM_HAL_ADC_SLOT_ENABLE));
#endif
//
// Enable the ADC.
//
am_hal_adc_enable();
}
//*****************************************************************************
//
// Enable the ADC INIT TIMER 3A function and set for 0.5 second period.
//
//*****************************************************************************
void
adc_init_timer3A(void)
{
uint32_t ui32Period = 2000; // Set for 2 second (2000ms) period
//
// LFRC has to be turned on for this example because we are running this
// timer off of the LFRC.
//
am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_LFRC);
//
// Set up timer 3A so start by clearing it.
//
am_hal_ctimer_clear(3, AM_HAL_CTIMER_TIMERA);
//
// Configure the timer to count 32Hz LFRC clocks but don't start it yet.
//
am_hal_ctimer_config(3, &g_sTimer3);
//
// Compute CMPR value needed for desired period based on a 32HZ clock.
//
ui32Period = ui32Period * 32 / 1000;
am_hal_ctimer_period_set(3, AM_HAL_CTIMER_TIMERA,
ui32Period, (ui32Period >> 1));
//
// Enable the timer output "pin". This refers to the pin as seen from
// inside the timer. The actual GPIO pin is neither enabled nor driven.
//
am_hal_ctimer_pin_enable(3, AM_HAL_CTIMER_TIMERA);
//
// Set up timer 3A as the trigger source for the ADC.
//
am_hal_ctimer_adc_trigger_enable();
//
// Start timer 3A.
//
am_hal_ctimer_start(3, AM_HAL_CTIMER_TIMERA);
}
//*****************************************************************************
//
// Main function.
//
//*****************************************************************************
int
main(void)
{
bool bMeasured;
float fTempF;
int32_t i32BaseLevelCount;
const float fReferenceVoltage = 1.5;
float fVBATT;
float fADCTempVolts;
float fADCTempDegreesC;
float fTemp, fVoltage, fOffset;
//
// Set the clock frequency.
//
am_hal_clkgen_sysclk_select(AM_HAL_CLKGEN_SYSCLK_MAX);
//
// Set the default cache configuration
//
am_hal_cachectrl_enable(&am_hal_cachectrl_defaults);
//
// Configure the board for low power operation.
//
am_bsp_low_power_init();
//
// Initialize device drivers for the LEDs on the board.
//
am_devices_led_array_init(am_bsp_psLEDs, AM_BSP_NUM_LEDS);
//
// Configure the Button 0 pin as a simple GPIO input.
//
am_hal_gpio_pin_config(AM_BSP_GPIO_BUTTON0, AM_HAL_PIN_INPUT);
//
// Initialize the SWO GPIO pin.
//
am_bsp_pin_enable(ITM_SWO);
//
// Enable the ITM.
//
am_hal_itm_enable();
//
// Enable debug printf messages using ITM on SWO pin
//
am_bsp_debug_printf_enable();
//
// Initialize the printf interface for ITM/SWO output.
//
am_util_stdio_printf_init((am_util_stdio_print_char_t) am_bsp_itm_string_print);
//
// Clear the terminal screen, and print a quick message to show that we're
// alive.
//
am_util_stdio_terminal_clear();
am_util_stdio_printf("ADC VBATT and Temperature Sensing Example.\n");
//
// Enable floating point.
//
am_hal_sysctrl_fpu_enable();
am_hal_sysctrl_fpu_stacking_enable(true);
//
// Initialize CTIMER 3A to trigger the ADC every 0.5 seconds.
//
adc_init_timer3A();
//
// Print out ctimer initial register state.
//
am_util_stdio_printf("\n");
am_util_stdio_printf("CTIMER3=0x%08X @ 0x%08X\n",
AM_REGVAL(REG_CTIMER_BASEADDR + AM_REG_CTIMER_TMR3_O),
REG_CTIMER_BASEADDR + AM_REG_CTIMER_TMR3_O);
am_util_stdio_printf("CTIMER3=0x%08X @ 0x%08X\n",
AM_REGVAL(REG_CTIMER_BASEADDR + AM_REG_CTIMER_CMPRA3_O),
REG_CTIMER_BASEADDR + AM_REG_CTIMER_CMPRA3_O);
am_util_stdio_printf("CTIMER3=0x%08X @ 0x%08X\n",
AM_REGVAL(REG_CTIMER_BASEADDR + AM_REG_CTIMER_CMPRB3_O),
REG_CTIMER_BASEADDR + AM_REG_CTIMER_CMPRB3_O);
am_util_stdio_printf("CTIMER3=0x%08X @ 0x%08X\n",
AM_REGVAL(REG_CTIMER_BASEADDR + AM_REG_CTIMER_CTRL3_O),
REG_CTIMER_BASEADDR + AM_REG_CTIMER_CTRL3_O);
//
// Initialize the ADC.
//
adc_init();
//
// Print out ADC initial register state.
//
am_util_stdio_printf("\n");
am_util_stdio_printf("ADC REGISTERS @ 0x%08X\n", (uint32_t)REG_ADC_BASEADDR);
am_util_stdio_printf("ADC CFG = 0x%08X\n", AM_REG(ADC, CFG));
am_util_stdio_printf("ADC SLOT0 = 0x%08X\n", AM_REG(ADC, SL0CFG));
am_util_stdio_printf("ADC SLOT1 = 0x%08X\n", AM_REG(ADC, SL1CFG));
am_util_stdio_printf("ADC SLOT2 = 0x%08X\n", AM_REG(ADC, SL2CFG));
am_util_stdio_printf("ADC SLOT3 = 0x%08X\n", AM_REG(ADC, SL3CFG));
am_util_stdio_printf("ADC SLOT4 = 0x%08X\n", AM_REG(ADC, SL4CFG));
am_util_stdio_printf("ADC SLOT5 = 0x%08X\n", AM_REG(ADC, SL5CFG));
am_util_stdio_printf("ADC SLOT6 = 0x%08X\n", AM_REG(ADC, SL6CFG));
am_util_stdio_printf("ADC SLOT7 = 0x%08X\n", AM_REG(ADC, SL7CFG));
#if AM_PART_APOLLO
am_util_stdio_printf("ADC WLIM = 0x%08X\n", AM_REG(ADC, WLIM));
#endif
//
// Print out the temperature trim values as recorded in OTP.
//
bMeasured = am_hal_adc_temp_trims_get(&fTemp, &fVoltage, &fOffset);
am_util_stdio_printf("\n");
am_util_stdio_printf("TRIMMED TEMP = %.3f\n", fTemp);
am_util_stdio_printf("TRIMMED VOLTAGE = %.3f\n", fVoltage);
am_util_stdio_printf("TRIMMED Offset = %.3f\n", fOffset);
am_util_stdio_printf("Note - these trim values are '%s' values.\n",
bMeasured ? "calibrated" : "uncalibrated default");
am_util_stdio_printf("\n");
//
// Enable the ADC interrupt in the NVIC.
//
am_hal_interrupt_enable(AM_HAL_INTERRUPT_ADC);
am_hal_interrupt_master_enable();
//
// Enable the ADC interrupts in the ADC.
//
am_hal_adc_int_enable(AM_REG_ADC_INTEN_WCINC(1) |
AM_REG_ADC_INTEN_WCEXC(1) |
AM_REG_ADC_INTEN_FIFOOVR2(1) |
AM_REG_ADC_INTEN_FIFOOVR1(1) |
AM_REG_ADC_INTEN_SCNCMP(1) |
AM_REG_ADC_INTEN_CNVCMP(1));
//
// Reset the sample count which will be incremented by the ISR.
//
g_ui32SampleCount = 0;
//
// Kick Start Timer 3 with an ADC software trigger in REPEAT used.
//
am_hal_adc_trigger();
//
// Track buffer depth for progress messages.
//
i32BaseLevelCount = g_ui32SampleCount;
//
// Wait here for the ISR to grab a buffer of samples.
//
while (1)
{
//
// Print the battery voltage and temperature for each interrupt
//
if (g_ui32SampleCount > i32BaseLevelCount)
{
i32BaseLevelCount = g_ui32SampleCount;
//
// Compute the voltage divider output.
//
fVBATT = ((float)g_ui16ADCVDD_code) * 3.0f * fReferenceVoltage
/ 1024.0f / 64.0f;
//
// Print the voltage divider output.
//
am_util_stdio_printf("VBATT = <%.3f> (0x%04X) ",
fVBATT, g_ui16ADCVDD_code);
//
// Convert and scale the temperature.
// Temperatures are in Fahrenheit range -40 to 225 degrees.
// Voltage range is 0.825V to 1.283V
// First get the ADC voltage corresponding to temperature.
//
fADCTempVolts = ((float)g_ui16ADCTEMP_code) * fReferenceVoltage
/ (1024.0f * 64.0f);
//
// Now call the HAL routine to convert volts to degrees Celsius.
//
fADCTempDegreesC = am_hal_adc_volts_to_celsius(fADCTempVolts);
//
// print the temperature value in Celsius.
//
am_util_stdio_printf("TEMP = %.2f C (0x%04X) ",
fADCTempDegreesC, g_ui16ADCTEMP_code);
//
// Print the temperature value in Fahrenheit.
//
fTempF = (fADCTempDegreesC * (9.0f / 5.0f)) + 32.0f;
am_util_stdio_printf(" %.2f F", fTempF);
//
// Use button 0 to turn on or off the battery load resistor.
//
#if AM_PART_APOLLO
if (!am_hal_gpio_input_bit_read(AM_BSP_GPIO_BUTTON0))
{
am_util_stdio_printf("BATTERY LOAD RESISTOR ON\n");
am_hal_adc_batt_load_enable();
am_devices_led_on(am_bsp_psLEDs, 2);
}
else
{
am_util_stdio_printf("\n");
am_hal_adc_batt_load_disable();
am_devices_led_off(am_bsp_psLEDs, 2);
}
#else
am_util_stdio_printf("\n");
#endif
}
//
// Sleep here until the next ADC interrupt comes along.
//
am_devices_led_off(am_bsp_psLEDs, 0);
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
am_devices_led_on(am_bsp_psLEDs, 0);
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/Makefile
+49
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@@ -0,0 +1,49 @@
#******************************************************************************
#
# Makefile - Rules for compiling
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
# Include rules specific to this board
-include ../../board-defs.mk
-include example-defs.mk
# All makefiles use this to find the top level directory.
SWROOT?=../../../..
# Include rules for building generic examples.
include $(SWROOT)/makedefs/example.mk
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/README.txt
+24
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@@ -0,0 +1,24 @@
Name:
=====
bc_boot_demo
Description:
============
Example that displays the timer count on the LEDs.
This example is a copy of the "binary counter" demo compiled and linked to
run at flash address 0x8000 instead of 0x0000. This is useful for users who
would like to run their applications with a permanent bootloader program in
the first page of flash.
Please see the linker configuration files for an example of how this offset
can be built into the compilation process.
SWO is configured in 1M baud, 8-n-1 mode.
******************************************************************************
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/gcc/Makefile
+181
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@@ -0,0 +1,181 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := bc_boot_demo
COMPILERNAME := gcc
PROJECT := bc_boot_demo_gcc
CONFIG := bin
SHELL:=/bin/bash
#### Setup ####
TOOLCHAIN ?= arm-none-eabi
PART = apollo
CPU = cortex-m4
FPU = fpv4-sp-d16
#FABI = softfp
FABI = hard
LINKER_FILE := ./bc_boot_demo.ld
STARTUP_FILE := ./startup_$(COMPILERNAME).c
#### Required Executables ####
CC = $(TOOLCHAIN)-gcc
GCC = $(TOOLCHAIN)-gcc
CPP = $(TOOLCHAIN)-cpp
LD = $(TOOLCHAIN)-ld
CP = $(TOOLCHAIN)-objcopy
OD = $(TOOLCHAIN)-objdump
RD = $(TOOLCHAIN)-readelf
AR = $(TOOLCHAIN)-ar
SIZE = $(TOOLCHAIN)-size
RM = $(shell which rm 2>/dev/null)
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
K := $(foreach exec,$(EXECUTABLES),\
$(if $(shell which $($(exec)) 2>/dev/null),,\
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
ifneq ($(strip $(value K)),)
all clean:
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
DEFINES = -DPART_$(PART)
DEFINES+= -DAM_PART_APOLLO
DEFINES+= -DAM_PACKAGE_BGA
DEFINES+= -Dgcc
INCLUDES = -I../../../../../mcu/apollo
INCLUDES+= -I../../../bsp
INCLUDES+= -I../../../../..
INCLUDES+= -I../../../../../devices
INCLUDES+= -I../../../../../utils
INCLUDES+= -I../src
VPATH = ../../../../../devices
VPATH+=:../../../../../utils
VPATH+=:../src
SRC = bc_boot_demo.c
SRC += am_devices_led.c
SRC += am_util_delay.c
SRC += am_util_faultisr.c
SRC += am_util_stdio.c
SRC += startup_gcc.c
CSRC = $(filter %.c,$(SRC))
ASRC = $(filter %.s,$(SRC))
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
LIBS = ../../../bsp/gcc/bin/libam_bsp.a
LIBS += ../../../../../mcu/apollo/hal/gcc/bin/libam_hal.a
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
CFLAGS+= -ffunction-sections -fdata-sections
CFLAGS+= -MMD -MP -std=c99 -Wall -g
CFLAGS+= -O0
CFLAGS+= $(DEFINES)
CFLAGS+= $(INCLUDES)
CFLAGS+=
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
LFLAGS+= -nostartfiles -static
LFLAGS+= -Wl,--gc-sections,--entry,am_reset_isr,-Map,$(CONFIG)/$(TARGET).map
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
LFLAGS+=
# Additional user specified CFLAGS
CFLAGS+=$(EXTRA_CFLAGS)
CPFLAGS = -Obinary
ODFLAGS = -S
#### Rules ####
all: directories $(CONFIG)/$(TARGET).bin
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
@echo " Compiling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
@echo " Assembling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/$(TARGET).axf: $(OBJS) $(LIBS)
@echo " Linking $(COMPILERNAME) $@" ;\
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
$(CONFIG)/$(TARGET).bin: $(CONFIG)/$(TARGET).axf
@echo " Copying $(COMPILERNAME) $@..." ;\
$(CP) $(CPFLAGS) $< $@ ;\
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
clean:
@echo "Cleaning..." ;\
$(RM) -f $(OBJS) $(DEPS) \
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map
$(CONFIG)/%.d: ;
../../../bsp/gcc/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
../../../../../mcu/apollo/hal/gcc/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo/hal
# Automatically include any generated dependencies
-include $(DEPS)
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/gcc/bc_boot_demo.ld
+63
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@@ -0,0 +1,63 @@
/******************************************************************************
*
* bc_boot_demo.ld - Linker script for applications using startup_gnu.c
*
*****************************************************************************/
ENTRY(am_reset_isr)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00008000, LENGTH = 16K
SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 16K
}
SECTIONS
{
.text :
{
. = ALIGN(4);
KEEP(*(.isr_vector))
KEEP(*(.patch))
*(.text)
*(.text*)
*(.rodata)
*(.rodata*)
. = ALIGN(4);
_etext = .;
} > FLASH
/* User stack section initialized by startup code. */
.stack (NOLOAD):
{
. = ALIGN(8);
*(.stack)
*(.stack*)
. = ALIGN(8);
} > SRAM
.data :
{
. = ALIGN(4);
_sdata = .;
*(.data)
*(.data*)
. = ALIGN(4);
_edata = .;
} > SRAM AT>FLASH
/* used by startup to initialize data */
_init_data = LOADADDR(.data);
.bss :
{
. = ALIGN(4);
_sbss = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} > SRAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/gcc/startup_gcc.c
+286
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@@ -0,0 +1,286 @@
//*****************************************************************************
//
//! @file startup_gcc.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Forward declaration of interrupt handlers.
//
//*****************************************************************************
extern void am_reset_isr(void) __attribute ((naked));
extern void am_nmi_isr(void) __attribute ((weak));
extern void am_fault_isr(void) __attribute ((weak));
extern void am_mpufault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_busfault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_usagefault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_svcall_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_debugmon_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_pendsv_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_systick_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_brownout_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_adc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_watchdog_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_clkgen_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_vcomp_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_ios_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_acc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_gpio_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ctimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_uart_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software12_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software13_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software14_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software15_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_default_isr(void) __attribute ((weak));
//*****************************************************************************
//
// The entry point for the application.
//
//*****************************************************************************
extern int main(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
__attribute__ ((section(".stack")))
static uint32_t g_pui32Stack[1024];
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__attribute__ ((section(".isr_vector")))
void (* const g_am_pfnVectors[])(void) =
{
(void (*)(void))((uint32_t)g_pui32Stack + sizeof(g_pui32Stack)),
// The initial stack pointer
am_reset_isr, // The reset handler
am_nmi_isr, // The NMI handler
am_fault_isr, // The hard fault handler
am_fault_isr, // The MPU fault handler
am_fault_isr, // The bus fault handler
am_fault_isr, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
am_svcall_isr, // SVCall handle
am_debugmon_isr, // Debug monitor handler
0, // Reserved
am_pendsv_isr, // The PendSV handler
am_systick_isr, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout
am_watchdog_isr, // 1: Watchdog
am_clkgen_isr, // 2: CLKGEN
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_adc_isr, // 8: ADC
am_gpio_isr, // 9: GPIO
am_ctimer_isr, // 10: CTIMER
am_uart_isr, // 11: UART
am_software12_isr, // 12: Software Interrupt
am_software13_isr, // 13: Software Interrupt
am_software14_isr, // 14: Software Interrupt
am_software15_isr // 15: Software Interrupt
};
//*****************************************************************************
//
// The following are constructs created by the linker, indicating where the
// the "data" and "bss" segments reside in memory. The initializers for the
// "data" segment resides immediately following the "text" segment.
//
//*****************************************************************************
extern uint32_t _etext;
extern uint32_t _sdata;
extern uint32_t _edata;
extern uint32_t _sbss;
extern uint32_t _ebss;
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
#if defined(__GNUC_STDC_INLINE__)
void
am_reset_isr(void)
{
//
// Set the vector table pointer.
//
__asm(" ldr r0, =0xE000ED08\n"
" ldr r1, =g_am_pfnVectors\n"
" str r1, [r0]");
//
// Set the stack pointer.
//
__asm(" ldr sp, [r1]");
#ifndef NOFPU
//
// Enable the FPU.
//
__asm("ldr r0, =0xE000ED88\n"
"ldr r1,[r0]\n"
"orr r1,#(0xF << 20)\n"
"str r1,[r0]\n"
"dsb\n"
"isb\n");
#endif
//
// Copy the data segment initializers from flash to SRAM.
//
__asm(" ldr r0, =_init_data\n"
" ldr r1, =_sdata\n"
" ldr r2, =_edata\n"
"copy_loop:\n"
" ldr r3, [r0], #4\n"
" str r3, [r1], #4\n"
" cmp r1, r2\n"
" blt copy_loop\n");
//
// Zero fill the bss segment.
//
__asm(" ldr r0, =_sbss\n"
" ldr r1, =_ebss\n"
" mov r2, #0\n"
"zero_loop:\n"
" cmp r0, r1\n"
" it lt\n"
" strlt r2, [r0], #4\n"
" blt zero_loop");
//
// Call the application's entry point.
//
main();
//
// If main returns then execute a break point instruction
//
__asm(" bkpt ");
}
#else
#error GNU STDC inline not supported.
#endif
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
void
am_nmi_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_fault_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/iar/Makefile
+80
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@@ -0,0 +1,80 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := bc_boot_demo
COMPILERNAME := iar
PROJECT := bc_boot_demo_iar
CONFIG := bin
AM_SoftwareRoot ?= ../../../..
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p IarBuild.exe)
RM = $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
IarBuild.exe bc_boot_demo.ewp -make Debug -log info
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
IarBuild.exe bc_boot_demo.ewp -clean Debug -log all
../../../bsp/iar/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
../../../../../mcu/apollo/hal/iar/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo/hal
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/iar/bc_boot_demo.ewd
+2810
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/iar/bc_boot_demo.ewp
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/iar/bc_boot_demo.eww
+10
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@@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\bc_boot_demo.ewp</path>
</project>
<batchBuild/>
</workspace>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/iar/bc_boot_demo.icf
+101
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@@ -0,0 +1,101 @@
//*****************************************************************************
//
// bc_boot_demo.icf
//
// IAR linker Configuration File
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
//
// Define a memory section that covers the entire 4 GB addressable space of the
// processor. (32-bit can address up to 4GB)
//
define memory mem with size = 4G;
//
// Define a region for the flash.
//
define region FLASH = mem:[from 0x00008000 to 0x0000C000];
//
// Define a region for the SRAM.
//
define region SRAM = mem:[from 0x10000000 to 0x10004000];
//
// Define a block for the heap.
//
define block HEAP with alignment = 0x8, size = 0x00000000 { };
//
// Define a block for the stack.
//
define block CSTACK with alignment = 0x8, size = 1024 { };
//
// Read/Write values should be initialized by copying from flash.
//
initialize by copy { readwrite };
//
// Indicate that the noinit values should be left alone.
//
do not initialize { section .noinit };
//
// Place the interrupt vectors at the start of flash.
//
place at start of FLASH { readonly section .intvec };
//
// Place the remainder of the read-only items into flash.
//
place in FLASH { readonly };
//
// Place the stack at the start of SRAM.
//
place at start of SRAM { block CSTACK, section .noinit };
//
// Place all read/write items into SRAM.
//
place in SRAM { block HEAP, readwrite };
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/iar/bin/bc_boot_demo.log
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/iar/bin/bc_boot_demo.out
BIN
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/iar/startup_iar.c
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@@ -0,0 +1,298 @@
//*****************************************************************************
//
//! @file startup_iar.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Enable the IAR extensions for this source file.
//
//*****************************************************************************
#pragma language = extended
//*****************************************************************************
//
// Weak function links.
//
//*****************************************************************************
#pragma weak am_mpufault_isr = am_fault_isr
#pragma weak am_busfault_isr = am_fault_isr
#pragma weak am_usagefault_isr = am_fault_isr
#pragma weak am_svcall_isr = am_default_isr
#pragma weak am_debugmon_isr = am_default_isr
#pragma weak am_pendsv_isr = am_default_isr
#pragma weak am_systick_isr = am_default_isr
#pragma weak am_brownout_isr = am_default_isr
#pragma weak am_adc_isr = am_default_isr
#pragma weak am_watchdog_isr = am_default_isr
#pragma weak am_clkgen_isr = am_default_isr
#pragma weak am_vcomp_isr = am_default_isr
#pragma weak am_ioslave_ios_isr = am_default_isr
#pragma weak am_ioslave_acc_isr = am_default_isr
#pragma weak am_iomaster0_isr = am_default_isr
#pragma weak am_iomaster1_isr = am_default_isr
#pragma weak am_gpio_isr = am_default_isr
#pragma weak am_ctimer_isr = am_default_isr
#pragma weak am_uart_isr = am_default_isr
//*****************************************************************************
//
// Forward declaration of the default fault handlers.
//
//*****************************************************************************
extern __stackless void am_reset_isr(void);
extern __weak void am_nmi_isr(void);
extern __weak void am_fault_isr(void);
extern void am_mpufault_isr(void);
extern void am_busfault_isr(void);
extern void am_usagefault_isr(void);
extern void am_svcall_isr(void);
extern void am_debugmon_isr(void);
extern void am_pendsv_isr(void);
extern void am_systick_isr(void);
extern void am_brownout_isr(void);
extern void am_adc_isr(void);
extern void am_watchdog_isr(void);
extern void am_clkgen_isr(void);
extern void am_vcomp_isr(void);
extern void am_ioslave_ios_isr(void);
extern void am_ioslave_acc_isr(void);
extern void am_iomaster0_isr(void);
extern void am_iomaster1_isr(void);
extern void am_gpio_isr(void);
extern void am_ctimer_isr(void);
extern void am_uart_isr(void);
extern void am_default_isr(void);
//*****************************************************************************
//
// The entry point for the application startup code.
//
//*****************************************************************************
extern void __iar_program_start(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
static uint32_t pui32Stack[1024] @ ".noinit";
//*****************************************************************************
//
// A union that describes the entries of the vector table. The union is needed
// since the first entry is the stack pointer and the remainder are function
// pointers.
//
//*****************************************************************************
typedef union
{
void (*pfnHandler)(void);
uint32_t ui32Ptr;
}
uVectorEntry;
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__root const uVectorEntry __vector_table[] @ ".intvec" =
{
{ .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) },
// The initial stack pointer
am_reset_isr, // The reset handler
am_nmi_isr, // The NMI handler
am_fault_isr, // The hard fault handler
am_fault_isr, // The MPU fault handler
am_fault_isr, // The bus fault handler
am_fault_isr, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
am_svcall_isr, // SVCall handle
am_debugmon_isr, // Debug monitor handler
0, // Reserved
am_pendsv_isr, // The PendSV handler
am_systick_isr, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout
am_watchdog_isr, // 1: Watchdog
am_clkgen_isr, // 2: CLKGEN
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_adc_isr, // 8: ADC
am_gpio_isr, // 9: GPIO
am_ctimer_isr, // 10: CTIMER
am_uart_isr // 11: UART
};
//*****************************************************************************
//
// Note - The template for this function is originally found in IAR's module,
// low_level_init.c. As supplied by IAR, it is an empty function.
//
// This module contains the function `__low_level_init', a function
// that is called before the `main' function of the program. Normally
// low-level initializations - such as setting the prefered interrupt
// level or setting the watchdog - can be performed here.
//
// Note that this function is called before the data segments are
// initialized, this means that this function cannot rely on the
// values of global or static variables.
//
// When this function returns zero, the startup code will inhibit the
// initialization of the data segments. The result is faster startup,
// the drawback is that neither global nor static data will be
// initialized.
//
// Copyright 1999-2017 IAR Systems AB.
//
// $Revision: 112610 $
//
//
//
//
//*****************************************************************************
#define AM_REGVAL(x) (*((volatile uint32_t *)(x)))
#define VTOR_ADDR 0xE000ED08
__interwork int __low_level_init(void)
{
AM_REGVAL(VTOR_ADDR) = (uint32_t)&__vector_table;
/*==================================*/
/* Choose if segment initialization */
/* should be done or not. */
/* Return: 0 to omit seg_init */
/* 1 to run seg_init */
/*==================================*/
return 1;
}
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
void
am_reset_isr(void)
{
//
// Call the application's entry point.
//
__iar_program_start();
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
__weak void
am_nmi_isr(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
__weak void
am_fault_isr(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
static void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/keil/Dbg_RAM.ini
+59
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@@ -0,0 +1,59 @@
/*----------------------------------------------------------------------------
* Name: Dbg_RAM.ini
* Purpose: RAM Debug Initialization File
* Note(s):
*----------------------------------------------------------------------------
* This file is part of the uVision/ARM development tools.
* This software may only be used under the terms of a valid, current,
* end user licence from KEIL for a compatible version of KEIL software
* development tools. Nothing else gives you the right to use this software.
*
* This software is supplied "AS IS" without warranties of any kind.
*
* Copyright (c) 2008-2013 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
TraceSetup() Turn on ITM clocks, etc.
*----------------------------------------------------------------------------*/
FUNC void TraceSetup (void) {
// turn on the ITM/TPIU clock
_WDWORD(0x40020250, 0x00000201); // TPIU clock enabled at 3MHz
}
/*----------------------------------------------------------------------------
Setup() configure PC & SP for RAM Debug
*----------------------------------------------------------------------------*/
FUNC void Setup (void) {
SP = _RDWORD(0x00008000+0x0); // Setup Stack Pointer
PC = _RDWORD(0x00008000+0x4); // Setup Program Counter
_WDWORD(0xE000ED08, 0x00008000+0x0); // Setup Vector Table Offset Register (done in system file)
}
LOAD %L INCREMENTAL // load the application
// Executed after reset via uVision's 'Reset'-button
FUNC void OnResetExec (void) {
//Set_ui32HALflags();
//TraceSetup();
}
FUNC void Set_ui32HALflags (void) {
TraceSetup();
g_ui32HALflags = 0x00000001;
_break_ = 1;
}
Setup(); // Setup for Running
BS main, 1, "Set_ui32HALflags()";
g
/*----------------------------------------------------------------------------
*----------------------------------------------------------------------------*/
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/keil/JLinkSettings.ini
+40
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@@ -0,0 +1,40 @@
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
MonModeVTableAddr = 0xFFFFFFFF
MonModeDebug = 0
MaxNumAPs = 0
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile=""
[FLASH]
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 1
Device="APOLLO512-KBR"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/keil/Makefile
+80
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@@ -0,0 +1,80 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := bc_boot_demo
COMPILERNAME := Keil
PROJECT := bc_boot_demo_Keil
CONFIG := bin
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p UV4.exe)
RM := $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
UV4.exe -b -t "bc_boot_demo" bc_boot_demo.uvprojx -j0 || [ $$? -eq 1 ]
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
$(RM) -rf $(CONFIG)
../../../bsp/keil/bin/libam_bsp.lib:
$(MAKE) -C ../../../bsp
../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib:
$(MAKE) -C ../../../../../mcu/apollo/hal
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/keil/bc_boot_demo.sct
+59
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@@ -0,0 +1,59 @@
;******************************************************************************
;
; bc_boot_demo.sct
;
; Scatter file for Keil linker configuration.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
LR_1 0x00008000
{
FLASH 0x00008000 0x00004000
{
*.o (RESET, +First)
* (+RO)
}
SRAM 0x10000000 0x00004000
{
* (+RW, +ZI)
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/keil/bc_boot_demo.uvoptx
+324
View File
@@ -0,0 +1,324 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>bc_boot_demo</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>24000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\Listings\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>0</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>3</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile>.\Dbg_RAM.ini</tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>/</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U483025288 -O462 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP8 -TB1 -TFE0 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo -FS00 -FL080000 -FP0($$Device:APOLLO512-KBR$Flash\Apollo.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name></Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DbgCM</Key>
<Name>-U-O206 -O206 -S2 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo -FS00 -FL080000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>-UV0236LFE -O462 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS8002 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo.FLM -FS00 -FL080000 -FP0($$Device:APOLLO512-KBR$Flash\Apollo.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>1</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<Lin2Executable></Lin2Executable>
<Lin2ConfigFile></Lin2ConfigFile>
<bLin2Auto>0</bLin2Auto>
<bAutoGenD>0</bAutoGenD>
<bAuto2GenD>0</bAuto2GenD>
</TargetOption>
</Target>
<Group>
<GroupName>src</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../src/bc_boot_demo.c</PathWithFileName>
<FilenameWithoutPath>bc_boot_demo.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>devices</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../devices/am_devices_led.c</PathWithFileName>
<FilenameWithoutPath>am_devices_led.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>utils</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_delay.c</PathWithFileName>
<FilenameWithoutPath>am_util_delay.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_faultisr.c</PathWithFileName>
<FilenameWithoutPath>am_util_faultisr.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>5</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_stdio.c</PathWithFileName>
<FilenameWithoutPath>am_util_stdio.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>keil</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>6</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../keil/startup_keil.s</PathWithFileName>
<FilenameWithoutPath>startup_keil.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
</ProjectOpt>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/keil/bc_boot_demo.uvprojx
+449
View File
@@ -0,0 +1,449 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>bc_boot_demo</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pArmCC></pArmCC>
<TargetOption>
<TargetCommonOption>
<Device>APOLLO512-KBR</Device>
<Vendor>Ambiq Micro</Vendor>
<PackID>AmbiqMicro.Apollo_DFP.1.0.0</PackID>
<PackURL>http://s3.asia.ambiqmicro.com/pack/</PackURL>
<Cpu>IRAM(0x10000000,0x10000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10000000 -FC2000 -FN1 -FF0Apollo -FS00 -FL010000 -FP0($Device:APOLLO512-KBR$Flash\Apollo.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:APOLLO512-KBR$Device\Include\Apollo.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:APOLLO512-KBR$SVD\apollo.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\bin\</OutputDirectory>
<OutputName>bc_boot_demo</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\Listings\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>1</RunUserProg2>
<UserProg1Name>fromelf --bin --output bin\bc_boot_demo.bin bin\bc_boot_demo.axf</UserProg1Name>
<UserProg2Name>fromelf -cedrst --output bin\bc_boot_demo.txt bin\bc_boot_demo.axf</UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x10000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>AM_PART_APOLLO AM_PACKAGE_BGA keil</Define>
<Undefine></Undefine>
<IncludePath>../../../../../mcu/apollo;../../../bsp;../../../../..;../../../../../devices;../../../../../utils;../src</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x8000</TextAddressRange>
<DataAddressRange>0x10000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\bc_boot_demo.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib(am_hal_global.o) --keep=am_hal_global.o(.data) </Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>src</GroupName>
<Files>
<File>
<FileName>bc_boot_demo.c</FileName>
<FileType>1</FileType>
<FilePath>../src/bc_boot_demo.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>devices</GroupName>
<Files>
<File>
<FileName>am_devices_led.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../devices/am_devices_led.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>utils</GroupName>
<Files>
<File>
<FileName>am_util_delay.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_delay.c</FilePath>
</File>
<File>
<FileName>am_util_faultisr.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_faultisr.c</FilePath>
</File>
<File>
<FileName>am_util_stdio.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_stdio.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>keil</GroupName>
<Files>
<File>
<FileName>startup_keil.s</FileName>
<FileType>1</FileType>
<FilePath>../keil/startup_keil.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>lib</GroupName>
<Files>
<File>
<FileName>libam_bsp.lib</FileName>
<FileType>4</FileType>
<FilePath>../../../bsp/keil/bin/libam_bsp.lib</FilePath>
</File>
<File>
<FileName>libam_hal.lib</FileName>
<FileType>4</FileType>
<FilePath>../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/keil/bin/bc_boot_demo.txt
+3524
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File diff suppressed because it is too large Load Diff
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/keil/startup_keil.s
+289
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@@ -0,0 +1,289 @@
;******************************************************************************
;
;! @file startup_keil.s
;!
;! @brief Definitions for Apollo1 interrupt handlers, the vector table, and the stack.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
;******************************************************************************
;
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;************************************************************************
Stack EQU 0x00001000
;******************************************************************************
;
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;
;******************************************************************************
Heap EQU 0x00000000
;******************************************************************************
;
; Allocate space for the stack.
;
;******************************************************************************
AREA STACK, NOINIT, READWRITE, ALIGN=3
StackMem
SPACE Stack
__initial_sp
;******************************************************************************
;
; Allocate space for the heap.
;
;******************************************************************************
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
HeapMem
SPACE Heap
__heap_limit
;******************************************************************************
;
; Indicate that the code in this file preserves 8-byte alignment of the stack.
;
;******************************************************************************
PRESERVE8
;******************************************************************************
;
; Place code into the reset code section.
;
;******************************************************************************
AREA RESET, CODE, READONLY
THUMB
;******************************************************************************
;
; The vector table.
;
;******************************************************************************
;
; Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
; am_usagefault_isr does not work if am_fault_isr is defined externally.
; Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
;
EXPORT __Vectors
__Vectors
DCD StackMem + Stack ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD am_nmi_isr ; NMI Handler
DCD am_fault_isr ; Hard Fault Handler
DCD am_fault_isr ; The MPU fault handler
DCD am_fault_isr ; The bus fault handler
DCD am_fault_isr ; The usage fault handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD am_svcall_isr ; SVCall handler
DCD am_debugmon_isr ; Debug monitor handler
DCD 0 ; Reserved
DCD am_pendsv_isr ; The PendSV handler
DCD am_systick_isr ; The SysTick handler
;
; Peripheral Interrupts
;
DCD am_brownout_isr ; 0: Reserved
DCD am_watchdog_isr ; 1: Reserved
DCD am_clkgen_isr ; 2: CLKGEN
DCD am_vcomp_isr ; 3: Voltage Comparator
DCD am_ioslave_ios_isr ; 4: I/O Slave general
DCD am_ioslave_acc_isr ; 5: I/O Slave access
DCD am_iomaster0_isr ; 6: I/O Master 0
DCD am_iomaster1_isr ; 7: I/O Master 1
DCD am_adc_isr ; 8: Reserved
DCD am_gpio_isr ; 9: GPIO
DCD am_ctimer_isr ; 10: CTIMER
DCD am_uart_isr ; 11: UART
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
;******************************************************************************
;
; This is the code that gets called when the processor first starts execution
; following a reset event.
;
;******************************************************************************
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
;
; Enable the FPU.
;
MOVW R0, #0xED88
MOVT R0, #0xE000
LDR R1, [R0]
ORR R1, #0x00F00000
STR R1, [R0]
DSB
ISB
;
; Branch to main.
;
LDR R0, =__main
BX R0
ENDP
;******************************************************************************
;
; Weak Exception Handlers.
;
;******************************************************************************
am_nmi_isr PROC
EXPORT am_nmi_isr [WEAK]
B .
ENDP
am_fault_isr\
PROC
EXPORT am_fault_isr [WEAK]
B .
ENDP
am_memmanage_isr\
PROC
EXPORT am_memmanage_isr [WEAK]
B .
ENDP
am_default_isr\
PROC
EXPORT am_svcall_isr [WEAK]
EXPORT am_debugmon_isr [WEAK]
EXPORT am_pendsv_isr [WEAK]
EXPORT am_systick_isr [WEAK]
EXPORT am_brownout_isr [WEAK]
EXPORT am_adc_isr [WEAK]
EXPORT am_watchdog_isr [WEAK]
EXPORT am_clkgen_isr [WEAK]
EXPORT am_vcomp_isr [WEAK]
EXPORT am_ioslave_ios_isr [WEAK]
EXPORT am_ioslave_acc_isr [WEAK]
EXPORT am_iomaster0_isr [WEAK]
EXPORT am_iomaster1_isr [WEAK]
EXPORT am_gpio_isr [WEAK]
EXPORT am_ctimer_isr [WEAK]
EXPORT am_uart_isr [WEAK]
am_svcall_isr
am_debugmon_isr
am_pendsv_isr
am_systick_isr
am_brownout_isr
am_adc_isr
am_watchdog_isr
am_clkgen_isr
am_vcomp_isr
am_ioslave_ios_isr
am_ioslave_acc_isr
am_iomaster0_isr
am_iomaster1_isr
am_gpio_isr
am_ctimer_isr
am_uart_isr
; all device interrupts go here unless the weak label is over
; ridden in the linker hard spin so the debugger will know it
; was an unhandled interrupt request a come-from-buffer or
; instruction trace hardware would sure be nice if you get here
B .
ENDP
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; Initialization of the heap and stack.
;
;******************************************************************************
AREA |.text|, CODE, READONLY
;******************************************************************************
;
; User Initial Stack & Heap.
;
;******************************************************************************
IF :DEF: __MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =HeapMem
LDR R1, =(StackMem + Stack)
LDR R2, =(HeapMem + Heap)
LDR R3, =StackMem
BX LR
ENDP
ENDIF
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; All Done
;
;******************************************************************************
END
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/bc_boot_demo/src/bc_boot_demo.c
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//*****************************************************************************
//
//! @file bc_boot_demo.c
//!
//! @brief Example that displays the timer count on the LEDs.
//!
//! This example is a copy of the "binary counter" demo compiled and linked to
//! run at flash address 0x8000 instead of 0x0000. This is useful for users who
//! would like to run their applications with a permanent bootloader program in
//! the first page of flash.
//!
//! Please see the linker configuration files for an example of how this offset
//! can be built into the compilation process.
//!
//! SWO is configured in 1M baud, 8-n-1 mode.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include "am_mcu_apollo.h"
#include "am_bsp.h"
#include "am_util.h"
volatile uint32_t g_ui32TimerCount = 0;
//*****************************************************************************
//
// Timer configuration.
//
//*****************************************************************************
am_hal_ctimer_config_t g_sTimer0 =
{
// Don't link timers.
0,
// Set up Timer0A.
(AM_HAL_CTIMER_FN_REPEAT |
AM_HAL_CTIMER_INT_ENABLE |
AM_HAL_CTIMER_LFRC_32HZ),
// No configuration for Timer0B.
0,
};
//*****************************************************************************
//
// Function to initialize Timer A0 to interrupt every 1/4 second.
//
//*****************************************************************************
void
timerA0_init(void)
{
uint32_t ui32Period;
//
// Enable the LFRC.
//
am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_LFRC);
//
// Set up timer A0.
//
am_hal_ctimer_clear(0, AM_HAL_CTIMER_TIMERA);
am_hal_ctimer_config(0, &g_sTimer0);
//
// Set up timerA0 to 32Hz from LFRC divided to 1 second period.
//
ui32Period = 8;
am_hal_ctimer_period_set(0, AM_HAL_CTIMER_TIMERA, ui32Period,
(ui32Period >> 1));
//
// Clear the timer Interrupt
//
am_hal_ctimer_int_clear(AM_HAL_CTIMER_INT_TIMERA0);
}
//*****************************************************************************
//
// Timer Interrupt Service Routine (ISR)
//
//*****************************************************************************
void
am_ctimer_isr(void)
{
//
// Clear TimerA0 Interrupt (write to clear).
//
am_hal_ctimer_int_clear(AM_HAL_CTIMER_INT_TIMERA0);
//
// Increment count and set limit based on the number of LEDs available.
//
if (++g_ui32TimerCount >= (1 << AM_BSP_NUM_LEDS))
{
//
// Reset the global.
//
g_ui32TimerCount = 0;
}
}
//*****************************************************************************
//
// Main function.
//
//*****************************************************************************
int
main(void)
{
//
// Set the clock frequency.
//
am_hal_clkgen_sysclk_select(AM_HAL_CLKGEN_SYSCLK_MAX);
//
// Set the default cache configuration
//
am_hal_cachectrl_enable(&am_hal_cachectrl_defaults);
//
// Configure the board for low power operation.
//
am_bsp_low_power_init();
//
// Initialize the printf interface for ITM/SWO output.
//
am_util_stdio_printf_init((am_util_stdio_print_char_t) am_bsp_itm_string_print);
//
// Initialize the SWO GPIO pin
//
am_bsp_pin_enable(ITM_SWO);
am_devices_led_array_init(am_bsp_psLEDs, AM_BSP_NUM_LEDS);
//
// Enable the ITM.
//
am_hal_itm_enable();
//
// Enable debug printf messages using ITM on SWO pin
//
am_bsp_debug_printf_enable();
//
// Clear the terminal and print the banner.
//
am_util_stdio_terminal_clear();
am_util_stdio_printf("Binary Counter Example\n");
//
// TimerA0 init.
//
timerA0_init();
//
// Enable the timer Interrupt.
//
am_hal_ctimer_int_enable(AM_HAL_CTIMER_INT_TIMERA0);
//
// Enable the timer interrupt in the NVIC.
//
am_hal_interrupt_enable(AM_HAL_INTERRUPT_CTIMER);
am_hal_interrupt_master_enable();
//
// Start timer A0
//
am_hal_ctimer_start(0, AM_HAL_CTIMER_TIMERA);
//
// We are done printing. Disable debug printf messages on ITM.
//
am_bsp_debug_printf_disable();
//
// Loop forever.
//
while (1)
{
//
// Go to Deep Sleep.
//
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
//
// Set the LEDs.
//
am_devices_led_array_out(am_bsp_psLEDs, AM_BSP_NUM_LEDS,
g_ui32TimerCount);
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/Makefile
+49
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@@ -0,0 +1,49 @@
#******************************************************************************
#
# Makefile - Rules for compiling
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
# Include rules specific to this board
-include ../../board-defs.mk
-include example-defs.mk
# All makefiles use this to find the top level directory.
SWROOT?=../../../..
# Include rules for building generic examples.
include $(SWROOT)/makedefs/example.mk
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/README.txt
+19
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@@ -0,0 +1,19 @@
Name:
=====
binary_counter
Description:
============
Example that displays the timer count on the LEDs.
This example increments a variable on every timer interrupt. The global
variable is used to set the state of the LEDs. The example sleeps otherwise.
SWO is configured in 1M baud, 8-n-1 mode.
******************************************************************************
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/gcc/Makefile
+181
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := binary_counter
COMPILERNAME := gcc
PROJECT := binary_counter_gcc
CONFIG := bin
SHELL:=/bin/bash
#### Setup ####
TOOLCHAIN ?= arm-none-eabi
PART = apollo
CPU = cortex-m4
FPU = fpv4-sp-d16
#FABI = softfp
FABI = hard
LINKER_FILE := ./binary_counter.ld
STARTUP_FILE := ./startup_$(COMPILERNAME).c
#### Required Executables ####
CC = $(TOOLCHAIN)-gcc
GCC = $(TOOLCHAIN)-gcc
CPP = $(TOOLCHAIN)-cpp
LD = $(TOOLCHAIN)-ld
CP = $(TOOLCHAIN)-objcopy
OD = $(TOOLCHAIN)-objdump
RD = $(TOOLCHAIN)-readelf
AR = $(TOOLCHAIN)-ar
SIZE = $(TOOLCHAIN)-size
RM = $(shell which rm 2>/dev/null)
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
K := $(foreach exec,$(EXECUTABLES),\
$(if $(shell which $($(exec)) 2>/dev/null),,\
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
ifneq ($(strip $(value K)),)
all clean:
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
DEFINES = -DPART_$(PART)
DEFINES+= -DAM_PART_APOLLO
DEFINES+= -DAM_PACKAGE_BGA
DEFINES+= -Dgcc
INCLUDES = -I../../../../..
INCLUDES+= -I../src
INCLUDES+= -I../../../../../mcu/apollo
INCLUDES+= -I../../../bsp
INCLUDES+= -I../../../../../utils
INCLUDES+= -I../../../../../devices
VPATH = ../src
VPATH+=:../../../../../utils
VPATH+=:../../../../../devices
SRC = binary_counter.c
SRC += am_util_delay.c
SRC += am_util_faultisr.c
SRC += am_util_stdio.c
SRC += am_devices_led.c
SRC += startup_gcc.c
CSRC = $(filter %.c,$(SRC))
ASRC = $(filter %.s,$(SRC))
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
LIBS = ../../../../../mcu/apollo/hal/gcc/bin/libam_hal.a
LIBS += ../../../bsp/gcc/bin/libam_bsp.a
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
CFLAGS+= -ffunction-sections -fdata-sections
CFLAGS+= -MMD -MP -std=c99 -Wall -g
CFLAGS+= -O0
CFLAGS+= $(DEFINES)
CFLAGS+= $(INCLUDES)
CFLAGS+=
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
LFLAGS+= -nostartfiles -static
LFLAGS+= -Wl,--gc-sections,--entry,am_reset_isr,-Map,$(CONFIG)/$(TARGET).map
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
LFLAGS+=
# Additional user specified CFLAGS
CFLAGS+=$(EXTRA_CFLAGS)
CPFLAGS = -Obinary
ODFLAGS = -S
#### Rules ####
all: directories $(CONFIG)/$(TARGET).bin
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
@echo " Compiling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
@echo " Assembling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/$(TARGET).axf: $(OBJS) $(LIBS)
@echo " Linking $(COMPILERNAME) $@" ;\
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
$(CONFIG)/$(TARGET).bin: $(CONFIG)/$(TARGET).axf
@echo " Copying $(COMPILERNAME) $@..." ;\
$(CP) $(CPFLAGS) $< $@ ;\
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
clean:
@echo "Cleaning..." ;\
$(RM) -f $(OBJS) $(DEPS) \
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map
$(CONFIG)/%.d: ;
../../../../../mcu/apollo/hal/gcc/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo/hal
../../../bsp/gcc/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
# Automatically include any generated dependencies
-include $(DEPS)
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/gcc/binary_counter.ld
+63
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@@ -0,0 +1,63 @@
/******************************************************************************
*
* binary_counter.ld - Linker script for applications using startup_gnu.c
*
*****************************************************************************/
ENTRY(am_reset_isr)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
}
SECTIONS
{
.text :
{
. = ALIGN(4);
KEEP(*(.isr_vector))
KEEP(*(.patch))
*(.text)
*(.text*)
*(.rodata)
*(.rodata*)
. = ALIGN(4);
_etext = .;
} > FLASH
/* User stack section initialized by startup code. */
.stack (NOLOAD):
{
. = ALIGN(8);
*(.stack)
*(.stack*)
. = ALIGN(8);
} > SRAM
.data :
{
. = ALIGN(4);
_sdata = .;
*(.data)
*(.data*)
. = ALIGN(4);
_edata = .;
} > SRAM AT>FLASH
/* used by startup to initialize data */
_init_data = LOADADDR(.data);
.bss :
{
. = ALIGN(4);
_sbss = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} > SRAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/gcc/startup_gcc.c
+286
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@@ -0,0 +1,286 @@
//*****************************************************************************
//
//! @file startup_gcc.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Forward declaration of interrupt handlers.
//
//*****************************************************************************
extern void am_reset_isr(void) __attribute ((naked));
extern void am_nmi_isr(void) __attribute ((weak));
extern void am_fault_isr(void) __attribute ((weak));
extern void am_mpufault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_busfault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_usagefault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_svcall_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_debugmon_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_pendsv_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_systick_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_brownout_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_adc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_watchdog_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_clkgen_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_vcomp_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_ios_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_acc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_gpio_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ctimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_uart_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software12_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software13_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software14_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software15_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_default_isr(void) __attribute ((weak));
//*****************************************************************************
//
// The entry point for the application.
//
//*****************************************************************************
extern int main(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
__attribute__ ((section(".stack")))
static uint32_t g_pui32Stack[1024];
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__attribute__ ((section(".isr_vector")))
void (* const g_am_pfnVectors[])(void) =
{
(void (*)(void))((uint32_t)g_pui32Stack + sizeof(g_pui32Stack)),
// The initial stack pointer
am_reset_isr, // The reset handler
am_nmi_isr, // The NMI handler
am_fault_isr, // The hard fault handler
am_fault_isr, // The MPU fault handler
am_fault_isr, // The bus fault handler
am_fault_isr, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
am_svcall_isr, // SVCall handle
am_debugmon_isr, // Debug monitor handler
0, // Reserved
am_pendsv_isr, // The PendSV handler
am_systick_isr, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout
am_watchdog_isr, // 1: Watchdog
am_clkgen_isr, // 2: CLKGEN
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_adc_isr, // 8: ADC
am_gpio_isr, // 9: GPIO
am_ctimer_isr, // 10: CTIMER
am_uart_isr, // 11: UART
am_software12_isr, // 12: Software Interrupt
am_software13_isr, // 13: Software Interrupt
am_software14_isr, // 14: Software Interrupt
am_software15_isr // 15: Software Interrupt
};
//*****************************************************************************
//
// The following are constructs created by the linker, indicating where the
// the "data" and "bss" segments reside in memory. The initializers for the
// "data" segment resides immediately following the "text" segment.
//
//*****************************************************************************
extern uint32_t _etext;
extern uint32_t _sdata;
extern uint32_t _edata;
extern uint32_t _sbss;
extern uint32_t _ebss;
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
#if defined(__GNUC_STDC_INLINE__)
void
am_reset_isr(void)
{
//
// Set the vector table pointer.
//
__asm(" ldr r0, =0xE000ED08\n"
" ldr r1, =g_am_pfnVectors\n"
" str r1, [r0]");
//
// Set the stack pointer.
//
__asm(" ldr sp, [r1]");
#ifndef NOFPU
//
// Enable the FPU.
//
__asm("ldr r0, =0xE000ED88\n"
"ldr r1,[r0]\n"
"orr r1,#(0xF << 20)\n"
"str r1,[r0]\n"
"dsb\n"
"isb\n");
#endif
//
// Copy the data segment initializers from flash to SRAM.
//
__asm(" ldr r0, =_init_data\n"
" ldr r1, =_sdata\n"
" ldr r2, =_edata\n"
"copy_loop:\n"
" ldr r3, [r0], #4\n"
" str r3, [r1], #4\n"
" cmp r1, r2\n"
" blt copy_loop\n");
//
// Zero fill the bss segment.
//
__asm(" ldr r0, =_sbss\n"
" ldr r1, =_ebss\n"
" mov r2, #0\n"
"zero_loop:\n"
" cmp r0, r1\n"
" it lt\n"
" strlt r2, [r0], #4\n"
" blt zero_loop");
//
// Call the application's entry point.
//
main();
//
// If main returns then execute a break point instruction
//
__asm(" bkpt ");
}
#else
#error GNU STDC inline not supported.
#endif
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
void
am_nmi_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_fault_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/iar/Makefile
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := binary_counter
COMPILERNAME := iar
PROJECT := binary_counter_iar
CONFIG := bin
AM_SoftwareRoot ?= ../../../..
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p IarBuild.exe)
RM = $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
IarBuild.exe binary_counter.ewp -make Debug -log info
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
IarBuild.exe binary_counter.ewp -clean Debug -log all
../../../bsp/iar/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
../../../../../mcu/apollo/hal/iar/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo/hal
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/iar/bin/binary_counter.log
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/iar/bin/binary_counter.out
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/iar/binary_counter.ewd
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/iar/binary_counter.ewp
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/iar/binary_counter.eww
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\binary_counter.ewp</path>
</project>
<batchBuild/>
</workspace>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/iar/binary_counter.icf
+101
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//*****************************************************************************
//
// binary_counter.icf
//
// IAR linker Configuration File
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
//
// Define a memory section that covers the entire 4 GB addressable space of the
// processor. (32-bit can address up to 4GB)
//
define memory mem with size = 4G;
//
// Define a region for the flash.
//
define region FLASH = mem:[from 0x00000000 to 0x00080000];
//
// Define a region for the SRAM.
//
define region SRAM = mem:[from 0x10000000 to 0x10010000];
//
// Define a block for the heap.
//
define block HEAP with alignment = 0x8, size = 0x00000000 { };
//
// Define a block for the stack.
//
define block CSTACK with alignment = 0x8, size = 1024 { };
//
// Read/Write values should be initialized by copying from flash.
//
initialize by copy { readwrite };
//
// Indicate that the noinit values should be left alone.
//
do not initialize { section .noinit };
//
// Place the interrupt vectors at the start of flash.
//
place at start of FLASH { readonly section .intvec };
//
// Place the remainder of the read-only items into flash.
//
place in FLASH { readonly };
//
// Place the stack at the start of SRAM.
//
place at start of SRAM { block CSTACK, section .noinit };
//
// Place all read/write items into SRAM.
//
place in SRAM { block HEAP, readwrite };
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/iar/startup_iar.c
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//*****************************************************************************
//
//! @file startup_iar.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Enable the IAR extensions for this source file.
//
//*****************************************************************************
#pragma language = extended
//*****************************************************************************
//
// Weak function links.
//
//*****************************************************************************
#pragma weak am_mpufault_isr = am_fault_isr
#pragma weak am_busfault_isr = am_fault_isr
#pragma weak am_usagefault_isr = am_fault_isr
#pragma weak am_svcall_isr = am_default_isr
#pragma weak am_debugmon_isr = am_default_isr
#pragma weak am_pendsv_isr = am_default_isr
#pragma weak am_systick_isr = am_default_isr
#pragma weak am_brownout_isr = am_default_isr
#pragma weak am_adc_isr = am_default_isr
#pragma weak am_watchdog_isr = am_default_isr
#pragma weak am_clkgen_isr = am_default_isr
#pragma weak am_vcomp_isr = am_default_isr
#pragma weak am_ioslave_ios_isr = am_default_isr
#pragma weak am_ioslave_acc_isr = am_default_isr
#pragma weak am_iomaster0_isr = am_default_isr
#pragma weak am_iomaster1_isr = am_default_isr
#pragma weak am_gpio_isr = am_default_isr
#pragma weak am_ctimer_isr = am_default_isr
#pragma weak am_uart_isr = am_default_isr
//*****************************************************************************
//
// Forward declaration of the default fault handlers.
//
//*****************************************************************************
extern __stackless void am_reset_isr(void);
extern __weak void am_nmi_isr(void);
extern __weak void am_fault_isr(void);
extern void am_mpufault_isr(void);
extern void am_busfault_isr(void);
extern void am_usagefault_isr(void);
extern void am_svcall_isr(void);
extern void am_debugmon_isr(void);
extern void am_pendsv_isr(void);
extern void am_systick_isr(void);
extern void am_brownout_isr(void);
extern void am_adc_isr(void);
extern void am_watchdog_isr(void);
extern void am_clkgen_isr(void);
extern void am_vcomp_isr(void);
extern void am_ioslave_ios_isr(void);
extern void am_ioslave_acc_isr(void);
extern void am_iomaster0_isr(void);
extern void am_iomaster1_isr(void);
extern void am_gpio_isr(void);
extern void am_ctimer_isr(void);
extern void am_uart_isr(void);
extern void am_default_isr(void);
//*****************************************************************************
//
// The entry point for the application startup code.
//
//*****************************************************************************
extern void __iar_program_start(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
static uint32_t pui32Stack[1024] @ ".noinit";
//*****************************************************************************
//
// A union that describes the entries of the vector table. The union is needed
// since the first entry is the stack pointer and the remainder are function
// pointers.
//
//*****************************************************************************
typedef union
{
void (*pfnHandler)(void);
uint32_t ui32Ptr;
}
uVectorEntry;
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__root const uVectorEntry __vector_table[] @ ".intvec" =
{
{ .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) },
// The initial stack pointer
am_reset_isr, // The reset handler
am_nmi_isr, // The NMI handler
am_fault_isr, // The hard fault handler
am_fault_isr, // The MPU fault handler
am_fault_isr, // The bus fault handler
am_fault_isr, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
am_svcall_isr, // SVCall handle
am_debugmon_isr, // Debug monitor handler
0, // Reserved
am_pendsv_isr, // The PendSV handler
am_systick_isr, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout
am_watchdog_isr, // 1: Watchdog
am_clkgen_isr, // 2: CLKGEN
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_adc_isr, // 8: ADC
am_gpio_isr, // 9: GPIO
am_ctimer_isr, // 10: CTIMER
am_uart_isr // 11: UART
};
//*****************************************************************************
//
// Note - The template for this function is originally found in IAR's module,
// low_level_init.c. As supplied by IAR, it is an empty function.
//
// This module contains the function `__low_level_init', a function
// that is called before the `main' function of the program. Normally
// low-level initializations - such as setting the prefered interrupt
// level or setting the watchdog - can be performed here.
//
// Note that this function is called before the data segments are
// initialized, this means that this function cannot rely on the
// values of global or static variables.
//
// When this function returns zero, the startup code will inhibit the
// initialization of the data segments. The result is faster startup,
// the drawback is that neither global nor static data will be
// initialized.
//
// Copyright 1999-2017 IAR Systems AB.
//
// $Revision: 112610 $
//
//
//
//
//*****************************************************************************
#define AM_REGVAL(x) (*((volatile uint32_t *)(x)))
#define VTOR_ADDR 0xE000ED08
__interwork int __low_level_init(void)
{
AM_REGVAL(VTOR_ADDR) = (uint32_t)&__vector_table;
/*==================================*/
/* Choose if segment initialization */
/* should be done or not. */
/* Return: 0 to omit seg_init */
/* 1 to run seg_init */
/*==================================*/
return 1;
}
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
void
am_reset_isr(void)
{
//
// Call the application's entry point.
//
__iar_program_start();
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
__weak void
am_nmi_isr(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
__weak void
am_fault_isr(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
static void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/keil/Dbg_RAM.ini
+59
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/*----------------------------------------------------------------------------
* Name: Dbg_RAM.ini
* Purpose: RAM Debug Initialization File
* Note(s):
*----------------------------------------------------------------------------
* This file is part of the uVision/ARM development tools.
* This software may only be used under the terms of a valid, current,
* end user licence from KEIL for a compatible version of KEIL software
* development tools. Nothing else gives you the right to use this software.
*
* This software is supplied "AS IS" without warranties of any kind.
*
* Copyright (c) 2008-2013 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
TraceSetup() Turn on ITM clocks, etc.
*----------------------------------------------------------------------------*/
FUNC void TraceSetup (void) {
// turn on the ITM/TPIU clock
_WDWORD(0x40020250, 0x00000201); // TPIU clock enabled at 3MHz
}
/*----------------------------------------------------------------------------
Setup() configure PC & SP for RAM Debug
*----------------------------------------------------------------------------*/
FUNC void Setup (void) {
SP = _RDWORD(0x00000000+0x0); // Setup Stack Pointer
PC = _RDWORD(0x00000000+0x4); // Setup Program Counter
_WDWORD(0xE000ED08, 0x00000000+0x0); // Setup Vector Table Offset Register (done in system file)
}
LOAD %L INCREMENTAL // load the application
// Executed after reset via uVision's 'Reset'-button
FUNC void OnResetExec (void) {
//Set_ui32HALflags();
//TraceSetup();
}
FUNC void Set_ui32HALflags (void) {
TraceSetup();
g_ui32HALflags = 0x00000001;
_break_ = 1;
}
Setup(); // Setup for Running
BS main, 1, "Set_ui32HALflags()";
g
/*----------------------------------------------------------------------------
*----------------------------------------------------------------------------*/
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/keil/JLinkSettings.ini
+40
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@@ -0,0 +1,40 @@
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
MonModeVTableAddr = 0xFFFFFFFF
MonModeDebug = 0
MaxNumAPs = 0
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile=""
[FLASH]
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 1
Device="APOLLO512-KBR"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/keil/Makefile
+80
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@@ -0,0 +1,80 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := binary_counter
COMPILERNAME := Keil
PROJECT := binary_counter_Keil
CONFIG := bin
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p UV4.exe)
RM := $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
UV4.exe -b -t "binary_counter" binary_counter.uvprojx -j0 || [ $$? -eq 1 ]
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
$(RM) -rf $(CONFIG)
../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib:
$(MAKE) -C ../../../../../mcu/apollo/hal
../../../bsp/keil/bin/libam_bsp.lib:
$(MAKE) -C ../../../bsp
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/keil/bin/binary_counter.txt
+3522
View File
File diff suppressed because it is too large Load Diff
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/keil/binary_counter.sct
+59
View File
@@ -0,0 +1,59 @@
;******************************************************************************
;
; binary_counter.sct
;
; Scatter file for Keil linker configuration.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
LR_1 0x00000000
{
FLASH 0x00000000 0x00080000
{
*.o (RESET, +First)
* (+RO)
}
SRAM 0x10000000 0x00010000
{
* (+RW, +ZI)
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/keil/binary_counter.uvoptx
+324
View File
@@ -0,0 +1,324 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>binary_counter</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>24000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\Listings\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>0</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>3</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile>.\Dbg_RAM.ini</tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>/</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U483025288 -O462 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP8 -TB1 -TFE0 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo -FS00 -FL080000 -FP0($$Device:APOLLO512-KBR$Flash\Apollo.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name></Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DbgCM</Key>
<Name>-U-O206 -O206 -S2 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo -FS00 -FL080000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>-UV0236LFE -O462 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS8002 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo.FLM -FS00 -FL080000 -FP0($$Device:APOLLO512-KBR$Flash\Apollo.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>1</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<Lin2Executable></Lin2Executable>
<Lin2ConfigFile></Lin2ConfigFile>
<bLin2Auto>0</bLin2Auto>
<bAutoGenD>0</bAutoGenD>
<bAuto2GenD>0</bAuto2GenD>
</TargetOption>
</Target>
<Group>
<GroupName>src</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../src/binary_counter.c</PathWithFileName>
<FilenameWithoutPath>binary_counter.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>utils</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_delay.c</PathWithFileName>
<FilenameWithoutPath>am_util_delay.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_faultisr.c</PathWithFileName>
<FilenameWithoutPath>am_util_faultisr.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_stdio.c</PathWithFileName>
<FilenameWithoutPath>am_util_stdio.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>devices</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>5</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../devices/am_devices_led.c</PathWithFileName>
<FilenameWithoutPath>am_devices_led.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>keil</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>6</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../keil/startup_keil.s</PathWithFileName>
<FilenameWithoutPath>startup_keil.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
</ProjectOpt>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/keil/binary_counter.uvprojx
+449
View File
@@ -0,0 +1,449 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>binary_counter</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pArmCC></pArmCC>
<TargetOption>
<TargetCommonOption>
<Device>APOLLO512-KBR</Device>
<Vendor>Ambiq Micro</Vendor>
<PackID>AmbiqMicro.Apollo_DFP.1.0.0</PackID>
<PackURL>http://s3.asia.ambiqmicro.com/pack/</PackURL>
<Cpu>IRAM(0x10000000,0x10000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10000000 -FC2000 -FN1 -FF0Apollo -FS00 -FL010000 -FP0($Device:APOLLO512-KBR$Flash\Apollo.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:APOLLO512-KBR$Device\Include\Apollo.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:APOLLO512-KBR$SVD\apollo.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\bin\</OutputDirectory>
<OutputName>binary_counter</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\Listings\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>1</RunUserProg2>
<UserProg1Name>fromelf --bin --output bin\binary_counter.bin bin\binary_counter.axf</UserProg1Name>
<UserProg2Name>fromelf -cedrst --output bin\binary_counter.txt bin\binary_counter.axf</UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x10000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>AM_PART_APOLLO AM_PACKAGE_BGA keil</Define>
<Undefine></Undefine>
<IncludePath>../../../../..;../src;../../../../../mcu/apollo;../../../bsp;../../../../../utils;../../../../../devices</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x0</TextAddressRange>
<DataAddressRange>0x10000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\binary_counter.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib(am_hal_global.o) --keep=am_hal_global.o(.data) </Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>src</GroupName>
<Files>
<File>
<FileName>binary_counter.c</FileName>
<FileType>1</FileType>
<FilePath>../src/binary_counter.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>utils</GroupName>
<Files>
<File>
<FileName>am_util_delay.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_delay.c</FilePath>
</File>
<File>
<FileName>am_util_faultisr.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_faultisr.c</FilePath>
</File>
<File>
<FileName>am_util_stdio.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_stdio.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>devices</GroupName>
<Files>
<File>
<FileName>am_devices_led.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../devices/am_devices_led.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>keil</GroupName>
<Files>
<File>
<FileName>startup_keil.s</FileName>
<FileType>1</FileType>
<FilePath>../keil/startup_keil.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>lib</GroupName>
<Files>
<File>
<FileName>libam_hal.lib</FileName>
<FileType>4</FileType>
<FilePath>../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib</FilePath>
</File>
<File>
<FileName>libam_bsp.lib</FileName>
<FileType>4</FileType>
<FilePath>../../../bsp/keil/bin/libam_bsp.lib</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/keil/startup_keil.s
+289
View File
@@ -0,0 +1,289 @@
;******************************************************************************
;
;! @file startup_keil.s
;!
;! @brief Definitions for Apollo1 interrupt handlers, the vector table, and the stack.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
;******************************************************************************
;
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;************************************************************************
Stack EQU 0x00001000
;******************************************************************************
;
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;
;******************************************************************************
Heap EQU 0x00000000
;******************************************************************************
;
; Allocate space for the stack.
;
;******************************************************************************
AREA STACK, NOINIT, READWRITE, ALIGN=3
StackMem
SPACE Stack
__initial_sp
;******************************************************************************
;
; Allocate space for the heap.
;
;******************************************************************************
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
HeapMem
SPACE Heap
__heap_limit
;******************************************************************************
;
; Indicate that the code in this file preserves 8-byte alignment of the stack.
;
;******************************************************************************
PRESERVE8
;******************************************************************************
;
; Place code into the reset code section.
;
;******************************************************************************
AREA RESET, CODE, READONLY
THUMB
;******************************************************************************
;
; The vector table.
;
;******************************************************************************
;
; Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
; am_usagefault_isr does not work if am_fault_isr is defined externally.
; Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
;
EXPORT __Vectors
__Vectors
DCD StackMem + Stack ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD am_nmi_isr ; NMI Handler
DCD am_fault_isr ; Hard Fault Handler
DCD am_fault_isr ; The MPU fault handler
DCD am_fault_isr ; The bus fault handler
DCD am_fault_isr ; The usage fault handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD am_svcall_isr ; SVCall handler
DCD am_debugmon_isr ; Debug monitor handler
DCD 0 ; Reserved
DCD am_pendsv_isr ; The PendSV handler
DCD am_systick_isr ; The SysTick handler
;
; Peripheral Interrupts
;
DCD am_brownout_isr ; 0: Reserved
DCD am_watchdog_isr ; 1: Reserved
DCD am_clkgen_isr ; 2: CLKGEN
DCD am_vcomp_isr ; 3: Voltage Comparator
DCD am_ioslave_ios_isr ; 4: I/O Slave general
DCD am_ioslave_acc_isr ; 5: I/O Slave access
DCD am_iomaster0_isr ; 6: I/O Master 0
DCD am_iomaster1_isr ; 7: I/O Master 1
DCD am_adc_isr ; 8: Reserved
DCD am_gpio_isr ; 9: GPIO
DCD am_ctimer_isr ; 10: CTIMER
DCD am_uart_isr ; 11: UART
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
;******************************************************************************
;
; This is the code that gets called when the processor first starts execution
; following a reset event.
;
;******************************************************************************
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
;
; Enable the FPU.
;
MOVW R0, #0xED88
MOVT R0, #0xE000
LDR R1, [R0]
ORR R1, #0x00F00000
STR R1, [R0]
DSB
ISB
;
; Branch to main.
;
LDR R0, =__main
BX R0
ENDP
;******************************************************************************
;
; Weak Exception Handlers.
;
;******************************************************************************
am_nmi_isr PROC
EXPORT am_nmi_isr [WEAK]
B .
ENDP
am_fault_isr\
PROC
EXPORT am_fault_isr [WEAK]
B .
ENDP
am_memmanage_isr\
PROC
EXPORT am_memmanage_isr [WEAK]
B .
ENDP
am_default_isr\
PROC
EXPORT am_svcall_isr [WEAK]
EXPORT am_debugmon_isr [WEAK]
EXPORT am_pendsv_isr [WEAK]
EXPORT am_systick_isr [WEAK]
EXPORT am_brownout_isr [WEAK]
EXPORT am_adc_isr [WEAK]
EXPORT am_watchdog_isr [WEAK]
EXPORT am_clkgen_isr [WEAK]
EXPORT am_vcomp_isr [WEAK]
EXPORT am_ioslave_ios_isr [WEAK]
EXPORT am_ioslave_acc_isr [WEAK]
EXPORT am_iomaster0_isr [WEAK]
EXPORT am_iomaster1_isr [WEAK]
EXPORT am_gpio_isr [WEAK]
EXPORT am_ctimer_isr [WEAK]
EXPORT am_uart_isr [WEAK]
am_svcall_isr
am_debugmon_isr
am_pendsv_isr
am_systick_isr
am_brownout_isr
am_adc_isr
am_watchdog_isr
am_clkgen_isr
am_vcomp_isr
am_ioslave_ios_isr
am_ioslave_acc_isr
am_iomaster0_isr
am_iomaster1_isr
am_gpio_isr
am_ctimer_isr
am_uart_isr
; all device interrupts go here unless the weak label is over
; ridden in the linker hard spin so the debugger will know it
; was an unhandled interrupt request a come-from-buffer or
; instruction trace hardware would sure be nice if you get here
B .
ENDP
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; Initialization of the heap and stack.
;
;******************************************************************************
AREA |.text|, CODE, READONLY
;******************************************************************************
;
; User Initial Stack & Heap.
;
;******************************************************************************
IF :DEF: __MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =HeapMem
LDR R1, =(StackMem + Stack)
LDR R2, =(HeapMem + Heap)
LDR R3, =StackMem
BX LR
ENDP
ENDIF
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; All Done
;
;******************************************************************************
END
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/binary_counter/src/binary_counter.c
+230
View File
@@ -0,0 +1,230 @@
//*****************************************************************************
//
//! @file binary_counter.c
//!
//! @brief Example that displays the timer count on the LEDs.
//!
//! This example increments a variable on every timer interrupt. The global
//! variable is used to set the state of the LEDs. The example sleeps otherwise.
//!
//! SWO is configured in 1M baud, 8-n-1 mode.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include "am_mcu_apollo.h"
#include "am_bsp.h"
#include "am_util.h"
volatile uint32_t g_ui32TimerCount = 0;
//*****************************************************************************
//
// Timer configuration.
//
//*****************************************************************************
am_hal_ctimer_config_t g_sTimer0 =
{
// Don't link timers.
0,
// Set up Timer0A.
(AM_HAL_CTIMER_FN_REPEAT |
AM_HAL_CTIMER_INT_ENABLE |
AM_HAL_CTIMER_LFRC_32HZ),
// No configuration for Timer0B.
0,
};
//*****************************************************************************
//
// Function to initialize Timer A0 to interrupt every 1/4 second.
//
//*****************************************************************************
void
timerA0_init(void)
{
uint32_t ui32Period;
//
// Enable the LFRC.
//
am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_LFRC);
//
// Set up timer A0.
//
am_hal_ctimer_clear(0, AM_HAL_CTIMER_TIMERA);
am_hal_ctimer_config(0, &g_sTimer0);
//
// Set up timerA0 to 32Hz from LFRC divided to 1 second period.
//
ui32Period = 8;
am_hal_ctimer_period_set(0, AM_HAL_CTIMER_TIMERA, ui32Period,
(ui32Period >> 1));
//
// Clear the timer Interrupt
//
am_hal_ctimer_int_clear(AM_HAL_CTIMER_INT_TIMERA0);
} // timerA0_init()
//*****************************************************************************
//
// Timer Interrupt Service Routine (ISR)
//
//*****************************************************************************
void
am_ctimer_isr(void)
{
//
// Clear TimerA0 Interrupt (write to clear).
//
am_hal_ctimer_int_clear(AM_HAL_CTIMER_INT_TIMERA0);
//
// Increment count and set limit based on the number of LEDs available.
//
if (++g_ui32TimerCount >= (1 << AM_BSP_NUM_LEDS))
{
//
// Reset the global.
//
g_ui32TimerCount = 0;
}
} // am_ctimer_isr()
//*****************************************************************************
//
// Main function.
//
//*****************************************************************************
int
main(void)
{
//
// Set the clock frequency.
//
am_hal_clkgen_sysclk_select(AM_HAL_CLKGEN_SYSCLK_MAX);
//
// Set the default cache configuration
//
am_hal_cachectrl_enable(&am_hal_cachectrl_defaults);
//
// Configure the board for low power operation.
//
am_bsp_low_power_init();
//
// Initialize the printf interface for ITM/SWO output.
//
am_util_stdio_printf_init((am_util_stdio_print_char_t) am_bsp_itm_string_print);
//
// Initialize the SWO GPIO pin
//
am_bsp_pin_enable(ITM_SWO);
am_devices_led_array_init(am_bsp_psLEDs, AM_BSP_NUM_LEDS);
//
// Enable the ITM.
//
am_hal_itm_enable();
//
// Enable debug printf messages using ITM on SWO pin
//
am_bsp_debug_printf_enable();
//
// Clear the terminal and print the banner.
//
am_util_stdio_terminal_clear();
am_util_stdio_printf("Binary Counter Example\n");
//
// TimerA0 init.
//
timerA0_init();
//
// Enable the timer Interrupt.
//
am_hal_ctimer_int_enable(AM_HAL_CTIMER_INT_TIMERA0);
//
// Enable the timer interrupt in the NVIC.
//
am_hal_interrupt_enable(AM_HAL_INTERRUPT_CTIMER);
am_hal_interrupt_master_enable();
//
// Start timer A0
//
am_hal_ctimer_start(0, AM_HAL_CTIMER_TIMERA);
//
// We are done printing. Disable debug printf messages on ITM.
//
am_bsp_debug_printf_disable();
//
// Loop forever.
//
while (1)
{
//
// Go to Deep Sleep.
//
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
//
// Set the LEDs.
//
am_devices_led_array_out(am_bsp_psLEDs, AM_BSP_NUM_LEDS,
g_ui32TimerCount);
}
} // main()
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/Makefile
+49
View File
@@ -0,0 +1,49 @@
#******************************************************************************
#
# Makefile - Rules for compiling
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
# Include rules specific to this board
-include ../../board-defs.mk
-include example-defs.mk
# All makefiles use this to find the top level directory.
SWROOT?=../../../..
# Include rules for building generic examples.
include $(SWROOT)/makedefs/example.mk
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/README.txt
+17
View File
@@ -0,0 +1,17 @@
Name:
=====
clkout
Description:
============
Enables a clock source to clkout and then tracks it on an LED array.
This example enables the LFRC to a clkout pin then uses GPIO polling to
track its rising edge and toggle an LED at 1 hertz.
******************************************************************************
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/gcc/Makefile
+181
View File
@@ -0,0 +1,181 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := clkout
COMPILERNAME := gcc
PROJECT := clkout_gcc
CONFIG := bin
SHELL:=/bin/bash
#### Setup ####
TOOLCHAIN ?= arm-none-eabi
PART = apollo
CPU = cortex-m4
FPU = fpv4-sp-d16
#FABI = softfp
FABI = hard
LINKER_FILE := ./clkout.ld
STARTUP_FILE := ./startup_$(COMPILERNAME).c
#### Required Executables ####
CC = $(TOOLCHAIN)-gcc
GCC = $(TOOLCHAIN)-gcc
CPP = $(TOOLCHAIN)-cpp
LD = $(TOOLCHAIN)-ld
CP = $(TOOLCHAIN)-objcopy
OD = $(TOOLCHAIN)-objdump
RD = $(TOOLCHAIN)-readelf
AR = $(TOOLCHAIN)-ar
SIZE = $(TOOLCHAIN)-size
RM = $(shell which rm 2>/dev/null)
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
K := $(foreach exec,$(EXECUTABLES),\
$(if $(shell which $($(exec)) 2>/dev/null),,\
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
ifneq ($(strip $(value K)),)
all clean:
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
DEFINES = -DPART_$(PART)
DEFINES+= -DAM_PACKAGE_BGA
DEFINES+= -DAM_PART_APOLLO
DEFINES+= -Dgcc
INCLUDES = -I../../../bsp
INCLUDES+= -I../../../../../devices
INCLUDES+= -I../../../../../utils
INCLUDES+= -I../src
INCLUDES+= -I../../../../..
INCLUDES+= -I../../../../../mcu/apollo
VPATH = ../src
VPATH+=:../../../../../devices
VPATH+=:../../../../../utils
SRC = clkout.c
SRC += am_devices_led.c
SRC += am_util_delay.c
SRC += am_util_faultisr.c
SRC += am_util_stdio.c
SRC += startup_gcc.c
CSRC = $(filter %.c,$(SRC))
ASRC = $(filter %.s,$(SRC))
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
LIBS = ../../../bsp/gcc/bin/libam_bsp.a
LIBS += ../../../../../mcu/apollo/hal/gcc/bin/libam_hal.a
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
CFLAGS+= -ffunction-sections -fdata-sections
CFLAGS+= -MMD -MP -std=c99 -Wall -g
CFLAGS+= -O0
CFLAGS+= $(DEFINES)
CFLAGS+= $(INCLUDES)
CFLAGS+=
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
LFLAGS+= -nostartfiles -static
LFLAGS+= -Wl,--gc-sections,--entry,am_reset_isr,-Map,$(CONFIG)/$(TARGET).map
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
LFLAGS+=
# Additional user specified CFLAGS
CFLAGS+=$(EXTRA_CFLAGS)
CPFLAGS = -Obinary
ODFLAGS = -S
#### Rules ####
all: directories $(CONFIG)/$(TARGET).bin
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
@echo " Compiling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
@echo " Assembling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/$(TARGET).axf: $(OBJS) $(LIBS)
@echo " Linking $(COMPILERNAME) $@" ;\
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
$(CONFIG)/$(TARGET).bin: $(CONFIG)/$(TARGET).axf
@echo " Copying $(COMPILERNAME) $@..." ;\
$(CP) $(CPFLAGS) $< $@ ;\
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
clean:
@echo "Cleaning..." ;\
$(RM) -f $(OBJS) $(DEPS) \
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map
$(CONFIG)/%.d: ;
../../../bsp/gcc/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
../../../../../mcu/apollo/hal/gcc/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo/hal
# Automatically include any generated dependencies
-include $(DEPS)
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/gcc/clkout.ld
+63
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@@ -0,0 +1,63 @@
/******************************************************************************
*
* clkout.ld - Linker script for applications using startup_gnu.c
*
*****************************************************************************/
ENTRY(am_reset_isr)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
}
SECTIONS
{
.text :
{
. = ALIGN(4);
KEEP(*(.isr_vector))
KEEP(*(.patch))
*(.text)
*(.text*)
*(.rodata)
*(.rodata*)
. = ALIGN(4);
_etext = .;
} > FLASH
/* User stack section initialized by startup code. */
.stack (NOLOAD):
{
. = ALIGN(8);
*(.stack)
*(.stack*)
. = ALIGN(8);
} > SRAM
.data :
{
. = ALIGN(4);
_sdata = .;
*(.data)
*(.data*)
. = ALIGN(4);
_edata = .;
} > SRAM AT>FLASH
/* used by startup to initialize data */
_init_data = LOADADDR(.data);
.bss :
{
. = ALIGN(4);
_sbss = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} > SRAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/gcc/startup_gcc.c
+286
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@@ -0,0 +1,286 @@
//*****************************************************************************
//
//! @file startup_gcc.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Forward declaration of interrupt handlers.
//
//*****************************************************************************
extern void am_reset_isr(void) __attribute ((naked));
extern void am_nmi_isr(void) __attribute ((weak));
extern void am_fault_isr(void) __attribute ((weak));
extern void am_mpufault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_busfault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_usagefault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_svcall_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_debugmon_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_pendsv_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_systick_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_brownout_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_adc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_watchdog_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_clkgen_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_vcomp_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_ios_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_acc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_gpio_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ctimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_uart_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software12_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software13_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software14_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software15_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_default_isr(void) __attribute ((weak));
//*****************************************************************************
//
// The entry point for the application.
//
//*****************************************************************************
extern int main(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
__attribute__ ((section(".stack")))
static uint32_t g_pui32Stack[1024];
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__attribute__ ((section(".isr_vector")))
void (* const g_am_pfnVectors[])(void) =
{
(void (*)(void))((uint32_t)g_pui32Stack + sizeof(g_pui32Stack)),
// The initial stack pointer
am_reset_isr, // The reset handler
am_nmi_isr, // The NMI handler
am_fault_isr, // The hard fault handler
am_fault_isr, // The MPU fault handler
am_fault_isr, // The bus fault handler
am_fault_isr, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
am_svcall_isr, // SVCall handle
am_debugmon_isr, // Debug monitor handler
0, // Reserved
am_pendsv_isr, // The PendSV handler
am_systick_isr, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout
am_watchdog_isr, // 1: Watchdog
am_clkgen_isr, // 2: CLKGEN
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_adc_isr, // 8: ADC
am_gpio_isr, // 9: GPIO
am_ctimer_isr, // 10: CTIMER
am_uart_isr, // 11: UART
am_software12_isr, // 12: Software Interrupt
am_software13_isr, // 13: Software Interrupt
am_software14_isr, // 14: Software Interrupt
am_software15_isr // 15: Software Interrupt
};
//*****************************************************************************
//
// The following are constructs created by the linker, indicating where the
// the "data" and "bss" segments reside in memory. The initializers for the
// "data" segment resides immediately following the "text" segment.
//
//*****************************************************************************
extern uint32_t _etext;
extern uint32_t _sdata;
extern uint32_t _edata;
extern uint32_t _sbss;
extern uint32_t _ebss;
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
#if defined(__GNUC_STDC_INLINE__)
void
am_reset_isr(void)
{
//
// Set the vector table pointer.
//
__asm(" ldr r0, =0xE000ED08\n"
" ldr r1, =g_am_pfnVectors\n"
" str r1, [r0]");
//
// Set the stack pointer.
//
__asm(" ldr sp, [r1]");
#ifndef NOFPU
//
// Enable the FPU.
//
__asm("ldr r0, =0xE000ED88\n"
"ldr r1,[r0]\n"
"orr r1,#(0xF << 20)\n"
"str r1,[r0]\n"
"dsb\n"
"isb\n");
#endif
//
// Copy the data segment initializers from flash to SRAM.
//
__asm(" ldr r0, =_init_data\n"
" ldr r1, =_sdata\n"
" ldr r2, =_edata\n"
"copy_loop:\n"
" ldr r3, [r0], #4\n"
" str r3, [r1], #4\n"
" cmp r1, r2\n"
" blt copy_loop\n");
//
// Zero fill the bss segment.
//
__asm(" ldr r0, =_sbss\n"
" ldr r1, =_ebss\n"
" mov r2, #0\n"
"zero_loop:\n"
" cmp r0, r1\n"
" it lt\n"
" strlt r2, [r0], #4\n"
" blt zero_loop");
//
// Call the application's entry point.
//
main();
//
// If main returns then execute a break point instruction
//
__asm(" bkpt ");
}
#else
#error GNU STDC inline not supported.
#endif
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
void
am_nmi_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_fault_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/iar/Makefile
+80
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@@ -0,0 +1,80 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := clkout
COMPILERNAME := iar
PROJECT := clkout_iar
CONFIG := bin
AM_SoftwareRoot ?= ../../../..
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p IarBuild.exe)
RM = $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
IarBuild.exe clkout.ewp -make Debug -log info
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
IarBuild.exe clkout.ewp -clean Debug -log all
../../../bsp/iar/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
../../../../../mcu/apollo/hal/iar/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo/hal
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/iar/bin/clkout.log
+2646
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/iar/bin/clkout.out
BIN
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/iar/clkout.ewp
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/iar/clkout.eww
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@@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\clkout.ewp</path>
</project>
<batchBuild/>
</workspace>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/iar/clkout.icf
+101
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//*****************************************************************************
//
// clkout.icf
//
// IAR linker Configuration File
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
//
// Define a memory section that covers the entire 4 GB addressable space of the
// processor. (32-bit can address up to 4GB)
//
define memory mem with size = 4G;
//
// Define a region for the flash.
//
define region FLASH = mem:[from 0x00000000 to 0x00080000];
//
// Define a region for the SRAM.
//
define region SRAM = mem:[from 0x10000000 to 0x10010000];
//
// Define a block for the heap.
//
define block HEAP with alignment = 0x8, size = 0x00000000 { };
//
// Define a block for the stack.
//
define block CSTACK with alignment = 0x8, size = 1024 { };
//
// Read/Write values should be initialized by copying from flash.
//
initialize by copy { readwrite };
//
// Indicate that the noinit values should be left alone.
//
do not initialize { section .noinit };
//
// Place the interrupt vectors at the start of flash.
//
place at start of FLASH { readonly section .intvec };
//
// Place the remainder of the read-only items into flash.
//
place in FLASH { readonly };
//
// Place the stack at the start of SRAM.
//
place at start of SRAM { block CSTACK, section .noinit };
//
// Place all read/write items into SRAM.
//
place in SRAM { block HEAP, readwrite };
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/iar/startup_iar.c
+298
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@@ -0,0 +1,298 @@
//*****************************************************************************
//
//! @file startup_iar.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Enable the IAR extensions for this source file.
//
//*****************************************************************************
#pragma language = extended
//*****************************************************************************
//
// Weak function links.
//
//*****************************************************************************
#pragma weak am_mpufault_isr = am_fault_isr
#pragma weak am_busfault_isr = am_fault_isr
#pragma weak am_usagefault_isr = am_fault_isr
#pragma weak am_svcall_isr = am_default_isr
#pragma weak am_debugmon_isr = am_default_isr
#pragma weak am_pendsv_isr = am_default_isr
#pragma weak am_systick_isr = am_default_isr
#pragma weak am_brownout_isr = am_default_isr
#pragma weak am_adc_isr = am_default_isr
#pragma weak am_watchdog_isr = am_default_isr
#pragma weak am_clkgen_isr = am_default_isr
#pragma weak am_vcomp_isr = am_default_isr
#pragma weak am_ioslave_ios_isr = am_default_isr
#pragma weak am_ioslave_acc_isr = am_default_isr
#pragma weak am_iomaster0_isr = am_default_isr
#pragma weak am_iomaster1_isr = am_default_isr
#pragma weak am_gpio_isr = am_default_isr
#pragma weak am_ctimer_isr = am_default_isr
#pragma weak am_uart_isr = am_default_isr
//*****************************************************************************
//
// Forward declaration of the default fault handlers.
//
//*****************************************************************************
extern __stackless void am_reset_isr(void);
extern __weak void am_nmi_isr(void);
extern __weak void am_fault_isr(void);
extern void am_mpufault_isr(void);
extern void am_busfault_isr(void);
extern void am_usagefault_isr(void);
extern void am_svcall_isr(void);
extern void am_debugmon_isr(void);
extern void am_pendsv_isr(void);
extern void am_systick_isr(void);
extern void am_brownout_isr(void);
extern void am_adc_isr(void);
extern void am_watchdog_isr(void);
extern void am_clkgen_isr(void);
extern void am_vcomp_isr(void);
extern void am_ioslave_ios_isr(void);
extern void am_ioslave_acc_isr(void);
extern void am_iomaster0_isr(void);
extern void am_iomaster1_isr(void);
extern void am_gpio_isr(void);
extern void am_ctimer_isr(void);
extern void am_uart_isr(void);
extern void am_default_isr(void);
//*****************************************************************************
//
// The entry point for the application startup code.
//
//*****************************************************************************
extern void __iar_program_start(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
static uint32_t pui32Stack[1024] @ ".noinit";
//*****************************************************************************
//
// A union that describes the entries of the vector table. The union is needed
// since the first entry is the stack pointer and the remainder are function
// pointers.
//
//*****************************************************************************
typedef union
{
void (*pfnHandler)(void);
uint32_t ui32Ptr;
}
uVectorEntry;
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__root const uVectorEntry __vector_table[] @ ".intvec" =
{
{ .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) },
// The initial stack pointer
am_reset_isr, // The reset handler
am_nmi_isr, // The NMI handler
am_fault_isr, // The hard fault handler
am_fault_isr, // The MPU fault handler
am_fault_isr, // The bus fault handler
am_fault_isr, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
am_svcall_isr, // SVCall handle
am_debugmon_isr, // Debug monitor handler
0, // Reserved
am_pendsv_isr, // The PendSV handler
am_systick_isr, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout
am_watchdog_isr, // 1: Watchdog
am_clkgen_isr, // 2: CLKGEN
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_adc_isr, // 8: ADC
am_gpio_isr, // 9: GPIO
am_ctimer_isr, // 10: CTIMER
am_uart_isr // 11: UART
};
//*****************************************************************************
//
// Note - The template for this function is originally found in IAR's module,
// low_level_init.c. As supplied by IAR, it is an empty function.
//
// This module contains the function `__low_level_init', a function
// that is called before the `main' function of the program. Normally
// low-level initializations - such as setting the prefered interrupt
// level or setting the watchdog - can be performed here.
//
// Note that this function is called before the data segments are
// initialized, this means that this function cannot rely on the
// values of global or static variables.
//
// When this function returns zero, the startup code will inhibit the
// initialization of the data segments. The result is faster startup,
// the drawback is that neither global nor static data will be
// initialized.
//
// Copyright 1999-2017 IAR Systems AB.
//
// $Revision: 112610 $
//
//
//
//
//*****************************************************************************
#define AM_REGVAL(x) (*((volatile uint32_t *)(x)))
#define VTOR_ADDR 0xE000ED08
__interwork int __low_level_init(void)
{
AM_REGVAL(VTOR_ADDR) = (uint32_t)&__vector_table;
/*==================================*/
/* Choose if segment initialization */
/* should be done or not. */
/* Return: 0 to omit seg_init */
/* 1 to run seg_init */
/*==================================*/
return 1;
}
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
void
am_reset_isr(void)
{
//
// Call the application's entry point.
//
__iar_program_start();
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
__weak void
am_nmi_isr(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
__weak void
am_fault_isr(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
static void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/keil/Dbg_RAM.ini
+59
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@@ -0,0 +1,59 @@
/*----------------------------------------------------------------------------
* Name: Dbg_RAM.ini
* Purpose: RAM Debug Initialization File
* Note(s):
*----------------------------------------------------------------------------
* This file is part of the uVision/ARM development tools.
* This software may only be used under the terms of a valid, current,
* end user licence from KEIL for a compatible version of KEIL software
* development tools. Nothing else gives you the right to use this software.
*
* This software is supplied "AS IS" without warranties of any kind.
*
* Copyright (c) 2008-2013 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
TraceSetup() Turn on ITM clocks, etc.
*----------------------------------------------------------------------------*/
FUNC void TraceSetup (void) {
// turn on the ITM/TPIU clock
_WDWORD(0x40020250, 0x00000201); // TPIU clock enabled at 3MHz
}
/*----------------------------------------------------------------------------
Setup() configure PC & SP for RAM Debug
*----------------------------------------------------------------------------*/
FUNC void Setup (void) {
SP = _RDWORD(0x00000000+0x0); // Setup Stack Pointer
PC = _RDWORD(0x00000000+0x4); // Setup Program Counter
_WDWORD(0xE000ED08, 0x00000000+0x0); // Setup Vector Table Offset Register (done in system file)
}
LOAD %L INCREMENTAL // load the application
// Executed after reset via uVision's 'Reset'-button
FUNC void OnResetExec (void) {
//Set_ui32HALflags();
//TraceSetup();
}
FUNC void Set_ui32HALflags (void) {
TraceSetup();
g_ui32HALflags = 0x00000001;
_break_ = 1;
}
Setup(); // Setup for Running
BS main, 1, "Set_ui32HALflags()";
g
/*----------------------------------------------------------------------------
*----------------------------------------------------------------------------*/
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/keil/JLinkSettings.ini
+40
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@@ -0,0 +1,40 @@
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
MonModeVTableAddr = 0xFFFFFFFF
MonModeDebug = 0
MaxNumAPs = 0
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile=""
[FLASH]
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 1
Device="APOLLO512-KBR"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/keil/Makefile
+80
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@@ -0,0 +1,80 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := clkout
COMPILERNAME := Keil
PROJECT := clkout_Keil
CONFIG := bin
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p UV4.exe)
RM := $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
UV4.exe -b -t "clkout" clkout.uvprojx -j0 || [ $$? -eq 1 ]
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
$(RM) -rf $(CONFIG)
../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib:
$(MAKE) -C ../../../../../mcu/apollo/hal
../../../bsp/keil/bin/libam_bsp.lib:
$(MAKE) -C ../../../bsp
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/keil/bin/clkout.txt
+3337
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File diff suppressed because it is too large Load Diff
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/keil/clkout.sct
+59
View File
@@ -0,0 +1,59 @@
;******************************************************************************
;
; clkout.sct
;
; Scatter file for Keil linker configuration.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
LR_1 0x00000000
{
FLASH 0x00000000 0x00080000
{
*.o (RESET, +First)
* (+RO)
}
SRAM 0x10000000 0x00010000
{
* (+RW, +ZI)
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/keil/clkout.uvoptx
+324
View File
@@ -0,0 +1,324 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>clkout</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>24000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\Listings\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>0</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>3</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile>.\Dbg_RAM.ini</tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>/</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U483025288 -O462 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP8 -TB1 -TFE0 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo -FS00 -FL080000 -FP0($$Device:APOLLO512-KBR$Flash\Apollo.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name></Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DbgCM</Key>
<Name>-U-O206 -O206 -S2 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS2 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo -FS00 -FL080000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>-UV0236LFE -O462 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO1 -TC3000000 -TP21 -TDS8002 -TDT0 -TDC1F -TIE1 -TIP8 -FO7 -FD10000000 -FC4000 -FN1 -FF0Apollo.FLM -FS00 -FL080000 -FP0($$Device:APOLLO512-KBR$Flash\Apollo.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>1</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<Lin2Executable></Lin2Executable>
<Lin2ConfigFile></Lin2ConfigFile>
<bLin2Auto>0</bLin2Auto>
<bAutoGenD>0</bAutoGenD>
<bAuto2GenD>0</bAuto2GenD>
</TargetOption>
</Target>
<Group>
<GroupName>src</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../src/clkout.c</PathWithFileName>
<FilenameWithoutPath>clkout.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>devices</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../devices/am_devices_led.c</PathWithFileName>
<FilenameWithoutPath>am_devices_led.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>utils</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_delay.c</PathWithFileName>
<FilenameWithoutPath>am_util_delay.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_faultisr.c</PathWithFileName>
<FilenameWithoutPath>am_util_faultisr.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>5</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../../../../../utils/am_util_stdio.c</PathWithFileName>
<FilenameWithoutPath>am_util_stdio.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>keil</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>6</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>../keil/startup_keil.s</PathWithFileName>
<FilenameWithoutPath>startup_keil.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
</ProjectOpt>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/keil/clkout.uvprojx
+449
View File
@@ -0,0 +1,449 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>clkout</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pArmCC></pArmCC>
<TargetOption>
<TargetCommonOption>
<Device>APOLLO512-KBR</Device>
<Vendor>Ambiq Micro</Vendor>
<PackID>AmbiqMicro.Apollo_DFP.1.0.0</PackID>
<PackURL>http://s3.asia.ambiqmicro.com/pack/</PackURL>
<Cpu>IRAM(0x10000000,0x10000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10000000 -FC2000 -FN1 -FF0Apollo -FS00 -FL010000 -FP0($Device:APOLLO512-KBR$Flash\Apollo.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:APOLLO512-KBR$Device\Include\Apollo.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:APOLLO512-KBR$SVD\apollo.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\bin\</OutputDirectory>
<OutputName>clkout</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\Listings\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>1</RunUserProg2>
<UserProg1Name>fromelf --bin --output bin\clkout.bin bin\clkout.axf</UserProg1Name>
<UserProg2Name>fromelf -cedrst --output bin\clkout.txt bin\clkout.axf</UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x10000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>AM_PACKAGE_BGA AM_PART_APOLLO keil</Define>
<Undefine></Undefine>
<IncludePath>../../../bsp;../../../../../devices;../../../../../utils;../src;../../../../..;../../../../../mcu/apollo</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x0</TextAddressRange>
<DataAddressRange>0x10000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\clkout.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib(am_hal_global.o) --keep=am_hal_global.o(.data) </Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>src</GroupName>
<Files>
<File>
<FileName>clkout.c</FileName>
<FileType>1</FileType>
<FilePath>../src/clkout.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>devices</GroupName>
<Files>
<File>
<FileName>am_devices_led.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../devices/am_devices_led.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>utils</GroupName>
<Files>
<File>
<FileName>am_util_delay.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_delay.c</FilePath>
</File>
<File>
<FileName>am_util_faultisr.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_faultisr.c</FilePath>
</File>
<File>
<FileName>am_util_stdio.c</FileName>
<FileType>1</FileType>
<FilePath>../../../../../utils/am_util_stdio.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>keil</GroupName>
<Files>
<File>
<FileName>startup_keil.s</FileName>
<FileType>1</FileType>
<FilePath>../keil/startup_keil.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>lib</GroupName>
<Files>
<File>
<FileName>libam_hal.lib</FileName>
<FileType>4</FileType>
<FilePath>../../../../../mcu/apollo/hal/keil/bin/libam_hal.lib</FilePath>
</File>
<File>
<FileName>libam_bsp.lib</FileName>
<FileType>4</FileType>
<FilePath>../../../bsp/keil/bin/libam_bsp.lib</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/keil/startup_keil.s
+289
View File
@@ -0,0 +1,289 @@
;******************************************************************************
;
;! @file startup_keil.s
;!
;! @brief Definitions for Apollo1 interrupt handlers, the vector table, and the stack.
;
;******************************************************************************
;******************************************************************************
;
; Copyright (c) 2020, Ambiq Micro
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from this
; software without specific prior written permission.
;
; Third party software included in this distribution is subject to the
; additional license terms as defined in the /docs/licenses directory.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; This is part of revision 2.4.2 of the AmbiqSuite Development Package.
;
;******************************************************************************
;******************************************************************************
;
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;************************************************************************
Stack EQU 0x00001000
;******************************************************************************
;
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;
;******************************************************************************
Heap EQU 0x00000000
;******************************************************************************
;
; Allocate space for the stack.
;
;******************************************************************************
AREA STACK, NOINIT, READWRITE, ALIGN=3
StackMem
SPACE Stack
__initial_sp
;******************************************************************************
;
; Allocate space for the heap.
;
;******************************************************************************
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
HeapMem
SPACE Heap
__heap_limit
;******************************************************************************
;
; Indicate that the code in this file preserves 8-byte alignment of the stack.
;
;******************************************************************************
PRESERVE8
;******************************************************************************
;
; Place code into the reset code section.
;
;******************************************************************************
AREA RESET, CODE, READONLY
THUMB
;******************************************************************************
;
; The vector table.
;
;******************************************************************************
;
; Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
; am_usagefault_isr does not work if am_fault_isr is defined externally.
; Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
;
EXPORT __Vectors
__Vectors
DCD StackMem + Stack ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD am_nmi_isr ; NMI Handler
DCD am_fault_isr ; Hard Fault Handler
DCD am_fault_isr ; The MPU fault handler
DCD am_fault_isr ; The bus fault handler
DCD am_fault_isr ; The usage fault handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD am_svcall_isr ; SVCall handler
DCD am_debugmon_isr ; Debug monitor handler
DCD 0 ; Reserved
DCD am_pendsv_isr ; The PendSV handler
DCD am_systick_isr ; The SysTick handler
;
; Peripheral Interrupts
;
DCD am_brownout_isr ; 0: Reserved
DCD am_watchdog_isr ; 1: Reserved
DCD am_clkgen_isr ; 2: CLKGEN
DCD am_vcomp_isr ; 3: Voltage Comparator
DCD am_ioslave_ios_isr ; 4: I/O Slave general
DCD am_ioslave_acc_isr ; 5: I/O Slave access
DCD am_iomaster0_isr ; 6: I/O Master 0
DCD am_iomaster1_isr ; 7: I/O Master 1
DCD am_adc_isr ; 8: Reserved
DCD am_gpio_isr ; 9: GPIO
DCD am_ctimer_isr ; 10: CTIMER
DCD am_uart_isr ; 11: UART
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
;******************************************************************************
;
; This is the code that gets called when the processor first starts execution
; following a reset event.
;
;******************************************************************************
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
;
; Enable the FPU.
;
MOVW R0, #0xED88
MOVT R0, #0xE000
LDR R1, [R0]
ORR R1, #0x00F00000
STR R1, [R0]
DSB
ISB
;
; Branch to main.
;
LDR R0, =__main
BX R0
ENDP
;******************************************************************************
;
; Weak Exception Handlers.
;
;******************************************************************************
am_nmi_isr PROC
EXPORT am_nmi_isr [WEAK]
B .
ENDP
am_fault_isr\
PROC
EXPORT am_fault_isr [WEAK]
B .
ENDP
am_memmanage_isr\
PROC
EXPORT am_memmanage_isr [WEAK]
B .
ENDP
am_default_isr\
PROC
EXPORT am_svcall_isr [WEAK]
EXPORT am_debugmon_isr [WEAK]
EXPORT am_pendsv_isr [WEAK]
EXPORT am_systick_isr [WEAK]
EXPORT am_brownout_isr [WEAK]
EXPORT am_adc_isr [WEAK]
EXPORT am_watchdog_isr [WEAK]
EXPORT am_clkgen_isr [WEAK]
EXPORT am_vcomp_isr [WEAK]
EXPORT am_ioslave_ios_isr [WEAK]
EXPORT am_ioslave_acc_isr [WEAK]
EXPORT am_iomaster0_isr [WEAK]
EXPORT am_iomaster1_isr [WEAK]
EXPORT am_gpio_isr [WEAK]
EXPORT am_ctimer_isr [WEAK]
EXPORT am_uart_isr [WEAK]
am_svcall_isr
am_debugmon_isr
am_pendsv_isr
am_systick_isr
am_brownout_isr
am_adc_isr
am_watchdog_isr
am_clkgen_isr
am_vcomp_isr
am_ioslave_ios_isr
am_ioslave_acc_isr
am_iomaster0_isr
am_iomaster1_isr
am_gpio_isr
am_ctimer_isr
am_uart_isr
; all device interrupts go here unless the weak label is over
; ridden in the linker hard spin so the debugger will know it
; was an unhandled interrupt request a come-from-buffer or
; instruction trace hardware would sure be nice if you get here
B .
ENDP
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; Initialization of the heap and stack.
;
;******************************************************************************
AREA |.text|, CODE, READONLY
;******************************************************************************
;
; User Initial Stack & Heap.
;
;******************************************************************************
IF :DEF: __MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =HeapMem
LDR R1, =(StackMem + Stack)
LDR R2, =(HeapMem + Heap)
LDR R3, =StackMem
BX LR
ENDP
ENDIF
;******************************************************************************
;
; Align the end of the section.
;
;******************************************************************************
ALIGN
;******************************************************************************
;
; All Done
;
;******************************************************************************
END
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/clkout/src/clkout.c
+206
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@@ -0,0 +1,206 @@
//*****************************************************************************
//
//! @file clkout.c
//!
//! @brief Enables a clock source to clkout and then tracks it on an LED array.
//!
//! This example enables the LFRC to a clkout pin then uses GPIO polling to
//! track its rising edge and toggle an LED at 1 hertz.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include "am_mcu_apollo.h"
#include "am_bsp.h"
#include "am_util.h"
//*****************************************************************************
//
// Macro definitions
//
//*****************************************************************************
#define RISING_EDGE_COUNT 500 // Turn 500 Hz (LFRC/2) clkout into 1 Hz blinky
//*****************************************************************************
//
// Main function.
//
//*****************************************************************************
int
main(void)
{
int32_t iRisingCount, iLEDcount;
bool bNewClkout, bOldClkout;
//
// Set the clock frequency.
//
am_hal_clkgen_sysclk_select(AM_HAL_CLKGEN_SYSCLK_MAX);
//
// Set the default cache configuration
//
am_hal_cachectrl_enable(&am_hal_cachectrl_defaults);
//
// Configure the board for low power operation.
//
am_bsp_low_power_init();
//
// Initialize the printf interface for ITM/SWO output.
//
am_util_stdio_printf_init((am_util_stdio_print_char_t) am_bsp_itm_string_print);
//
// Initialize the SWO GPIO pin
//
am_bsp_pin_enable(ITM_SWO);
//
// Enable the ITM.
//
am_hal_itm_enable();
//
// Enable debug printf messages using ITM on SWO pin
//
am_bsp_debug_printf_enable();
//
// Clear the terminal and print the banner.
//
am_util_stdio_terminal_clear();
am_util_stdio_printf("CLKOUT to LED Example\n");
am_util_stdio_printf("\tWalks the board LEDs about once a second based on the CLKOUT "
"signal.\n");
//
// We are done printing. Disable debug printf messages on ITM.
//
am_bsp_debug_printf_disable();
//
// Clear the LED.
//
am_devices_led_array_init(am_bsp_psLEDs, AM_BSP_NUM_LEDS);
//
// Enable the LFRC.
//
am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_LFRC);
//
// Enable the clockout to the desired pin.
// And make it readable on the pin with AM_HAL_GPIO_INPEN
//
am_hal_gpio_pin_config(AM_BSP_GPIO_CLKOUT_PIN,
(AM_BSP_GPIO_CFG_CLKOUT_PIN | AM_HAL_GPIO_INPEN));
//
// Initialize clkgen to output the selected clock.
//
am_hal_clkgen_clkout_enable(AM_HAL_CLKGEN_CLKOUT_CKSEL_LFRC_DIV2);
//
// Initialize LED 0 to on
//
am_devices_led_toggle(am_bsp_psLEDs, 0);
iLEDcount = 1; // LED 1 is next
//
// Initialize loop variables
//
iRisingCount = RISING_EDGE_COUNT;
bOldClkout = false;
//
// Loop forever tracking the rising edge of CLKOUT.
//
while (1)
{
//
// Grab new clock output value and look for a change.
//
bNewClkout = am_hal_gpio_input_bit_read(AM_BSP_GPIO_CLKOUT_PIN);
//
// Look for any change.
//
if ( bOldClkout != bNewClkout )
{
//
// OK a change occurred.
//
bOldClkout = bNewClkout;
//
// Was it rising or falling.
//
if ( bNewClkout )
{
//
// It was rising so count them until time to act.
//
if (--iRisingCount < 0)
{
//
// Act on the time out (walk the 4 LEDs)
//
am_devices_led_off(am_bsp_psLEDs, 0);
am_devices_led_off(am_bsp_psLEDs, 1);
am_devices_led_off(am_bsp_psLEDs, 2);
am_devices_led_off(am_bsp_psLEDs, 3);
am_devices_led_off(am_bsp_psLEDs, 4);
am_devices_led_on(am_bsp_psLEDs, iLEDcount);
iLEDcount++;
iLEDcount %= 5;
//
// Reset the rising edge count.
//
iRisingCount = RISING_EDGE_COUNT;
}
}
}
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/coremark/Makefile
+49
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@@ -0,0 +1,49 @@
#******************************************************************************
#
# Makefile - Rules for compiling
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
# Include rules specific to this board
-include ../../board-defs.mk
-include example-defs.mk
# All makefiles use this to find the top level directory.
SWROOT?=../../../..
# Include rules for building generic examples.
include $(SWROOT)/makedefs/example.mk
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/coremark/gcc/Makefile
+188
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@@ -0,0 +1,188 @@
#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := coremark
COMPILERNAME := gcc
PROJECT := coremark_gcc
CONFIG := bin
SHELL:=/bin/bash
#### Setup ####
TOOLCHAIN ?= arm-none-eabi
PART = apollo
CPU = cortex-m4
FPU = fpv4-sp-d16
#FABI = softfp
FABI = hard
LINKER_FILE := ./coremark.ld
STARTUP_FILE := ./startup_$(COMPILERNAME).c
#### Required Executables ####
CC = $(TOOLCHAIN)-gcc
GCC = $(TOOLCHAIN)-gcc
CPP = $(TOOLCHAIN)-cpp
LD = $(TOOLCHAIN)-ld
CP = $(TOOLCHAIN)-objcopy
OD = $(TOOLCHAIN)-objdump
RD = $(TOOLCHAIN)-readelf
AR = $(TOOLCHAIN)-ar
SIZE = $(TOOLCHAIN)-size
RM = $(shell which rm 2>/dev/null)
EXECUTABLES = CC LD CP OD AR RD SIZE GCC
K := $(foreach exec,$(EXECUTABLES),\
$(if $(shell which $($(exec)) 2>/dev/null),,\
$(info $(exec) not found on PATH ($($(exec))).)$(exec)))
$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found))
ifneq ($(strip $(value K)),)
all clean:
$(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
DEFINES = -DPART_$(PART)
DEFINES+= -DAM_PACKAGE_BGA
DEFINES+= -DCOREMARK
DEFINES+= -DAM_PART_APOLLO
DEFINES+= -Dgcc
INCLUDES = -I../../../../../devices
INCLUDES+= -I../../../../../utils
INCLUDES+= -I../../../../..
INCLUDES+= -I../../../bsp
INCLUDES+= -I../../../../../mcu/apollo
INCLUDES+= -I../src
VPATH = ../../../../../devices
VPATH+=:../src
VPATH+=:../../../../../utils
SRC = am_time.c
SRC += core_list_join.c
SRC += core_main.c
SRC += core_matrix.c
SRC += core_portme.c
SRC += core_state.c
SRC += core_util.c
SRC += am_devices_led.c
SRC += am_util_delay.c
SRC += am_util_faultisr.c
SRC += am_util_stdio.c
SRC += startup_gcc.c
CSRC = $(filter %.c,$(SRC))
ASRC = $(filter %.s,$(SRC))
OBJS = $(CSRC:%.c=$(CONFIG)/%.o)
OBJS+= $(ASRC:%.s=$(CONFIG)/%.o)
DEPS = $(CSRC:%.c=$(CONFIG)/%.d)
DEPS+= $(ASRC:%.s=$(CONFIG)/%.d)
LIBS = ../../../bsp/gcc/bin/libam_bsp.a
LIBS += ../../../../../mcu/apollo/hal/gcc/bin/libam_hal.a
CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
CFLAGS+= -ffunction-sections -fdata-sections
CFLAGS+= -MMD -MP -std=c99 -Wall -g
CFLAGS+= -O3
CFLAGS+= $(DEFINES)
CFLAGS+= $(INCLUDES)
CFLAGS+=
LFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI)
LFLAGS+= -nostartfiles -static
LFLAGS+= -Wl,--gc-sections,--entry,am_reset_isr,-Map,$(CONFIG)/$(TARGET).map
LFLAGS+= -Wl,--start-group -lm -lc -lgcc $(LIBS) -Wl,--end-group
LFLAGS+=
# Additional user specified CFLAGS
CFLAGS+=$(EXTRA_CFLAGS)
CPFLAGS = -Obinary
ODFLAGS = -S
#### Rules ####
all: directories $(CONFIG)/$(TARGET).bin
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
$(CONFIG)/%.o: %.c $(CONFIG)/%.d
@echo " Compiling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/%.o: %.s $(CONFIG)/%.d
@echo " Assembling $(COMPILERNAME) $<" ;\
$(CC) -c $(CFLAGS) $< -o $@
$(CONFIG)/$(TARGET).axf: $(OBJS) $(LIBS)
@echo " Linking $(COMPILERNAME) $@" ;\
$(CC) -Wl,-T,$(LINKER_FILE) -o $@ $(OBJS) $(LFLAGS)
$(CONFIG)/$(TARGET).bin: $(CONFIG)/$(TARGET).axf
@echo " Copying $(COMPILERNAME) $@..." ;\
$(CP) $(CPFLAGS) $< $@ ;\
$(OD) $(ODFLAGS) $< > $(CONFIG)/$(TARGET).lst
clean:
@echo "Cleaning..." ;\
$(RM) -f $(OBJS) $(DEPS) \
$(CONFIG)/$(TARGET).bin $(CONFIG)/$(TARGET).axf \
$(CONFIG)/$(TARGET).lst $(CONFIG)/$(TARGET).map
$(CONFIG)/%.d: ;
../../../bsp/gcc/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
../../../../../mcu/apollo/hal/gcc/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo/hal
# Automatically include any generated dependencies
-include $(DEPS)
endif
.PHONY: all clean directories
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/coremark/gcc/coremark.ld
+63
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@@ -0,0 +1,63 @@
/******************************************************************************
*
* coremark.ld - Linker script for applications using startup_gnu.c
*
*****************************************************************************/
ENTRY(am_reset_isr)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
}
SECTIONS
{
.text :
{
. = ALIGN(4);
KEEP(*(.isr_vector))
KEEP(*(.patch))
*(.text)
*(.text*)
*(.rodata)
*(.rodata*)
. = ALIGN(4);
_etext = .;
} > FLASH
/* User stack section initialized by startup code. */
.stack (NOLOAD):
{
. = ALIGN(8);
*(.stack)
*(.stack*)
. = ALIGN(8);
} > SRAM
.data :
{
. = ALIGN(4);
_sdata = .;
*(.data)
*(.data*)
. = ALIGN(4);
_edata = .;
} > SRAM AT>FLASH
/* used by startup to initialize data */
_init_data = LOADADDR(.data);
.bss :
{
. = ALIGN(4);
_sbss = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} > SRAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/coremark/gcc/startup_gcc.c
+286
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@@ -0,0 +1,286 @@
//*****************************************************************************
//
//! @file startup_gcc.c
//!
//! @brief Definitions for interrupt handlers, the vector table, and the stack.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
//*****************************************************************************
//
// Forward declaration of interrupt handlers.
//
//*****************************************************************************
extern void am_reset_isr(void) __attribute ((naked));
extern void am_nmi_isr(void) __attribute ((weak));
extern void am_fault_isr(void) __attribute ((weak));
extern void am_mpufault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_busfault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_usagefault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
extern void am_svcall_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_debugmon_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_pendsv_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_systick_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_brownout_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_adc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_watchdog_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_clkgen_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_vcomp_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_ios_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ioslave_acc_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster0_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_iomaster1_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_gpio_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_ctimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_uart_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software12_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software13_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software14_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_software15_isr(void) __attribute ((weak, alias ("am_default_isr")));
extern void am_default_isr(void) __attribute ((weak));
//*****************************************************************************
//
// The entry point for the application.
//
//*****************************************************************************
extern int main(void);
//*****************************************************************************
//
// Reserve space for the system stack.
//
//*****************************************************************************
__attribute__ ((section(".stack")))
static uint32_t g_pui32Stack[1024];
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
// am_usagefault_isr does not work if am_fault_isr is defined externally.
// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
//
//*****************************************************************************
__attribute__ ((section(".isr_vector")))
void (* const g_am_pfnVectors[])(void) =
{
(void (*)(void))((uint32_t)g_pui32Stack + sizeof(g_pui32Stack)),
// The initial stack pointer
am_reset_isr, // The reset handler
am_nmi_isr, // The NMI handler
am_fault_isr, // The hard fault handler
am_fault_isr, // The MPU fault handler
am_fault_isr, // The bus fault handler
am_fault_isr, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
am_svcall_isr, // SVCall handle
am_debugmon_isr, // Debug monitor handler
0, // Reserved
am_pendsv_isr, // The PendSV handler
am_systick_isr, // The SysTick handler
//
// Peripheral Interrupts
//
am_brownout_isr, // 0: Brownout
am_watchdog_isr, // 1: Watchdog
am_clkgen_isr, // 2: CLKGEN
am_vcomp_isr, // 3: Voltage Comparator
am_ioslave_ios_isr, // 4: I/O Slave general
am_ioslave_acc_isr, // 5: I/O Slave access
am_iomaster0_isr, // 6: I/O Master 0
am_iomaster1_isr, // 7: I/O Master 1
am_adc_isr, // 8: ADC
am_gpio_isr, // 9: GPIO
am_ctimer_isr, // 10: CTIMER
am_uart_isr, // 11: UART
am_software12_isr, // 12: Software Interrupt
am_software13_isr, // 13: Software Interrupt
am_software14_isr, // 14: Software Interrupt
am_software15_isr // 15: Software Interrupt
};
//*****************************************************************************
//
// The following are constructs created by the linker, indicating where the
// the "data" and "bss" segments reside in memory. The initializers for the
// "data" segment resides immediately following the "text" segment.
//
//*****************************************************************************
extern uint32_t _etext;
extern uint32_t _sdata;
extern uint32_t _edata;
extern uint32_t _sbss;
extern uint32_t _ebss;
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called.
//
//*****************************************************************************
#if defined(__GNUC_STDC_INLINE__)
void
am_reset_isr(void)
{
//
// Set the vector table pointer.
//
__asm(" ldr r0, =0xE000ED08\n"
" ldr r1, =g_am_pfnVectors\n"
" str r1, [r0]");
//
// Set the stack pointer.
//
__asm(" ldr sp, [r1]");
#ifndef NOFPU
//
// Enable the FPU.
//
__asm("ldr r0, =0xE000ED88\n"
"ldr r1,[r0]\n"
"orr r1,#(0xF << 20)\n"
"str r1,[r0]\n"
"dsb\n"
"isb\n");
#endif
//
// Copy the data segment initializers from flash to SRAM.
//
__asm(" ldr r0, =_init_data\n"
" ldr r1, =_sdata\n"
" ldr r2, =_edata\n"
"copy_loop:\n"
" ldr r3, [r0], #4\n"
" str r3, [r1], #4\n"
" cmp r1, r2\n"
" blt copy_loop\n");
//
// Zero fill the bss segment.
//
__asm(" ldr r0, =_sbss\n"
" ldr r1, =_ebss\n"
" mov r2, #0\n"
"zero_loop:\n"
" cmp r0, r1\n"
" it lt\n"
" strlt r2, [r0], #4\n"
" blt zero_loop");
//
// Call the application's entry point.
//
main();
//
// If main returns then execute a break point instruction
//
__asm(" bkpt ");
}
#else
#error GNU STDC inline not supported.
#endif
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
void
am_nmi_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_fault_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void
am_default_isr(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/coremark/iar/Makefile
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#******************************************************************************
#
# Makefile - Rules for building the libraries, examples and docs.
#
# Copyright (c) 2020, Ambiq Micro
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# Third party software included in this distribution is subject to the
# additional license terms as defined in the /docs/licenses directory.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# This is part of revision 2.4.2 of the AmbiqSuite Development Package.
#
#******************************************************************************
TARGET := coremark
COMPILERNAME := iar
PROJECT := coremark_iar
CONFIG := bin
AM_SoftwareRoot ?= ../../../..
SHELL:=/bin/bash
#### Required Executables ####
K := $(shell type -p IarBuild.exe)
RM = $(shell which rm 2>/dev/null)
ifeq ($(K),)
all clean:
$(info Tools w/$(COMPILERNAME) not installed.)
$(RM) -rf bin
else
all: directories binary
.PHONY: binary
binary:
IarBuild.exe coremark.ewp -make Debug -log info
directories: $(CONFIG)
$(CONFIG):
@mkdir -p $@
clean:
@echo Cleaning... ;\
IarBuild.exe coremark.ewp -clean Debug -log all
../../../../../mcu/apollo/hal/iar/bin/libam_hal.a:
$(MAKE) -C ../../../../../mcu/apollo/hal
../../../bsp/iar/bin/libam_bsp.a:
$(MAKE) -C ../../../bsp
endif
.PHONY: all clean directories
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ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/coremark/iar/coremark.eww
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\coremark.ewp</path>
</project>
<batchBuild/>
</workspace>
ambiq-hal-sys/ambiq-sparkfun-sdk/boards/apollo1_evb/examples/coremark/iar/coremark.icf
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//*****************************************************************************
//
// coremark.icf
//
// IAR linker Configuration File
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2020, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
//
//*****************************************************************************
//
// Define a memory section that covers the entire 4 GB addressable space of the
// processor. (32-bit can address up to 4GB)
//
define memory mem with size = 4G;
//
// Define a region for the flash.
//
define region FLASH = mem:[from 0x00000000 to 0x00080000];
//
// Define a region for the SRAM.
//
define region SRAM = mem:[from 0x10000000 to 0x10010000];
//
// Define a block for the heap.
//
define block HEAP with alignment = 0x8, size = 0x00000000 { };
//
// Define a block for the stack.
//
define block CSTACK with alignment = 0x8, size = 1024 { };
//
// Read/Write values should be initialized by copying from flash.
//
initialize by copy { readwrite };
//
// Indicate that the noinit values should be left alone.
//
do not initialize { section .noinit };
//
// Place the interrupt vectors at the start of flash.
//
place at start of FLASH { readonly section .intvec };
//
// Place the remainder of the read-only items into flash.
//
place in FLASH { readonly };
//
// Place the stack at the start of SRAM.
//
place at start of SRAM { block CSTACK, section .noinit };
//
// Place all read/write items into SRAM.
//
place in SRAM { block HEAP, readwrite };

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