662 lines
20 KiB
C
662 lines
20 KiB
C
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//*****************************************************************************
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//
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//! @file am_hal_pdm.c
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//!
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//! @brief HAL implementation for the PDM module.
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//!
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//! @addtogroup
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//! @ingroup
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2020, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// Third party software included in this distribution is subject to the
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// additional license terms as defined in the /docs/licenses directory.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#include <stdint.h>
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#include <stdbool.h>
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#include "am_mcu_apollo.h"
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//*****************************************************************************
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//
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// PDM magic number for handle verification.
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//
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//*****************************************************************************
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#define AM_HAL_MAGIC_PDM 0xF956E2
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#define AM_HAL_PDM_HANDLE_VALID(h) \
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((h) && \
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((am_hal_handle_prefix_t *)(h))->s.bInit && \
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(((am_hal_handle_prefix_t *)(h))->s.magic == AM_HAL_MAGIC_PDM))
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//*****************************************************************************
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//
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// Convenience macro for passing errors.
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//
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//*****************************************************************************
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#define RETURN_ON_ERROR(x) \
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if ((x) != AM_HAL_STATUS_SUCCESS) \
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{ \
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return (x); \
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};
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//*****************************************************************************
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//
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// Abbreviation for validating handles and returning errors.
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//
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//*****************************************************************************
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#ifndef AM_HAL_DISABLE_API_VALIDATION
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#define AM_HAL_PDM_HANDLE_CHECK(h) \
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if (!AM_HAL_PDM_HANDLE_VALID(h)) \
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{ \
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return AM_HAL_STATUS_INVALID_HANDLE; \
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}
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#else
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#define AM_HAL_PDM_HANDLE_CHECK(h)
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#endif // AM_HAL_DISABLE_API_VALIDATION
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//*****************************************************************************
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//
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// Helper macros for delays.
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//
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//*****************************************************************************
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#define delay_ms(ms) \
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if (1) \
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{ \
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am_hal_clkgen_status_t sClkGenStatus; \
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am_hal_clkgen_status_get(&sClkGenStatus); \
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am_hal_flash_delay((ms) * (sClkGenStatus.ui32SysclkFreq / 3000)); \
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}
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#define delay_us(us) \
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if (1) \
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{ \
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am_hal_clkgen_status_t sClkGenStatus; \
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am_hal_clkgen_status_get(&sClkGenStatus); \
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am_hal_flash_delay((us) * (sClkGenStatus.ui32SysclkFreq / 3000000)); \
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}
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//*****************************************************************************
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//
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// Structure for handling PDM register state information for power up/down
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//
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//*****************************************************************************
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typedef struct
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{
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bool bValid;
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}
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am_hal_pdm_register_state_t;
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//*****************************************************************************
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//
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// Structure for handling PDM HAL state information.
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//
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//*****************************************************************************
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typedef struct
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{
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am_hal_handle_prefix_t prefix;
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am_hal_pdm_register_state_t sRegState;
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uint32_t ui32Module;
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}
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am_hal_pdm_state_t;
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//*****************************************************************************
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//
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// State structure for each module.
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//
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//*****************************************************************************
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am_hal_pdm_state_t g_am_hal_pdm_states[AM_REG_PDM_NUM_MODULES];
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//*****************************************************************************
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//
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// Static function definitions.
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//
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//*****************************************************************************
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static uint32_t find_dma_threshold(uint32_t ui32TotalCount);
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//*****************************************************************************
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//
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// Initialization function.
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//
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//*****************************************************************************
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uint32_t
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am_hal_pdm_initialize(uint32_t ui32Module, void **ppHandle)
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{
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//
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// Check that the request module is in range.
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//
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if ( ui32Module >= AM_REG_PDM_NUM_MODULES )
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{
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return AM_HAL_STATUS_OUT_OF_RANGE;
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}
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//
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// Check for valid arguements.
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//
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if (!ppHandle)
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{
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return AM_HAL_STATUS_INVALID_ARG;
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}
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//
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// Check if the handle is unallocated.
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//
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if (g_am_hal_pdm_states[ui32Module].prefix.s.bInit)
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{
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return AM_HAL_STATUS_INVALID_OPERATION;
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}
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//
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// Initialize the handle.
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//
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g_am_hal_pdm_states[ui32Module].prefix.s.bInit = true;
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g_am_hal_pdm_states[ui32Module].prefix.s.magic = AM_HAL_MAGIC_PDM;
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g_am_hal_pdm_states[ui32Module].ui32Module = ui32Module;
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g_am_hal_pdm_states[ui32Module].sRegState.bValid = false;
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//
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// Return the handle.
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//
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*ppHandle = (void *)&g_am_hal_pdm_states[ui32Module];
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//
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// Return the status.
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//
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return AM_HAL_STATUS_SUCCESS;
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}
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//*****************************************************************************
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//
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// De-Initialization function.
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//
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//*****************************************************************************
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uint32_t
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am_hal_pdm_deinitialize(void *pHandle)
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{
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am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *)pHandle;
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//
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// Check the handle.
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//
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AM_HAL_PDM_HANDLE_CHECK(pHandle);
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//
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// Reset the handle.
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//
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pState->prefix.s.bInit = false;
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pState->prefix.s.magic = 0;
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pState->ui32Module = 0;
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//
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// Return the status.
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//
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return AM_HAL_STATUS_SUCCESS;
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}
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//*****************************************************************************
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//
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// Power control function.
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//
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//*****************************************************************************
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uint32_t
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am_hal_pdm_power_control(void *pHandle,
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am_hal_sysctrl_power_state_e ePowerState,
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bool bRetainState)
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{
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am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
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uint32_t ui32Module = pState->ui32Module;
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am_hal_pwrctrl_periph_e ePDMPowerModule = ((am_hal_pwrctrl_periph_e)
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(AM_HAL_PWRCTRL_PERIPH_PDM +
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ui32Module));
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//
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// Check the handle.
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//
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AM_HAL_PDM_HANDLE_CHECK(pHandle);
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//
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// Decode the requested power state and update PDM operation accordingly.
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//
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switch (ePowerState)
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{
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//
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// Turn on the PDM.
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//
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case AM_HAL_SYSCTRL_WAKE:
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//
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// Make sure we don't try to restore an invalid state.
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//
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if (bRetainState && !pState->sRegState.bValid)
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{
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return AM_HAL_STATUS_INVALID_OPERATION;
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}
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//
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// Enable power control.
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//
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am_hal_pwrctrl_periph_enable(ePDMPowerModule);
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if (bRetainState)
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{
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//
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// Restore PDM registers
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//
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AM_CRITICAL_BEGIN;
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pState->sRegState.bValid = false;
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AM_CRITICAL_END;
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}
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break;
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//
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// Turn off the PDM.
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//
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case AM_HAL_SYSCTRL_NORMALSLEEP:
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case AM_HAL_SYSCTRL_DEEPSLEEP:
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if (bRetainState)
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{
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AM_CRITICAL_BEGIN;
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pState->sRegState.bValid = true;
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AM_CRITICAL_END;
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}
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//
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// Disable power control.
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//
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am_hal_pwrctrl_periph_disable(ePDMPowerModule);
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break;
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default:
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return AM_HAL_STATUS_INVALID_ARG;
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}
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//
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// Return the status.
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//
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return AM_HAL_STATUS_SUCCESS;
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}
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//*****************************************************************************
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//
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// Configure the PDM.
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//
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//*****************************************************************************
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uint32_t
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am_hal_pdm_configure(void *pHandle, am_hal_pdm_config_t *psConfig)
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{
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am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
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uint32_t ui32Module = pState->ui32Module;
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AM_HAL_PDM_HANDLE_CHECK(pHandle);
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//
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// Apply the config structure settings to the PCFG register.
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//
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PDMn(ui32Module)->PCFG_b.SOFTMUTE = psConfig->bSoftMute;
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PDMn(ui32Module)->PCFG_b.CYCLES = psConfig->ui32GainChangeDelay;
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PDMn(ui32Module)->PCFG_b.HPCUTOFF = psConfig->ui32HighPassCutoff;
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PDMn(ui32Module)->PCFG_b.ADCHPD = psConfig->bHighPassEnable;
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PDMn(ui32Module)->PCFG_b.SINCRATE = psConfig->ui32DecimationRate;
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PDMn(ui32Module)->PCFG_b.MCLKDIV = psConfig->eClkDivider;
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PDMn(ui32Module)->PCFG_b.PGALEFT = psConfig->eLeftGain;
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PDMn(ui32Module)->PCFG_b.PGARIGHT = psConfig->eRightGain;
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PDMn(ui32Module)->PCFG_b.LRSWAP = psConfig->bLRSwap;
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//
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// Set the PDM Core enable bit to enable PDM to PCM conversions.
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//
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PDMn(ui32Module)->PCFG_b.PDMCOREEN = PDM_PCFG_PDMCOREEN_EN;
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//
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// Program the "voice" registers.
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//
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PDMn(ui32Module)->VCFG_b.PDMCLKEN = PDM_VCFG_PDMCLKEN_DIS;
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PDMn(ui32Module)->VCFG_b.IOCLKEN = PDM_VCFG_IOCLKEN_DIS;
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PDMn(ui32Module)->VCFG_b.RSTB = PDM_VCFG_RSTB_RESET;
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PDMn(ui32Module)->VCFG_b.CHSET = psConfig->ePCMChannels;
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PDMn(ui32Module)->VCFG_b.PCMPACK = psConfig->bDataPacking;
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PDMn(ui32Module)->VCFG_b.SELAP = psConfig->ePDMClkSource;
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PDMn(ui32Module)->VCFG_b.DMICKDEL = psConfig->bPDMSampleDelay;
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PDMn(ui32Module)->VCFG_b.BCLKINV = psConfig->bInvertI2SBCLK;
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PDMn(ui32Module)->VCFG_b.I2SEN = psConfig->bI2SEnable;
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PDMn(ui32Module)->VCFG_b.PDMCLKSEL = psConfig->ePDMClkSpeed;
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delay_us(100);
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PDMn(ui32Module)->VCFG_b.RSTB = PDM_VCFG_RSTB_NORM;
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return AM_HAL_STATUS_SUCCESS;
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}
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//*****************************************************************************
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//
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// Enable the PDM.
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//
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//*****************************************************************************
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uint32_t
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am_hal_pdm_enable(void *pHandle)
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{
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am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
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uint32_t ui32Module = pState->ui32Module;
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AM_HAL_PDM_HANDLE_CHECK(pHandle);
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PDMn(ui32Module)->VCFG_b.IOCLKEN = PDM_VCFG_IOCLKEN_EN;
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PDMn(ui32Module)->VCFG_b.PDMCLKEN = PDM_VCFG_PDMCLKEN_EN;
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||
|
|
|
||
|
|
return AM_HAL_STATUS_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Disable the PDM.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
uint32_t
|
||
|
|
am_hal_pdm_disable(void *pHandle)
|
||
|
|
{
|
||
|
|
am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
|
||
|
|
uint32_t ui32Module = pState->ui32Module;
|
||
|
|
AM_HAL_PDM_HANDLE_CHECK(pHandle);
|
||
|
|
|
||
|
|
PDMn(ui32Module)->VCFG_b.IOCLKEN = PDM_VCFG_IOCLKEN_DIS;
|
||
|
|
PDMn(ui32Module)->VCFG_b.PDMCLKEN = PDM_VCFG_PDMCLKEN_DIS;
|
||
|
|
|
||
|
|
return AM_HAL_STATUS_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Given the total number of bytes in a DMA transaction, find a reasonable
|
||
|
|
// threshold setting.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
static uint32_t
|
||
|
|
find_dma_threshold(uint32_t ui32TotalCount)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Start with a threshold value of 24, and search downward for values that
|
||
|
|
// fit our criteria.
|
||
|
|
//
|
||
|
|
uint32_t ui32Threshold;
|
||
|
|
uint32_t ui32Minimum = AM_HAL_PDM_DMA_THRESHOLD_MIN;
|
||
|
|
|
||
|
|
for ( ui32Threshold = 24; ui32Threshold >= ui32Minimum; ui32Threshold -= 4 )
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// With our loop parameters, we've already guaranteed that the
|
||
|
|
// threshold will be no higher than 24, and that it will be divisible
|
||
|
|
// by 4. The only remaining requirement is that ui32TotalCount must
|
||
|
|
// also be divisible by the threshold.
|
||
|
|
//
|
||
|
|
if ((ui32TotalCount % ui32Threshold) == 0)
|
||
|
|
{
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// If we found an appropriate value, we'll return it here. Otherwise, we
|
||
|
|
// will return zero.
|
||
|
|
//
|
||
|
|
if (ui32Threshold < ui32Minimum)
|
||
|
|
{
|
||
|
|
ui32Threshold = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
return ui32Threshold;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Starts a DMA transaction from the PDM directly to SRAM
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
uint32_t
|
||
|
|
am_hal_pdm_dma_start(void *pHandle, am_hal_pdm_transfer_t *pDmaCfg)
|
||
|
|
{
|
||
|
|
am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
|
||
|
|
uint32_t ui32Module = pState->ui32Module;
|
||
|
|
AM_HAL_PDM_HANDLE_CHECK(pHandle);
|
||
|
|
|
||
|
|
#ifndef AM_HAL_DISABLE_API_VALIDATION
|
||
|
|
//
|
||
|
|
// Check for DMA to/from DTCM.
|
||
|
|
//
|
||
|
|
if ( (pDmaCfg->ui32TargetAddr >= AM_HAL_FLASH_DTCM_START) &&
|
||
|
|
(pDmaCfg->ui32TargetAddr <= AM_HAL_FLASH_DTCM_END) )
|
||
|
|
{
|
||
|
|
return AM_HAL_STATUS_OUT_OF_RANGE;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
//
|
||
|
|
// Find an appropriate threshold size for this transfer.
|
||
|
|
//
|
||
|
|
uint32_t ui32Threshold = find_dma_threshold(pDmaCfg->ui32TotalCount);
|
||
|
|
|
||
|
|
//
|
||
|
|
// If we didn't find a threshold that will work, throw an error.
|
||
|
|
//
|
||
|
|
if (ui32Threshold == 0)
|
||
|
|
{
|
||
|
|
return AM_HAL_PDM_STATUS_BAD_TOTALCOUNT;
|
||
|
|
}
|
||
|
|
|
||
|
|
PDMn(ui32Module)->FIFOTHR = ui32Threshold;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Configure DMA.
|
||
|
|
//
|
||
|
|
PDMn(ui32Module)->DMACFG = 0;
|
||
|
|
PDMn(ui32Module)->DMACFG_b.DMAPRI = PDM_DMACFG_DMAPRI_LOW;
|
||
|
|
PDMn(ui32Module)->DMACFG_b.DMADIR = PDM_DMACFG_DMADIR_P2M;
|
||
|
|
PDMn(ui32Module)->DMATOTCOUNT = pDmaCfg->ui32TotalCount;
|
||
|
|
PDMn(ui32Module)->DMATARGADDR = pDmaCfg->ui32TargetAddr;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Make sure the trigger is set for threshold.
|
||
|
|
//
|
||
|
|
PDMn(ui32Module)->DMATRIGEN_b.DTHR = 1;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Enable DMA
|
||
|
|
//
|
||
|
|
PDMn(ui32Module)->DMACFG_b.DMAEN = PDM_DMACFG_DMAEN_EN;
|
||
|
|
|
||
|
|
return AM_HAL_STATUS_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Flush the PDM FIFO
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
uint32_t
|
||
|
|
am_hal_pdm_fifo_flush(void *pHandle)
|
||
|
|
{
|
||
|
|
am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
|
||
|
|
uint32_t ui32Module = pState->ui32Module;
|
||
|
|
AM_HAL_PDM_HANDLE_CHECK(pHandle);
|
||
|
|
|
||
|
|
PDMn(ui32Module)->FIFOFLUSH = 1;
|
||
|
|
|
||
|
|
return AM_HAL_STATUS_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Enable PDM passthrough to the I2S slave.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
uint32_t
|
||
|
|
am_hal_pdm_i2s_enable(void *pHandle)
|
||
|
|
{
|
||
|
|
am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
|
||
|
|
AM_HAL_PDM_HANDLE_CHECK(pHandle);
|
||
|
|
uint32_t ui32Module = pState->ui32Module;
|
||
|
|
|
||
|
|
PDMn(ui32Module)->VCFG_b.I2SEN = PDM_VCFG_I2SEN_EN;
|
||
|
|
|
||
|
|
return AM_HAL_STATUS_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Disable PDM passthrough to the I2S slave.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
uint32_t
|
||
|
|
am_hal_pdm_i2s_disable(void *pHandle)
|
||
|
|
{
|
||
|
|
am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
|
||
|
|
AM_HAL_PDM_HANDLE_CHECK(pHandle);
|
||
|
|
uint32_t ui32Module = pState->ui32Module;
|
||
|
|
|
||
|
|
PDMn(ui32Module)->VCFG_b.I2SEN = PDM_VCFG_I2SEN_DIS;
|
||
|
|
|
||
|
|
return AM_HAL_STATUS_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Interrupt enable.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
uint32_t
|
||
|
|
am_hal_pdm_interrupt_enable(void *pHandle, uint32_t ui32IntMask)
|
||
|
|
{
|
||
|
|
am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
|
||
|
|
uint32_t ui32Module = pState->ui32Module;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Check the handle.
|
||
|
|
//
|
||
|
|
AM_HAL_PDM_HANDLE_CHECK(pHandle);
|
||
|
|
|
||
|
|
PDMn(ui32Module)->INTEN |= ui32IntMask;
|
||
|
|
|
||
|
|
return AM_HAL_STATUS_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Interrupt disable.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
uint32_t
|
||
|
|
am_hal_pdm_interrupt_disable(void *pHandle, uint32_t ui32IntMask)
|
||
|
|
{
|
||
|
|
am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
|
||
|
|
uint32_t ui32Module = pState->ui32Module;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Check the handle.
|
||
|
|
//
|
||
|
|
AM_HAL_PDM_HANDLE_CHECK(pHandle);
|
||
|
|
|
||
|
|
PDMn(ui32Module)->INTEN &= ~ui32IntMask;
|
||
|
|
|
||
|
|
return AM_HAL_STATUS_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Interrupt clear.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
uint32_t
|
||
|
|
am_hal_pdm_interrupt_clear(void *pHandle, uint32_t ui32IntMask)
|
||
|
|
{
|
||
|
|
am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
|
||
|
|
uint32_t ui32Module = pState->ui32Module;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Check the handle.
|
||
|
|
//
|
||
|
|
AM_HAL_PDM_HANDLE_CHECK(pHandle);
|
||
|
|
|
||
|
|
PDMn(ui32Module)->INTCLR = ui32IntMask;
|
||
|
|
|
||
|
|
return AM_HAL_STATUS_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Returns the interrupt status.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
uint32_t
|
||
|
|
am_hal_pdm_interrupt_status_get(void *pHandle, uint32_t *pui32Status, bool bEnabledOnly)
|
||
|
|
{
|
||
|
|
am_hal_pdm_state_t *pState = (am_hal_pdm_state_t *) pHandle;
|
||
|
|
uint32_t ui32Module = pState->ui32Module;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Check the handle.
|
||
|
|
//
|
||
|
|
AM_HAL_PDM_HANDLE_CHECK(pHandle);
|
||
|
|
|
||
|
|
//
|
||
|
|
// If requested, only return the interrupts that are enabled.
|
||
|
|
//
|
||
|
|
if ( bEnabledOnly )
|
||
|
|
{
|
||
|
|
*pui32Status = PDMn(ui32Module)->INTSTAT;
|
||
|
|
*pui32Status &= PDMn(ui32Module)->INTEN;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
*pui32Status = PDMn(ui32Module)->INTSTAT;
|
||
|
|
}
|
||
|
|
|
||
|
|
return AM_HAL_STATUS_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// End Doxygen group.
|
||
|
|
//! @}
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|