573 lines
19 KiB
C
573 lines
19 KiB
C
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//*****************************************************************************
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//
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// am_hal_security.c
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//! @file
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//!
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//! @brief Functions for on-chip security features
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//!
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//! @addtogroup
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//! @ingroup apollo3hal
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2020, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// Third party software included in this distribution is subject to the
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// additional license terms as defined in the /docs/licenses directory.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#include <stdint.h>
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#include <stdbool.h>
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#include "am_mcu_apollo.h"
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//*****************************************************************************
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// Local defines.
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//*****************************************************************************
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//
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// ENABLE_EXTMEM_CRC
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// By default, the CRC engine can only operate on data located in internal
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// memory (i.e. flash or SRAM). This define enables am_hal_crc() to support
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// external memories, but requires a small amount of global SRAM allocated for
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// that purpose. If it is not desired to support this feature, set to 0.
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//
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#define ENABLE_EXTMEM_CRC 1
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//
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// Maximum iterations for hardware CRC to finish
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//
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#define MAX_CRC_WAIT 100000
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#define AM_HAL_SECURITY_LOCKSTAT_CUSTOMER 0x1
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#define AM_HAL_SECURITY_LOCKSTAT_RECOVERY 0x40000000
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//*****************************************************************************
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//
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// Globals
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//
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//*****************************************************************************
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#if ENABLE_EXTMEM_CRC
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//
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// Set up a small global buffer that can be used am_hal_crc32() when
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// computing CRCs on external memory.
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//
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#define CRC_XFERBUF_SZ (512) // Reserve 512 bytes for the buffer
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static uint32_t g_CRC_buffer[CRC_XFERBUF_SZ / 4];
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#endif // ENABLE_EXTMEM_CRC
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//
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// Assign ptr variables to avoid an issue with GCC reading from location 0x0.
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//
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const volatile uint32_t *g_pFlash0 = (uint32_t*)(AM_HAL_SBL_ADDRESS + 0);
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const volatile uint32_t *g_pFlash4 = (uint32_t*)(AM_HAL_SBL_ADDRESS + 4);
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//*****************************************************************************
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//
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//! @brief Hardcoded function - to Run supplied main program
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//!
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//! @param r0 = vtor - address of the vector table
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//!
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//! @return Returns None
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//
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//*****************************************************************************
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#if (defined (__ARMCC_VERSION)) && (__ARMCC_VERSION < 6000000)
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static __asm void
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bl_run_main(uint32_t *vtor)
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{
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//
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// Store the vector table pointer of the new image into VTOR.
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//
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movw r3, #0xED08
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movt r3, #0xE000
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str r0, [r3, #0]
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//
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// Load the new stack pointer into R1 and the new reset vector into R2.
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//
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ldr r3, [r0, #0]
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ldr r2, [r0, #4]
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//
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// Set the stack pointer for the new image.
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//
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mov sp, r3
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//
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// Jump to the new reset vector.
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//
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bx r2
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}
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#elif (defined (__ARMCC_VERSION)) && (__ARMCC_VERSION >= 6000000)
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__attribute__((naked))
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static void
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bl_run_main(uint32_t *vtor)
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{
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__asm
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(
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" movw r3, #0xED08\n\t" // Store the vector table pointer of the new image into VTOR.
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" movt r3, #0xE000\n\t"
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" str r0, [r3, #0]\n\t"
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" ldr r3, [r0, #0]\n\t" // Load the new stack pointer into R1 and the new reset vector into R2.
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" ldr r2, [r0, #4]\n\t"
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" mov sp, r3\n\t" // Set the stack pointer for the new image.
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" bx r2\n\t" // Jump to the new reset vector.
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);
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}
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#elif defined(__GNUC_STDC_INLINE__)
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__attribute__((naked))
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static void
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bl_run_main(uint32_t *vtor)
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{
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__asm
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(
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" movw r3, #0xED08\n\t" // Store the vector table pointer of the new image into VTOR.
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" movt r3, #0xE000\n\t"
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" str r0, [r3, #0]\n\t"
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" ldr r3, [r0, #0]\n\t" // Load the new stack pointer into R1 and the new reset vector into R2.
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" ldr r2, [r0, #4]\n\t"
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" mov sp, r3\n\t" // Set the stack pointer for the new image.
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" bx r2\n\t" // Jump to the new reset vector.
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);
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}
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#elif defined(__IAR_SYSTEMS_ICC__)
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__stackless static inline void
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bl_run_main(uint32_t *vtor)
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{
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__asm volatile (
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" movw r3, #0xED08\n" // Store the vector table pointer of the new image into VTOR.
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" movt r3, #0xE000\n"
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" str r0, [r3, #0]\n"
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" ldr r3, [r0, #0]\n" // Load the new stack pointer into R1 and the new reset vector into R2.
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" ldr r2, [r0, #4]\n"
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" mov sp, r3\n" // Set the stack pointer for the new image.
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" bx r2\n" // Jump to the new reset vector.
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);
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}
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#else
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#error Compiler is unknown, please contact Ambiq support team
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#endif
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// Pre- SBLv2 known versions that do not support callback
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static uint32_t sblPreV2[][4] = {
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// flash0, flash4, sblVersion, sblVersionAddInfo
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{0xA3007860, 0x2E2638FB, 0 , 0},
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{0xA3007E14, 0x5EE4E461, 1 , 0},
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{0xA3008290, 0xB49CECD5, 2 , 0},
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};
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//*****************************************************************************
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//
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//! @brief Get Device Security Info
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//!
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//! @param pSecInfo - Pointer to structure for returned security info
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//!
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//! This will retrieve the security information for the device
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//!
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//! @return Returns AM_HAL_STATUS_SUCCESS on success
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//
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//*****************************************************************************
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uint32_t am_hal_security_get_info(am_hal_security_info_t *pSecInfo)
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{
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uint32_t flash0;
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uint32_t flash4;
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uint32_t i;
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bool bSbl;
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if (!pSecInfo)
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{
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return AM_HAL_STATUS_INVALID_ARG;
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}
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pSecInfo->info0Version = AM_REGVAL(0x50020040);
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pSecInfo->bInfo0Valid = MCUCTRL->SHADOWVALID_b.INFO0_VALID;
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bSbl = MCUCTRL->BOOTLOADER_b.SECBOOTFEATURE;
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if (bSbl)
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{
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// Check if we're running pre-SBLv2
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flash0 = *g_pFlash0;
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flash4 = *g_pFlash4;
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// Check if SBL is installed
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if ((flash0 >> 24) != AM_IMAGE_MAGIC_SBL)
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{
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return AM_HAL_STATUS_FAIL;
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}
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for ( i = 0; i < sizeof(sblPreV2) / sizeof(sblPreV2[0]); i++ )
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{
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if ((sblPreV2[i][0] == flash0) && (sblPreV2[i][1] == flash4))
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{
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// This is a device prior to SBLv2
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pSecInfo->sblVersion = sblPreV2[i][2];
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pSecInfo->sblVersionAddInfo = sblPreV2[i][3];
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break;
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}
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}
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if ( i == sizeof(sblPreV2) / sizeof(sblPreV2[0]) )
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{
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// SBLv2 or beyond
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// Use SBL jump table function
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uint32_t status;
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uint32_t sblVersion;
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uint32_t (*pFuncVersion)(uint32_t *) = (uint32_t (*)(uint32_t *))(AM_HAL_SBL_ADDRESS + 0x1D1);
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status = pFuncVersion(&sblVersion);
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if (status != AM_HAL_STATUS_SUCCESS)
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{
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return status;
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}
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pSecInfo->sblVersion = sblVersion & 0x7FFF;
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pSecInfo->sblVersionAddInfo = sblVersion >> 15;
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}
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}
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else
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{
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return AM_HAL_STATUS_FAIL;
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}
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return AM_HAL_STATUS_SUCCESS;
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} // am_hal_security_get_info()
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//*****************************************************************************
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//
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//! @brief Set the key for specified lock
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//!
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//! @param lockType - The lock type to be operated upon
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//! @param pKey - Pointer to 128b key value
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//!
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//! This will program the lock registers for the specified lock and key
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//!
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//! @return Returns AM_HAL_STATUS_SUCCESS on success
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//
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//*****************************************************************************
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uint32_t am_hal_security_set_key(am_hal_security_locktype_t lockType, am_hal_security_128bkey_t *pKey)
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{
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#ifndef AM_HAL_DISABLE_API_VALIDATION
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if (pKey == NULL)
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{
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return AM_HAL_STATUS_INVALID_ARG;
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}
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switch (lockType)
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{
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case AM_HAL_SECURITY_LOCKTYPE_CUSTOMER:
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case AM_HAL_SECURITY_LOCKTYPE_RECOVERY:
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break;
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default:
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return AM_HAL_STATUS_INVALID_ARG;
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}
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#endif // AM_HAL_DISABLE_API_VALIDATION
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SECURITY->LOCKCTRL = lockType;
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SECURITY->KEY0 = pKey->keys.key0;
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SECURITY->KEY1 = pKey->keys.key1;
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SECURITY->KEY2 = pKey->keys.key2;
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SECURITY->KEY3 = pKey->keys.key3;
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return AM_HAL_STATUS_SUCCESS;
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} // am_hal_security_set_key()
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//*****************************************************************************
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//
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//! @brief Get the current status of the specified lock
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//!
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//! @param lockType - The lock type to be operated upon
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//! @param pbUnlockStatus - Pointer to return variable with lock status
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//!
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//! This will get the lock status for specified lock - true implies unlocked
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//! Note that except for customer lock, other locks are self-locking on status read
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//!
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//! @return Returns AM_HAL_STATUS_SUCCESS on success
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//
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//*****************************************************************************
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uint32_t am_hal_security_get_lock_status(am_hal_security_locktype_t lockType, bool *pbUnlockStatus)
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{
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uint32_t unlockMask;
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#ifndef AM_HAL_DISABLE_API_VALIDATION
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if (pbUnlockStatus == NULL)
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{
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return AM_HAL_STATUS_INVALID_ARG;
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}
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#endif // AM_HAL_DISABLE_API_VALIDATION
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switch (lockType)
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{
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case AM_HAL_SECURITY_LOCKTYPE_CUSTOMER:
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unlockMask = AM_HAL_SECURITY_LOCKSTAT_CUSTOMER;
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break;
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case AM_HAL_SECURITY_LOCKTYPE_RECOVERY:
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unlockMask = AM_HAL_SECURITY_LOCKSTAT_RECOVERY;
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break;
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default:
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return AM_HAL_STATUS_INVALID_ARG;
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}
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*pbUnlockStatus = SECURITY->LOCKSTAT & unlockMask;
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return AM_HAL_STATUS_SUCCESS;
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} // am_hal_security_get_lock_status()
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//*****************************************************************************
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//
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//! @brief Compute CRC32 for a specified payload
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//!
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//! @param ui32StartAddr - The start address of the payload.
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//! @param ui32SizeBytes - The length of payload in bytes.
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//! @param pui32Crc - Pointer to variable to return the computed CRC.
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//!
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//! This function uses the hardware engine to compute CRC32 on an arbitrary data
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//! payload. The payload can reside in any contiguous memory including external
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//! memory.
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//!
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//! @return Returns AM_HAL_STATUS_SUCCESS on success
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//
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//*****************************************************************************
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uint32_t
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am_hal_crc32(uint32_t ui32StartAddr, uint32_t ui32SizeBytes, uint32_t *pui32Crc)
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{
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uint32_t status, ui32CRC32;
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bool bInternal;
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#ifndef AM_HAL_DISABLE_API_VALIDATION
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if (pui32Crc == NULL)
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{
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return AM_HAL_STATUS_INVALID_ARG;
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}
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//
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// Make sure size is multiple of 4 bytes
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//
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if (ui32SizeBytes & 0x3)
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||
|
|
{
|
||
|
|
return AM_HAL_STATUS_INVALID_ARG;
|
||
|
|
}
|
||
|
|
#endif // AM_HAL_DISABLE_API_VALIDATION
|
||
|
|
|
||
|
|
status = AM_HAL_STATUS_OUT_OF_RANGE; // Default status
|
||
|
|
|
||
|
|
//
|
||
|
|
// Determine whether the startaddr is in internal flash or SRAM.
|
||
|
|
//
|
||
|
|
bInternal = ISADDRFLASH(ui32StartAddr) || ISADDRSRAM(ui32StartAddr);
|
||
|
|
|
||
|
|
if ( bInternal )
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Program the CRC engine to compute the crc
|
||
|
|
//
|
||
|
|
ui32CRC32 = 0xFFFFFFFF;
|
||
|
|
SECURITY->RESULT = ui32CRC32;
|
||
|
|
SECURITY->SRCADDR = ui32StartAddr;
|
||
|
|
SECURITY->LEN = ui32SizeBytes;
|
||
|
|
SECURITY->CTRL_b.FUNCTION = SECURITY_CTRL_FUNCTION_CRC32;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Start the CRC
|
||
|
|
//
|
||
|
|
SECURITY->CTRL_b.ENABLE = 1;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Wait for CRC to finish
|
||
|
|
//
|
||
|
|
status = am_hal_flash_delay_status_change(MAX_CRC_WAIT,
|
||
|
|
(uint32_t)&SECURITY->CTRL, SECURITY_CTRL_ENABLE_Msk, 0);
|
||
|
|
|
||
|
|
if (status == AM_HAL_STATUS_SUCCESS)
|
||
|
|
{
|
||
|
|
*pui32Crc = SECURITY->RESULT;
|
||
|
|
}
|
||
|
|
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
#if ENABLE_EXTMEM_CRC
|
||
|
|
uint32_t ui32XferSize, ui32cnt;
|
||
|
|
uint32_t *pui32Buf, *pui32Data;
|
||
|
|
|
||
|
|
//
|
||
|
|
// If we're here, the source data resides in non-internal memory (that is,
|
||
|
|
// not flash or SRAM).
|
||
|
|
//
|
||
|
|
// Begin the loop for computing the CRC of the external memory. The data
|
||
|
|
// will first be copied to the SRAM buffer.
|
||
|
|
//
|
||
|
|
// Program the parts of the CRC engine that will not need to change
|
||
|
|
// inside the loop: SRCADDR, FUNCTION, initial seed in RESULT.
|
||
|
|
// While inside the loop, only the LEN will need to be provided.
|
||
|
|
//
|
||
|
|
SECURITY->SRCADDR = (uint32_t)&g_CRC_buffer[0];
|
||
|
|
SECURITY->CTRL_b.FUNCTION = SECURITY_CTRL_FUNCTION_CRC32;
|
||
|
|
|
||
|
|
//
|
||
|
|
// During the loop the RESULT register must not be rewritten, even if the
|
||
|
|
// value written on each pass is identical. Rewriting it appears to reset
|
||
|
|
// a state machine such that an incorrect CRC value is computed.
|
||
|
|
//
|
||
|
|
ui32CRC32 = 0xFFFFFFFF;
|
||
|
|
SECURITY->RESULT = ui32CRC32;
|
||
|
|
|
||
|
|
pui32Data = (uint32_t*)ui32StartAddr;
|
||
|
|
while ( ui32SizeBytes )
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// First copy a chunk of payload data to SRAM where the CRC engine
|
||
|
|
// can operate on it.
|
||
|
|
//
|
||
|
|
ui32XferSize = (ui32SizeBytes >= CRC_XFERBUF_SZ) ?
|
||
|
|
CRC_XFERBUF_SZ : ui32SizeBytes;
|
||
|
|
ui32SizeBytes -= ui32XferSize;
|
||
|
|
ui32cnt = ui32XferSize / 4;
|
||
|
|
pui32Buf = &g_CRC_buffer[0];
|
||
|
|
while ( ui32cnt-- )
|
||
|
|
{
|
||
|
|
*pui32Buf++ = *pui32Data++;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Program the CRC engine's LEN parameter.
|
||
|
|
// All other parameters were preprogrammed: SRCADDR, FUNCTION, RESULT.
|
||
|
|
//
|
||
|
|
SECURITY->LEN = ui32XferSize;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Start the CRC
|
||
|
|
//
|
||
|
|
SECURITY->CTRL_b.ENABLE = 1;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Wait for CRC to finish
|
||
|
|
//
|
||
|
|
status = am_hal_flash_delay_status_change(MAX_CRC_WAIT,
|
||
|
|
(uint32_t)&SECURITY->CTRL, SECURITY_CTRL_ENABLE_Msk, 0);
|
||
|
|
|
||
|
|
if ( (status == AM_HAL_STATUS_SUCCESS) && !SECURITY->CTRL_b.CRCERROR )
|
||
|
|
{
|
||
|
|
ui32CRC32 = SECURITY->RESULT;
|
||
|
|
}
|
||
|
|
else if ( SECURITY->CTRL_b.CRCERROR )
|
||
|
|
{
|
||
|
|
return AM_HAL_STATUS_HW_ERR;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Error from status_change function.
|
||
|
|
// Return the CRC value we do have, but return an error.
|
||
|
|
//
|
||
|
|
//return status;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Return result to caller
|
||
|
|
//
|
||
|
|
*pui32Crc = ui32CRC32;
|
||
|
|
#endif // ENABLE_EXTMEM_CRC
|
||
|
|
|
||
|
|
return status;
|
||
|
|
|
||
|
|
} // am_hal_crc32()
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Helper function to Perform exit operations for a secondary bootloader
|
||
|
|
//!
|
||
|
|
//! @param pImage - The address of the image to give control to
|
||
|
|
//!
|
||
|
|
//! This function does the necessary security operations while exiting from a
|
||
|
|
//! a secondary bootloader program. If still open, it locks the info0 key region,
|
||
|
|
//! as well as further updates to the flash protection register.
|
||
|
|
//! It also checks if it needs to halt to honor a debugger request.
|
||
|
|
//! If an image address is specified, control is transferred to the same on exit.
|
||
|
|
//!
|
||
|
|
//! @return Returns AM_HAL_STATUS_SUCCESS on success, if no image address specified
|
||
|
|
//! If an image address is provided, a successful execution results in transfer to
|
||
|
|
//! the image - and this function does not return.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
uint32_t am_hal_bootloader_exit(uint32_t *pImage)
|
||
|
|
{
|
||
|
|
uint32_t status = AM_HAL_STATUS_SUCCESS;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Lock the assets
|
||
|
|
//
|
||
|
|
if ( MCUCTRL->SHADOWVALID_b.INFO0_VALID &&
|
||
|
|
MCUCTRL->BOOTLOADER_b.PROTLOCK )
|
||
|
|
{
|
||
|
|
am_hal_security_128bkey_t keyVal;
|
||
|
|
uint32_t *pCustKey = (uint32_t *)0x50021A00;
|
||
|
|
bool bLockStatus;
|
||
|
|
|
||
|
|
//
|
||
|
|
// PROTLOCK Open
|
||
|
|
// This should also mean that Customer key is accessible
|
||
|
|
// Now lock the key by writing an incorrect value
|
||
|
|
//
|
||
|
|
keyVal.keyword[0] = ~pCustKey[0];
|
||
|
|
am_hal_security_set_key(AM_HAL_SECURITY_LOCKTYPE_CUSTOMER, &keyVal);
|
||
|
|
|
||
|
|
status = am_hal_security_get_lock_status(AM_HAL_SECURITY_LOCKTYPE_CUSTOMER, &bLockStatus);
|
||
|
|
|
||
|
|
if ((status != AM_HAL_STATUS_SUCCESS) || (bLockStatus))
|
||
|
|
{
|
||
|
|
return AM_HAL_STATUS_FAIL;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Lock the protection register to prevent further region locking
|
||
|
|
// CAUTION!!! - Can not do AM_BFW on BOOTLOADER register as all writable bits in this register are Write 1 to clear
|
||
|
|
//
|
||
|
|
MCUCTRL->BOOTLOADER = _VAL2FLD(MCUCTRL_BOOTLOADER_PROTLOCK, 1);
|
||
|
|
|
||
|
|
//
|
||
|
|
// Check if we need to halt (debugger request)
|
||
|
|
//
|
||
|
|
if (MCUCTRL->SCRATCH0 & 0x1)
|
||
|
|
{
|
||
|
|
// Debugger wants to halt
|
||
|
|
uint32_t dhcsr = AM_REGVAL(0xE000EDF0);
|
||
|
|
// Clear the flag in Scratch register
|
||
|
|
MCUCTRL->SCRATCH0 &= ~0x1;
|
||
|
|
// Halt the core
|
||
|
|
dhcsr = ((uint32_t)0xA05F << 16) | (dhcsr & 0xFFFF) | 0x3;
|
||
|
|
AM_REGVAL(0xE000EDF0) = dhcsr;
|
||
|
|
// Resume from halt
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
// Give control to supplied image
|
||
|
|
if (pImage)
|
||
|
|
{
|
||
|
|
bl_run_main(pImage);
|
||
|
|
// Does not return
|
||
|
|
}
|
||
|
|
|
||
|
|
return status;
|
||
|
|
} // am_hal_bootloader_exit()
|