261 lines
9.2 KiB
C
261 lines
9.2 KiB
C
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//*****************************************************************************
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//
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// am_hal_pwrctrl.h
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//! @file
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//!
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//! @brief Functions for enabling and disabling power domains.
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//!
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//! @addtogroup pwrctrl3 Power Control
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//! @ingroup apollo3hal
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//! @{
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2020, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// Third party software included in this distribution is subject to the
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// additional license terms as defined in the /docs/licenses directory.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#ifndef AM_HAL_PWRCTRL_H
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#define AM_HAL_PWRCTRL_H
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//
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// Designate this peripheral.
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//
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#define AM_APOLLO3_PWRCTRL 1
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typedef enum
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{
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AM_HAL_PWRCTRL_PERIPH_NONE,
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AM_HAL_PWRCTRL_PERIPH_IOS,
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AM_HAL_PWRCTRL_PERIPH_IOM0,
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AM_HAL_PWRCTRL_PERIPH_IOM1,
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AM_HAL_PWRCTRL_PERIPH_IOM2,
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AM_HAL_PWRCTRL_PERIPH_IOM3,
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AM_HAL_PWRCTRL_PERIPH_IOM4,
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AM_HAL_PWRCTRL_PERIPH_IOM5,
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AM_HAL_PWRCTRL_PERIPH_UART0,
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AM_HAL_PWRCTRL_PERIPH_UART1,
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AM_HAL_PWRCTRL_PERIPH_ADC,
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AM_HAL_PWRCTRL_PERIPH_SCARD,
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AM_HAL_PWRCTRL_PERIPH_MSPI,
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AM_HAL_PWRCTRL_PERIPH_PDM,
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AM_HAL_PWRCTRL_PERIPH_BLEL,
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AM_HAL_PWRCTRL_PERIPH_MAX
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} am_hal_pwrctrl_periph_e;
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typedef enum
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{
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AM_HAL_PWRCTRL_MEM_NONE,
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AM_HAL_PWRCTRL_MEM_SRAM_8K_DTCM,
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AM_HAL_PWRCTRL_MEM_SRAM_32K_DTCM,
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AM_HAL_PWRCTRL_MEM_SRAM_64K_DTCM,
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AM_HAL_PWRCTRL_MEM_SRAM_96K,
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AM_HAL_PWRCTRL_MEM_SRAM_128K,
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AM_HAL_PWRCTRL_MEM_SRAM_160K,
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AM_HAL_PWRCTRL_MEM_SRAM_192K,
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AM_HAL_PWRCTRL_MEM_SRAM_224K,
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AM_HAL_PWRCTRL_MEM_SRAM_256K,
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AM_HAL_PWRCTRL_MEM_SRAM_288K,
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AM_HAL_PWRCTRL_MEM_SRAM_320K,
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AM_HAL_PWRCTRL_MEM_SRAM_352K,
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AM_HAL_PWRCTRL_MEM_SRAM_384K,
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AM_HAL_PWRCTRL_MEM_FLASH_512K,
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AM_HAL_PWRCTRL_MEM_FLASH_1M,
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AM_HAL_PWRCTRL_MEM_CACHE,
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AM_HAL_PWRCTRL_MEM_ALL,
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AM_HAL_PWRCTRL_MEM_MAX
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} am_hal_pwrctrl_mem_e;
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#define AM_HAL_PWRCTRL_MEM_FLASH_MIN AM_HAL_PWRCTRL_MEM_FLASH_512K
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#define AM_HAL_PWRCTRL_MEM_FLASH_MAX AM_HAL_PWRCTRL_MEM_FLASH_1M
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#define AM_HAL_PWRCTRL_MEM_SRAM_MIN AM_HAL_PWRCTRL_MEM_SRAM_8K_DTCM
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#define AM_HAL_PWRCTRL_MEM_SRAM_MAX AM_HAL_PWRCTRL_MEM_SRAM_384K
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//*****************************************************************************
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//
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// Macros to check whether Apollo3 bucks are enabled.
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//
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//*****************************************************************************
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#define am_hal_pwrctrl_simobuck_enabled_check() \
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(AM_BFR(PWRCTRL, SUPPLYSTATUS, SIMOBUCKON))
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#define am_hal_pwrctrl_blebuck_enabled_check() \
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(AM_BFR(PWRCTRL, SUPPLYSTATUS, BLEBUCKON))
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//*****************************************************************************
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//
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// Function prototypes
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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//! @brief Enable power to a peripheral.
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//!
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//! @param ePeripheral - The peripheral to enable.
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//!
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//! This function enables power to the peripheral and waits for a
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//! confirmation from the hardware.
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//!
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//! @return status - generic or interface specific status.
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//
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//*****************************************************************************
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extern uint32_t am_hal_pwrctrl_periph_enable(am_hal_pwrctrl_periph_e ePeripheral);
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//*****************************************************************************
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//
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//! @brief Disable power to a peripheral.
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//!
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//! @param ePeripheral - The peripheral to disable.
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//!
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//! This function disables power to the peripheral and waits for a
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//! confirmation from the hardware.
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//!
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//! @return status - generic or interface specific status.
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//
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//*****************************************************************************
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extern uint32_t am_hal_pwrctrl_periph_disable(am_hal_pwrctrl_periph_e ePeripheral);
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//*****************************************************************************
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//
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//! @brief Determine whether a peripheral is currently enabled.
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//!
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//! @param ePeripheral - The peripheral to enable.
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//! @param pui32Enabled - Pointer to a ui32 that will return as 1 or 0.
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//!
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//! This function determines to the caller whether a given peripheral is
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//! currently enabled or disabled.
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//!
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//! @return status - generic or interface specific status.
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//
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//*****************************************************************************
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extern uint32_t am_hal_pwrctrl_periph_enabled(
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am_hal_pwrctrl_periph_e ePeripheral, uint32_t *pui32Enabled);
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//*****************************************************************************
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//
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//! @brief Enable a configuration of memory.
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//!
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//! @param eMemConfig - The memory configuration.
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//!
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//! This function establishes the desired configuration of flash, SRAM, ICache,
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//! and DCache (DTCM) according to the desired Memory Configuration mask.
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//!
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//! Only the type of memory specified is affected. Therefore separate calls
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//! are required to affect power settings for FLASH, SRAM, or CACHE.
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//!
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//! @return status - generic or interface specific status.
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//
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//*****************************************************************************
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extern uint32_t am_hal_pwrctrl_memory_enable(am_hal_pwrctrl_mem_e eMemConfig);
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//*****************************************************************************
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//
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//! @brief Power down respective memory.
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//!
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//! @param eMemPwd - The memory power down enum.
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//!
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//! This function establishes the desired power down of flash, SRAM, ICache,
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//! and DCache (DTCM) according to the desired enum.
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//!
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//! Only the type of memory specified is affected. Therefore separate calls
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//! are required to affect power settings for FLASH, SRAM, or CACHE.
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//!
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//! @return status - generic or interface specific status.
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//
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//*****************************************************************************
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extern uint32_t am_hal_pwrctrl_memory_deepsleep_powerdown(am_hal_pwrctrl_mem_e eMemConfig);
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//*****************************************************************************
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//
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//! @brief Apply retention voltage to respective memory.
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//!
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//! @param eMemPwd - The memory power down enum.
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//!
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//! This function establishes the desired power retain of flash, SRAM, ICache,
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//! and DCache (DTCM) according to the desired enum.
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//!
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//! Only the type of memory specified is affected. Therefore separate calls
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//! are required to affect power settings for FLASH, SRAM, or CACHE.
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//!
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//! @return status - generic or interface specific status.
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//
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//*****************************************************************************
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extern uint32_t am_hal_pwrctrl_memory_deepsleep_retain(am_hal_pwrctrl_mem_e eMemConfig);
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//*****************************************************************************
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//
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//! @brief Initialize system for low power configuration.
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//!
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//! @param none.
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//!
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//! This function handles low power initialization.
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//!
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//! @return status - generic or interface specific status.
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//
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//*****************************************************************************
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extern uint32_t am_hal_pwrctrl_low_power_init(void);
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//*****************************************************************************
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//
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//! @brief Initialize BLE Buck Trims for Lowest Power.
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//!
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//! @param none.
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//!
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//! @return none.
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//
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//*****************************************************************************
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extern void am_hal_pwrctrl_blebuck_trim(void);
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#ifdef __cplusplus
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}
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#endif
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#endif // AM_HAL_PWRCTRL_H
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//*****************************************************************************
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//
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// End Doxygen group.
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//! @}
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//
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//*****************************************************************************
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