350 lines
13 KiB
C
350 lines
13 KiB
C
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//*****************************************************************************
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//
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// am_hal_uart.h
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//! @file
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//!
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//! @brief Functions for accessing and configuring the UART.
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//!
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//! @addtogroup uart1 UART
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//! @ingroup apollo1hal
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2020, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// Third party software included in this distribution is subject to the
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// additional license terms as defined in the /docs/licenses directory.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#ifndef AM_HAL_UART_H
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#define AM_HAL_UART_H
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//*****************************************************************************
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//
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//! @name UART Interrupts
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//! @brief Macro definitions for UART FIFO levels.
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//!
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//! They may be used with the \e am_hal_uart_fifo_config() function.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_UART_INT_OVER_RUN AM_REG_UART_IER_OEIM_M
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#define AM_HAL_UART_INT_BREAK_ERR AM_REG_UART_IER_BEIM_M
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#define AM_HAL_UART_INT_PARITY_ERR AM_REG_UART_IER_PEIM_M
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#define AM_HAL_UART_INT_FRAME_ERR AM_REG_UART_IER_FEIM_M
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#define AM_HAL_UART_INT_RX_TMOUT AM_REG_UART_IER_RTIM_M
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#define AM_HAL_UART_INT_TX AM_REG_UART_IER_TXIM_M
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#define AM_HAL_UART_INT_RX AM_REG_UART_IER_RXIM_M
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#define AM_HAL_UART_INT_DSRM AM_REG_UART_IER_DSRMIM_M
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#define AM_HAL_UART_INT_DCDM AM_REG_UART_IER_DCDMIM_M
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#define AM_HAL_UART_INT_CTSM AM_REG_UART_IER_CTSMIM_M
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#define AM_HAL_UART_INT_RIM AM_REG_UART_IER_RIMIM_M
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//! @}
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//*****************************************************************************
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//
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//! @name UART FIFO Levels
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//! @brief Macro definitions for RTV interrupt status bits.
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//!
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//! These macros correspond to the bits in the UART interrupt status register.
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//! They may be used with any of the \e am_hal_uart_int_x() functions.
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//!
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//! @{
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//
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//*****************************************************************************
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//TX
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#define AM_HAL_UART_TX_FIFO_1_8 AM_REG_UART_IFLS_TXIFLSEL(0)
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#define AM_HAL_UART_TX_FIFO_1_4 AM_REG_UART_IFLS_TXIFLSEL(1)
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#define AM_HAL_UART_TX_FIFO_1_2 AM_REG_UART_IFLS_TXIFLSEL(2)
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#define AM_HAL_UART_TX_FIFO_3_4 AM_REG_UART_IFLS_TXIFLSEL(3)
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#define AM_HAL_UART_TX_FIFO_7_8 AM_REG_UART_IFLS_TXIFLSEL(4)
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// RX
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#define AM_HAL_UART_RX_FIFO_1_8 AM_REG_UART_IFLS_RXIFLSEL(0)
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#define AM_HAL_UART_RX_FIFO_1_4 AM_REG_UART_IFLS_RXIFLSEL(1)
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#define AM_HAL_UART_RX_FIFO_1_2 AM_REG_UART_IFLS_RXIFLSEL(2)
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#define AM_HAL_UART_RX_FIFO_3_4 AM_REG_UART_IFLS_RXIFLSEL(3)
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#define AM_HAL_UART_RX_FIFO_7_8 AM_REG_UART_IFLS_RXIFLSEL(4)
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//! @}
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//*****************************************************************************
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//
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//! @name UART Status Register
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//! @brief Macro definitions for UART Status Register Bits.
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//!
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//! They may be used with the \e am_hal_uart_status_get() function.
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//!
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//! @{
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//
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//*****************************************************************************
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// This is the overrun error indicator.
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#define AM_HAL_UART_RSR_OVERRUN_NOERR AM_REG_UART_RSR_OESTAT_NOERR
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#define AM_HAL_UART_RSR_OVERRUN_ERROR AM_REG_UART_RSR_OESTAT_ERR
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// This is the break error indicator.
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#define AM_HAL_UART_RSR_BREAK_NOERR AM_REG_UART_RSR_BESTAT_NOERR
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#define AM_HAL_UART_RSR_BREAK_ERROR AM_REG_UART_RSR_BESTAT_ERR
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// This is the parity error indicator.
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#define AM_HAL_UART_RSR_PARITY_NOERR AM_REG_UART_RSR_PESTAT_NOERR
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#define AM_HAL_UART_RSR_PARITY_ERROR AM_REG_UART_RSR_PESTAT_ERR
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// This is the framing error indicator.
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#define AM_HAL_UART_RSR_FRAME_ERROR_NOERR AM_REG_UART_RSR_FESTAT_NOERR
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#define AM_HAL_UART_RSR_FRAME_ERROR_ERROR AM_REG_UART_RSR_FESTAT_ERR
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//! @}
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//*****************************************************************************
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//
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//! @name UART Flag Register
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//! @brief Macro definitions for UART Flag Register Bits.
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//!
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//! They may be used with the \e am_hal_uart_flags_get() function.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_UART_FR_RING AM_REG_UART_FR_RI_M
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#define AM_HAL_UART_FR_TX_EMPTY AM_REG_UART_FR_TXFE_XMTFIFO_EMPTY
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#define AM_HAL_UART_FR_RX_FULL AM_REG_UART_FR_RXFF_RCVFIFO_FULL
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#define AM_HAL_UART_FR_TX_FULL AM_REG_UART_FR_TXFF_XMTFIFO_FULL
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#define AM_HAL_UART_FR_RX_EMPTY AM_REG_UART_FR_RXFE_RCVFIFO_EMPTY
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#define AM_HAL_UART_FR_BUSY AM_REG_UART_FR_BUSY_BUSY
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#define AM_HAL_UART_FR_DCD_DETECTED AM_REG_UART_FR_DCD_DETECTED
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#define AM_HAL_UART_FR_DSR_READY AM_REG_UART_FR_DSR_READY
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#define AM_HAL_UART_FR_CTS AM_REG_UART_FR_CTS_M
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//! @}
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//*****************************************************************************
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//
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//! @name UART Config Macros
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//! @brief Macro definitions for available Data bits.
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//!
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//! They may be used with the \e am_hal_uart_config_t structure used by \e
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//! am_hal_uart_config().
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//!
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Data bits defines.
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//
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//*****************************************************************************
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#define AM_HAL_UART_DATA_BITS_8 AM_REG_UART_LCRH_WLEN(3)
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#define AM_HAL_UART_DATA_BITS_7 AM_REG_UART_LCRH_WLEN(2)
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#define AM_HAL_UART_DATA_BITS_6 AM_REG_UART_LCRH_WLEN(1)
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#define AM_HAL_UART_DATA_BITS_5 0
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//*****************************************************************************
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//
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// Parity defines.
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//
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//*****************************************************************************
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#define AM_HAL_UART_PARITY_NONE 0
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#define AM_HAL_UART_PARITY_ODD AM_REG_UART_LCRH_PEN_M
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#define AM_HAL_UART_PARITY_EVEN AM_REG_UART_LCRH_PEN_M | \
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AM_REG_UART_LCRH_EPS_M
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//*****************************************************************************
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//
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// Flow control defines.
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//
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//*****************************************************************************
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#define AM_HAL_UART_FLOW_CTRL_NONE 0
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#define AM_HAL_UART_FLOW_CTRL_RTS_CTS AM_REG_UART_CR_CTSEN_M | \
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AM_REG_UART_CR_RTSEN_M
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//! @}
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//*****************************************************************************
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//
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//! UART configuration structure
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//
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//*****************************************************************************
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typedef struct
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{
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//
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//! Desired Baudrate for the UART.
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//
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uint32_t ui32BaudRate;
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//
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//! Number of data bits.
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//!
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//! Valid values for ui32DataBits are:
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//!
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//! AM_HAL_UART_DATA_BITS_8
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//! AM_HAL_UART_DATA_BITS_7
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//! AM_HAL_UART_DATA_BITS_6
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//! AM_HAL_UART_DATA_BITS_5
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//
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uint32_t ui32DataBits;
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//
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//! Use two stop bits.
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//
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bool bTwoStopBits;
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//
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//! Parity.
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//!
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//! Valid values for ui32Parity are:
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//!
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//! AM_HAL_UART_PARITY_NONE
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//! AM_HAL_UART_PARITY_ODD
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//! AM_HAL_UART_PARITY_EVEN
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//
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uint32_t ui32Parity;
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//
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//! Flow control.
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//!
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//! Valid values for ui32FlowCtrl are:
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//!
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//! AM_HAL_UART_FLOW_CTRL_NONE
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//! AM_HAL_UART_FLOW_CTRL_RTS_CTS
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//
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uint32_t ui32FlowCtrl;
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}
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am_hal_uart_config_t;
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//*****************************************************************************
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//
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// Function-like macros.
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//
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//*****************************************************************************
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#define am_hal_uart_ring_buffer_empty(psBuffer) \
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((psBuffer)->ui32Length == 0)
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#define am_hal_uart_ring_buffer_full(psBuffer) \
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((psBuffer)->ui32Length == (psBuffer)->ui32Capacity)
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#define am_hal_uart_ring_buffer_data_left(psBuffer) \
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((psBuffer)->ui32Length)
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#define am_hal_uart_pwrctrl_enable(ui32Module)
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#define am_hal_uart_pwrctrl_disable(ui32Module)
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#define am_hal_uart_power_on_restore(ui32Module)
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#define am_hal_uart_power_off_save(ui32Module)
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//*****************************************************************************
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//
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// UART ring buffer type.
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//
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//*****************************************************************************
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typedef struct
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{
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volatile uint8_t *pui8Data;
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volatile uint32_t ui32WriteIndex;
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volatile uint32_t ui32ReadIndex;
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volatile uint32_t ui32Length;
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volatile uint32_t ui32Capacity;
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}
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am_hal_uart_ring_buffer_t;
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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// External function definitions
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//
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//*****************************************************************************
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extern void am_hal_uart_config(uint32_t ui32Module,
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am_hal_uart_config_t *psConfig);
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extern uint32_t am_hal_uart_status_get(uint32_t ui32Module);
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extern uint32_t am_hal_uart_int_status_get(uint32_t ui32Module,
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bool bEnabledOnly);
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extern void am_hal_uart_int_clear(uint32_t ui32Module,
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uint32_t ui32Interrupt);
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extern void am_hal_uart_int_disable(uint32_t ui32Module,
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uint32_t ui32Interrupt);
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extern void am_hal_uart_int_enable(uint32_t ui32Module,
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uint32_t ui32Interrupt);
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extern uint32_t am_hal_uart_int_enable_get(uint32_t ui32Module);
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extern void am_hal_uart_enable(uint32_t ui32Module);
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extern void am_hal_uart_disable(uint32_t ui32Module);
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extern void am_hal_uart_clock_enable(uint32_t ui32Module);
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extern void am_hal_uart_clock_disable(uint32_t ui32Module);
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extern void am_hal_uart_fifo_config(uint32_t ui32Module, uint32_t ui32LvlCfg);
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extern uint32_t am_hal_uart_flags_get(uint32_t ui32Module);
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// rx/tx polled
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extern void am_hal_uart_char_transmit_polled(uint32_t ui32Module,
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char cChar);
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extern void am_hal_uart_string_transmit_polled(uint32_t ui32Module,
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char *pcString);
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extern void am_hal_uart_char_receive_polled(uint32_t ui32Module,
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char *pcChar);
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extern void am_hal_uart_line_receive_polled(uint32_t ui32Module,
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uint32_t ui32MaxChars,
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char *pcChar);
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// rx/tx buffered
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extern void am_hal_uart_init_buffered(uint32_t ui32Module,
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uint8_t *pui8RxArray,
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uint32_t ui32RxSize,
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uint8_t *pui8TxArray,
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uint32_t ui32TxSize);
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extern void am_hal_uart_get_status_buffered(uint32_t ui32Module,
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uint32_t *pui32RxSize,
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uint32_t *pui32TxSize);
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extern void am_hal_uart_service_buffered(uint32_t ui32Module,
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uint32_t ui32Status);
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extern void am_hal_uart_char_transmit_buffered(uint32_t ui32Module,
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char cChar);
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extern void am_hal_uart_string_transmit_buffered(uint32_t ui32Module,
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char *pcString);
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extern uint32_t am_hal_uart_char_receive_buffered(uint32_t ui32Module,
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char *pcString,
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uint32_t ui32MaxChars);
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#ifdef __cplusplus
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}
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#endif
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#endif // AM_HAL_UART_H
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//*****************************************************************************
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//
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// End Doxygen group.
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//! @}
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//
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//*****************************************************************************
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