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<div id="projectname">Apollo Register Documentation &#160;<span id="projectnumber">v2.4.2</span></div>
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<div class="title">WDT - Watchdog Timer</div>
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<body>
<br>
<div class="panel panel-default">
<div class="panel-heading">
<h3 class="panel-title"> WDT Register Index</h3>
</div>
<div class="panel-body">
<table>
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x00000000:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<a class="el" href="#CFG" target="_self">CFG - Configuration Register</a>
</td>
</tr>
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x00000004:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<a class="el" href="#RSTRT" target="_self">RSTRT - Restart the watchdog timer.</a>
</td>
</tr>
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x00000008:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<a class="el" href="#LOCK" target="_self">LOCK - Locks the WDT</a>
</td>
</tr>
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x0000000C:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<a class="el" href="#COUNT" target="_self">COUNT - Current Counter Value for WDT</a>
</td>
</tr>
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x00000200:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<a class="el" href="#INTEN" target="_self">INTEN - WDT Interrupt register: Enable</a>
</td>
</tr>
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x00000204:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<a class="el" href="#INTSTAT" target="_self">INTSTAT - WDT Interrupt register: Status</a>
</td>
</tr>
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x00000208:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<a class="el" href="#INTCLR" target="_self">INTCLR - WDT Interrupt register: Clear</a>
</td>
</tr>
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x0000020C:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<a class="el" href="#INTSET" target="_self">INTSET - WDT Interrupt register: Set</a>
</td>
</tr>
</table>
</div>
</div>
<div class="panel panel-default">
<div class="panel-heading">
<h3 id="CFG" class="panel-title">CFG - Configuration Register</h3>
</div>
<div class="panel-body">
<h3>Address:</h3>
<table style="margin:10px">
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">Instance 0 Address:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x40024000</span>
</td>
</tr>
</table>
<h3>Description:</h3>
<p>This is the configuration register for the watch dog timer. It controls the enable, interrupt set, clocks for the timer, the compare values for the counters to trigger a reset or interrupt. This register can only be written to if the watch dog timer is unlocked (WDTLOCK is not set).</p>
<h3>Example Macro Usage:</h3>
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:
// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
<h3>Register Fields:</h3>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>31</th>
<th>30</th>
<th>29</th>
<th>28</th>
<th>27</th>
<th>26</th>
<th>25</th>
<th>24</th>
<th>23</th>
<th>22</th>
<th>21</th>
<th>20</th>
<th>19</th>
<th>18</th>
<th>17</th>
<th>16</th>
<th>15</th>
<th>14</th>
<th>13</th>
<th>12</th>
<th>11</th>
<th>10</th>
<th>9</th>
<th>8</th>
<th>7</th>
<th>6</th>
<th>5</th>
<th>4</th>
<th>3</th>
<th>2</th>
<th>1</th>
<th>0</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center" colspan="5">RSVD
<br>0x0</td>
<td align="center" colspan="3">CLKSEL
<br>0x0</td>
<td align="center" colspan="8">INTVAL
<br>0xff</td>
<td align="center" colspan="8">RESVAL
<br>0xff</td>
<td align="center" colspan="5">RSVD
<br>0x0</td>
<td align="center" colspan="1">RESEN
<br>0x0</td>
<td align="center" colspan="1">INTEN
<br>0x0</td>
<td align="center" colspan="1">WDTEN
<br>0x0</td>
</tr>
</tbody>
</table>
<br>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>Bits</th>
<th>Name</th>
<th>RW</th>
<th>Description</th>
</tr>
</thead>
<tbody>
<tr>
<td>31:27</td>
<td>RSVD</td>
<td>RO</td>
<td>This bitfield is reserved for future use.<br><br>
</td>
</tr>
<tr>
<td>26:24</td>
<td>CLKSEL</td>
<td>RW</td>
<td>Select the frequency for the WDT. All values not enumerated below are undefined.<br><br>
OFF = 0x0 - Low Power Mode. This setting disables the watch dog timer.<br>
128HZ = 0x1 - 128 Hz LFRC clock.<br>
16HZ = 0x2 - 16 Hz LFRC clock.<br>
1HZ = 0x3 - 1 Hz LFRC clock.<br>
1_16HZ = 0x4 - 1/16th Hz LFRC clock.</td>
</tr>
<tr>
<td>23:16</td>
<td>INTVAL</td>
<td>RW</td>
<td>This bitfield is the compare value for counter bits 7:0 to generate a watchdog interrupt.<br><br>
</td>
</tr>
<tr>
<td>15:8</td>
<td>RESVAL</td>
<td>RW</td>
<td>This bitfield is the compare value for counter bits 7:0 to generate a watchdog reset. This will cause a software reset.<br><br>
</td>
</tr>
<tr>
<td>7:3</td>
<td>RSVD</td>
<td>RO</td>
<td>This bitfield is reserved for future use.<br><br>
</td>
</tr>
<tr>
<td>2</td>
<td>RESEN</td>
<td>RW</td>
<td>This bitfield enables the WDT reset. This needs to be set together with the WDREN bit in REG_RSTGEN_CFG register (in reset gen) to trigger the reset.<br><br>
</td>
</tr>
<tr>
<td>1</td>
<td>INTEN</td>
<td>RW</td>
<td>This bitfield enables the WDT interrupt. Note : This bit must be set before the interrupt status bit will reflect a watchdog timer expiration. The IER interrupt register must also be enabled for a WDT interrupt to be sent to the NVIC.<br><br>
</td>
</tr>
<tr>
<td>0</td>
<td>WDTEN</td>
<td>RW</td>
<td>This bitfield enables the WDT.<br><br>
</td>
</tr>
</tbody>
</table>
<br>
</div>
</div>
<div class="panel panel-default">
<div class="panel-heading">
<h3 id="RSTRT" class="panel-title">RSTRT - Restart the watchdog timer.</h3>
</div>
<div class="panel-body">
<h3>Address:</h3>
<table style="margin:10px">
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">Instance 0 Address:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x40024004</span>
</td>
</tr>
</table>
<h3>Description:</h3>
<p>This register will Restart the watchdog timer. Writing a special key value into this register will result in the watch dog timer being reset, so that the count will start again. It is expected that the software will periodically write to this register to indicate that the system is functional. The watch dog timer can continue running when the system is in deep sleep, and the interrupt will trigger the wake. After the wake, the core can reset the watch dog timer.</p>
<h3>Example Macro Usage:</h3>
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:
// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
<h3>Register Fields:</h3>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>31</th>
<th>30</th>
<th>29</th>
<th>28</th>
<th>27</th>
<th>26</th>
<th>25</th>
<th>24</th>
<th>23</th>
<th>22</th>
<th>21</th>
<th>20</th>
<th>19</th>
<th>18</th>
<th>17</th>
<th>16</th>
<th>15</th>
<th>14</th>
<th>13</th>
<th>12</th>
<th>11</th>
<th>10</th>
<th>9</th>
<th>8</th>
<th>7</th>
<th>6</th>
<th>5</th>
<th>4</th>
<th>3</th>
<th>2</th>
<th>1</th>
<th>0</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center" colspan="24">RSVD
<br>0x0</td>
<td align="center" colspan="8">RSTRT
<br>0x0</td>
</tr>
</tbody>
</table>
<br>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>Bits</th>
<th>Name</th>
<th>RW</th>
<th>Description</th>
</tr>
</thead>
<tbody>
<tr>
<td>31:8</td>
<td>RSVD</td>
<td>RO</td>
<td>This bitfield is reserved for future use.<br><br>
</td>
</tr>
<tr>
<td>7:0</td>
<td>RSTRT</td>
<td>WO</td>
<td>Writing 0xB2 to WDTRSTRT restarts the watchdog timer. This is a write only register. Reading this register will only provide all 0.<br><br>
KEYVALUE = 0xB2 - This is the key value to write to WDTRSTRT to restart the WDT. This is a write only register.</td>
</tr>
</tbody>
</table>
<br>
</div>
</div>
<div class="panel panel-default">
<div class="panel-heading">
<h3 id="LOCK" class="panel-title">LOCK - Locks the WDT</h3>
</div>
<div class="panel-body">
<h3>Address:</h3>
<table style="margin:10px">
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">Instance 0 Address:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x40024008</span>
</td>
</tr>
</table>
<h3>Description:</h3>
<p>This register locks the watch dog timer. Once it is locked, the configuration register (WDTCFG) for watch dog timer cannot be written to.</p>
<h3>Example Macro Usage:</h3>
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:
// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
<h3>Register Fields:</h3>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>31</th>
<th>30</th>
<th>29</th>
<th>28</th>
<th>27</th>
<th>26</th>
<th>25</th>
<th>24</th>
<th>23</th>
<th>22</th>
<th>21</th>
<th>20</th>
<th>19</th>
<th>18</th>
<th>17</th>
<th>16</th>
<th>15</th>
<th>14</th>
<th>13</th>
<th>12</th>
<th>11</th>
<th>10</th>
<th>9</th>
<th>8</th>
<th>7</th>
<th>6</th>
<th>5</th>
<th>4</th>
<th>3</th>
<th>2</th>
<th>1</th>
<th>0</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center" colspan="24">RSVD
<br>0x0</td>
<td align="center" colspan="8">LOCK
<br>0x0</td>
</tr>
</tbody>
</table>
<br>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>Bits</th>
<th>Name</th>
<th>RW</th>
<th>Description</th>
</tr>
</thead>
<tbody>
<tr>
<td>31:8</td>
<td>RSVD</td>
<td>RO</td>
<td>This bitfield is reserved for future use.<br><br>
</td>
</tr>
<tr>
<td>7:0</td>
<td>LOCK</td>
<td>WO</td>
<td>Writing 0x3A locks the watchdog timer. Once locked, the WDTCFG reg cannot be written and WDTEN is set.<br><br>
KEYVALUE = 0x3A - This is the key value to write to WDTLOCK to lock the WDT.</td>
</tr>
</tbody>
</table>
<br>
</div>
</div>
<div class="panel panel-default">
<div class="panel-heading">
<h3 id="COUNT" class="panel-title">COUNT - Current Counter Value for WDT</h3>
</div>
<div class="panel-body">
<h3>Address:</h3>
<table style="margin:10px">
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">Instance 0 Address:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x4002400C</span>
</td>
</tr>
</table>
<h3>Description:</h3>
<p>This register holds the current count for the watch dog timer. This is a read only register. SW cannot set the value in the counter, but can reset it.</p>
<h3>Example Macro Usage:</h3>
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:
// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
<h3>Register Fields:</h3>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>31</th>
<th>30</th>
<th>29</th>
<th>28</th>
<th>27</th>
<th>26</th>
<th>25</th>
<th>24</th>
<th>23</th>
<th>22</th>
<th>21</th>
<th>20</th>
<th>19</th>
<th>18</th>
<th>17</th>
<th>16</th>
<th>15</th>
<th>14</th>
<th>13</th>
<th>12</th>
<th>11</th>
<th>10</th>
<th>9</th>
<th>8</th>
<th>7</th>
<th>6</th>
<th>5</th>
<th>4</th>
<th>3</th>
<th>2</th>
<th>1</th>
<th>0</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center" colspan="24">RSVD
<br>0x0</td>
<td align="center" colspan="8">COUNT
<br>0x0</td>
</tr>
</tbody>
</table>
<br>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>Bits</th>
<th>Name</th>
<th>RW</th>
<th>Description</th>
</tr>
</thead>
<tbody>
<tr>
<td>31:8</td>
<td>RSVD</td>
<td>RO</td>
<td>This bitfield is reserved for future use.<br><br>
</td>
</tr>
<tr>
<td>7:0</td>
<td>COUNT</td>
<td>RO</td>
<td>Read-Only current value of the WDT counter<br><br>
</td>
</tr>
</tbody>
</table>
<br>
</div>
</div>
<div class="panel panel-default">
<div class="panel-heading">
<h3 id="INTEN" class="panel-title">INTEN - WDT Interrupt register: Enable</h3>
</div>
<div class="panel-body">
<h3>Address:</h3>
<table style="margin:10px">
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">Instance 0 Address:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x40024200</span>
</td>
</tr>
</table>
<h3>Description:</h3>
<p>Set bits in this register to allow this module to generate the corresponding interrupt.</p>
<h3>Example Macro Usage:</h3>
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:
// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
<h3>Register Fields:</h3>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>31</th>
<th>30</th>
<th>29</th>
<th>28</th>
<th>27</th>
<th>26</th>
<th>25</th>
<th>24</th>
<th>23</th>
<th>22</th>
<th>21</th>
<th>20</th>
<th>19</th>
<th>18</th>
<th>17</th>
<th>16</th>
<th>15</th>
<th>14</th>
<th>13</th>
<th>12</th>
<th>11</th>
<th>10</th>
<th>9</th>
<th>8</th>
<th>7</th>
<th>6</th>
<th>5</th>
<th>4</th>
<th>3</th>
<th>2</th>
<th>1</th>
<th>0</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center" colspan="31">RSVD
<br>0x0</td>
<td align="center" colspan="1">WDTINT
<br>0x0</td>
</tr>
</tbody>
</table>
<br>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>Bits</th>
<th>Name</th>
<th>RW</th>
<th>Description</th>
</tr>
</thead>
<tbody>
<tr>
<td>31:1</td>
<td>RSVD</td>
<td>RO</td>
<td>This bitfield is reserved for future use.<br><br>
</td>
</tr>
<tr>
<td>0</td>
<td>WDTINT</td>
<td>RW</td>
<td>Watchdog Timer Interrupt.<br><br>
</td>
</tr>
</tbody>
</table>
<br>
</div>
</div>
<div class="panel panel-default">
<div class="panel-heading">
<h3 id="INTSTAT" class="panel-title">INTSTAT - WDT Interrupt register: Status</h3>
</div>
<div class="panel-body">
<h3>Address:</h3>
<table style="margin:10px">
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">Instance 0 Address:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x40024204</span>
</td>
</tr>
</table>
<h3>Description:</h3>
<p>Read bits from this register to discover the cause of a recent interrupt.</p>
<h3>Example Macro Usage:</h3>
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:
// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
<h3>Register Fields:</h3>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>31</th>
<th>30</th>
<th>29</th>
<th>28</th>
<th>27</th>
<th>26</th>
<th>25</th>
<th>24</th>
<th>23</th>
<th>22</th>
<th>21</th>
<th>20</th>
<th>19</th>
<th>18</th>
<th>17</th>
<th>16</th>
<th>15</th>
<th>14</th>
<th>13</th>
<th>12</th>
<th>11</th>
<th>10</th>
<th>9</th>
<th>8</th>
<th>7</th>
<th>6</th>
<th>5</th>
<th>4</th>
<th>3</th>
<th>2</th>
<th>1</th>
<th>0</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center" colspan="31">RSVD
<br>0x0</td>
<td align="center" colspan="1">WDTINT
<br>0x0</td>
</tr>
</tbody>
</table>
<br>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>Bits</th>
<th>Name</th>
<th>RW</th>
<th>Description</th>
</tr>
</thead>
<tbody>
<tr>
<td>31:1</td>
<td>RSVD</td>
<td>RO</td>
<td>This bitfield is reserved for future use.<br><br>
</td>
</tr>
<tr>
<td>0</td>
<td>WDTINT</td>
<td>RW</td>
<td>Watchdog Timer Interrupt.<br><br>
</td>
</tr>
</tbody>
</table>
<br>
</div>
</div>
<div class="panel panel-default">
<div class="panel-heading">
<h3 id="INTCLR" class="panel-title">INTCLR - WDT Interrupt register: Clear</h3>
</div>
<div class="panel-body">
<h3>Address:</h3>
<table style="margin:10px">
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">Instance 0 Address:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x40024208</span>
</td>
</tr>
</table>
<h3>Description:</h3>
<p>Write a 1 to a bit in this register to clear the interrupt status associated with that bit.</p>
<h3>Example Macro Usage:</h3>
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:
// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
<h3>Register Fields:</h3>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>31</th>
<th>30</th>
<th>29</th>
<th>28</th>
<th>27</th>
<th>26</th>
<th>25</th>
<th>24</th>
<th>23</th>
<th>22</th>
<th>21</th>
<th>20</th>
<th>19</th>
<th>18</th>
<th>17</th>
<th>16</th>
<th>15</th>
<th>14</th>
<th>13</th>
<th>12</th>
<th>11</th>
<th>10</th>
<th>9</th>
<th>8</th>
<th>7</th>
<th>6</th>
<th>5</th>
<th>4</th>
<th>3</th>
<th>2</th>
<th>1</th>
<th>0</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center" colspan="31">RSVD
<br>0x0</td>
<td align="center" colspan="1">WDTINT
<br>0x0</td>
</tr>
</tbody>
</table>
<br>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>Bits</th>
<th>Name</th>
<th>RW</th>
<th>Description</th>
</tr>
</thead>
<tbody>
<tr>
<td>31:1</td>
<td>RSVD</td>
<td>RO</td>
<td>This bitfield is reserved for future use.<br><br>
</td>
</tr>
<tr>
<td>0</td>
<td>WDTINT</td>
<td>RW</td>
<td>Watchdog Timer Interrupt.<br><br>
</td>
</tr>
</tbody>
</table>
<br>
</div>
</div>
<div class="panel panel-default">
<div class="panel-heading">
<h3 id="INTSET" class="panel-title">INTSET - WDT Interrupt register: Set</h3>
</div>
<div class="panel-body">
<h3>Address:</h3>
<table style="margin:10px">
<tr id="row_0_0_">
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">Instance 0 Address:</span>
</td>
<td class="entry">
<span style="width:32px;display:inline-block;">&#160;</span>
<span class="h5">0x4002420C</span>
</td>
</tr>
</table>
<h3>Description:</h3>
<p>Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for testing purposes).</p>
<h3>Example Macro Usage:</h3>
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:
// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234; <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234; <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>
<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2; <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
<h3>Register Fields:</h3>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>31</th>
<th>30</th>
<th>29</th>
<th>28</th>
<th>27</th>
<th>26</th>
<th>25</th>
<th>24</th>
<th>23</th>
<th>22</th>
<th>21</th>
<th>20</th>
<th>19</th>
<th>18</th>
<th>17</th>
<th>16</th>
<th>15</th>
<th>14</th>
<th>13</th>
<th>12</th>
<th>11</th>
<th>10</th>
<th>9</th>
<th>8</th>
<th>7</th>
<th>6</th>
<th>5</th>
<th>4</th>
<th>3</th>
<th>2</th>
<th>1</th>
<th>0</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center" colspan="31">RSVD
<br>0x0</td>
<td align="center" colspan="1">WDTINT
<br>0x0</td>
</tr>
</tbody>
</table>
<br>
<table style="margin:10px" class="table table-bordered table-condensed">
<thead>
<tr>
<th>Bits</th>
<th>Name</th>
<th>RW</th>
<th>Description</th>
</tr>
</thead>
<tbody>
<tr>
<td>31:1</td>
<td>RSVD</td>
<td>RO</td>
<td>This bitfield is reserved for future use.<br><br>
</td>
</tr>
<tr>
<td>0</td>
<td>WDTINT</td>
<td>RW</td>
<td>Watchdog Timer Interrupt.<br><br>
</td>
</tr>
</tbody>
</table>
<br>
</div>
</div>
</body>
<hr size="1">
<body>
<div id="footer" align="right">
<small>
AmbiqSuite Register Documentation&nbsp;
<a href="http://www.ambiqmicro.com">
<img class="footer" src="../resources/ambiqmicro_logo.png" alt="Ambiq Micro"/></a>&nbsp&nbsp Copyright &copy; 2019&nbsp&nbsp<br />
This documentation is licensed and distributed under the <a rel="license" href="http://opensource.org/licenses/BSD-3-Clause">BSD 3-Clause License</a>.&nbsp&nbsp<br/>
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