2517 lines
109 KiB
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2517 lines
109 KiB
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<title>AmbiqSuite User Guide: AmbiqSuite Apollo Device Register Overview</title>
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<td style="padding-left: 0.5em;">
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<div id="projectname">Apollo Register Documentation  <span id="projectnumber">v2.4.2</span></div>
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<div class="header">
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<div class="headertitle">
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<div class="title">MCUCTRL - MCU Miscellaneous Control Logic</div>
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</div>
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</div>
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<!--header-->
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<br>
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<div class="panel panel-default">
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<div class="panel-heading">
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<h3 class="panel-title"> MCUCTRL Register Index</h3>
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</div>
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<div class="panel-body">
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<table>
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000000:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#CHIP_INFO" target="_self">CHIP_INFO - Chip Information Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000004:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#CHIPID0" target="_self">CHIPID0 - Unique Chip ID 0</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000008:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#CHIPID1" target="_self">CHIPID1 - Unique Chip ID 1</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x0000000C:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#CHIPREV" target="_self">CHIPREV - Chip Revision</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000010:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SUPPLYSRC" target="_self">SUPPLYSRC - Memory and Core Voltage Supply Source Select Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000014:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SUPPLYSTATUS" target="_self">SUPPLYSTATUS - Memory and Core Voltage Supply Source Status Register</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x000000FC:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#BANDGAPEN" target="_self">BANDGAPEN - Band Gap Enable</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000140:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SRAMPWDINSLEEP" target="_self">SRAMPWDINSLEEP - Powerdown an SRAM Bank in Deep Sleep mode</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000144:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SRAMPWRDIS" target="_self">SRAMPWRDIS - Disables individual banks of the SRAM array</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x00000148:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#FLASHPWRDIS" target="_self">FLASHPWRDIS - Disables individual banks of the Flash array</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x000001C0:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#ICODEFAULTADDR" target="_self">ICODEFAULTADDR - ICODE bus address which was present when a bus fault occurred.</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">0x000001C4:</span>
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#DCODEFAULTADDR" target="_self">DCODEFAULTADDR - DCODE bus address which was present when a bus fault occurred.</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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||
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<span class="h5">0x000001C8:</span>
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||
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</td>
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<td class="entry">
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||
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#SYSFAULTADDR" target="_self">SYSFAULTADDR - System bus address which was present when a bus fault occurred.</a>
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</td>
|
||
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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||
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<span class="h5">0x000001CC:</span>
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||
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</td>
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||
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<td class="entry">
|
||
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#FAULTSTATUS" target="_self">FAULTSTATUS - Reflects the status of the bus decoders' fault detection. Any write to this register will clear all of the status bits within the register.</a>
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</td>
|
||
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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||
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<span style="width:32px;display:inline-block;"> </span>
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||
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<span class="h5">0x000001D0:</span>
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||
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</td>
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#FAULTCAPTUREEN" target="_self">FAULTCAPTUREEN - Enable the fault capture registers</a>
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</td>
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</tr>
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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||
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<span class="h5">0x00000250:</span>
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||
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</td>
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<td class="entry">
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||
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<span style="width:32px;display:inline-block;"> </span>
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<a class="el" href="#TPIUCTRL" target="_self">TPIUCTRL - TPIU Control Register. Determines the clock enable and frequency for the M4's TPIU interface.</a>
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</td>
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</tr>
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</table>
|
||
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</div>
|
||
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</div>
|
||
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||
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<div class="panel panel-default">
|
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<div class="panel-heading">
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||
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<h3 id="CHIP_INFO" class="panel-title">CHIP_INFO - Chip Information Register</h3>
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||
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</div>
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<div class="panel-body">
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<h3>Address:</h3>
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<table style="margin:10px">
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<tr id="row_0_0_">
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<td class="entry">
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<span style="width:32px;display:inline-block;"> </span>
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<span class="h5">Instance 0 Address:</span>
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</td>
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<td class="entry">
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||
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<span style="width:32px;display:inline-block;"> </span>
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||
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<span class="h5">0x40020000</span>
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||
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</td>
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</tr>
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</table>
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<h3>Description:</h3>
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<p>Chip Information Register</p>
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<h3>Example Macro Usage:</h3>
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<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
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// All macro-based register writes follow the same basic format. For
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// single-instance modules, you may use the simpler AM_REG macro. For
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// multi-instance macros, you will need to specify the instance number using
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// the AM_REGn macro format.
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//
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// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
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// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
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//
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// For registers that do not have specific enumeration values, you may use this alternate format instead.
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//
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// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
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//
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// For example, the following three lines of code are equivalent methods of
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// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
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//</span>
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AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
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AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
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AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
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||
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<h3>Register Fields:</h3>
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||
|
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<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
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<thead>
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||
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<tr>
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||
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<th>31</th>
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<th>30</th>
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<th>29</th>
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<th>28</th>
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<th>27</th>
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<th>26</th>
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<th>25</th>
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||
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<th>24</th>
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||
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<th>23</th>
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<th>22</th>
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||
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<th>21</th>
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||
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<th>20</th>
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||
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<th>19</th>
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||
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<th>18</th>
|
||
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<th>17</th>
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||
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<th>16</th>
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||
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<th>15</th>
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||
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<th>14</th>
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||
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<th>13</th>
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||
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<th>12</th>
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||
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<th>11</th>
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||
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<th>10</th>
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||
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<th>9</th>
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||
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<th>8</th>
|
||
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<th>7</th>
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||
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<th>6</th>
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||
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<th>5</th>
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||
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<th>4</th>
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||
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<th>3</th>
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||
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<th>2</th>
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||
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<th>1</th>
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||
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<th>0</th>
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||
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</tr>
|
||
|
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</thead>
|
||
|
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<tbody>
|
||
|
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<tr>
|
||
|
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<td align="center" colspan="8">CLASS
|
||
|
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<br>0x1</td>
|
||
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|
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||
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<td align="center" colspan="4">FLASH
|
||
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<br>0x4</td>
|
||
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||
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<td align="center" colspan="4">RAM
|
||
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<br>0x1</td>
|
||
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<td align="center" colspan="4">MAJORREV
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||
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<br>0x1</td>
|
||
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|
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||
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<td align="center" colspan="4">MINORREV
|
||
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<br>0x1</td>
|
||
|
|
|
||
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<td align="center" colspan="2">PKG
|
||
|
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<br>0x1</td>
|
||
|
|
|
||
|
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<td align="center" colspan="3">PINS
|
||
|
|
<br>0x1</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="2">TEMP
|
||
|
|
<br>0x1</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">QUAL
|
||
|
|
<br>0x1</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:24</td>
|
||
|
|
<td>CLASS</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Device class.<br><br>
|
||
|
|
APOLLO = 0x1 - APOLLO</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>23:20</td>
|
||
|
|
<td>FLASH</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Device flash size.<br><br>
|
||
|
|
256K = 0x3 - 256K of available flash.<br>
|
||
|
|
512K = 0x4 - 512K of available flash.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>19:16</td>
|
||
|
|
<td>RAM</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Device RAM size.<br><br>
|
||
|
|
32K = 0x0 - 32K of available SRAM.<br>
|
||
|
|
64K = 0x1 - 64K of available SRAM.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>15:12</td>
|
||
|
|
<td>MAJORREV</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Major device revision number.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>11:8</td>
|
||
|
|
<td>MINORREV</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Minor device revision number.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>7:6</td>
|
||
|
|
<td>PKG</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Device package type.<br><br>
|
||
|
|
BGA = 0x2 - Ball grid array.<br>
|
||
|
|
CSP = 0x3 - Chip-scale package.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>5:3</td>
|
||
|
|
<td>PINS</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Number of pins.<br><br>
|
||
|
|
41PINS = 0x1 - 41 package pins total.<br>
|
||
|
|
64PINS = 0x1 - 64 package pins total.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>2:1</td>
|
||
|
|
<td>TEMP</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Device temperature range.<br><br>
|
||
|
|
COMMERCIAL = 0x0 - Commercial temperature range.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>0</td>
|
||
|
|
<td>QUAL</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Device qualified.<br><br>
|
||
|
|
PROTOTYPE = 0x0 - Prototype device.<br>
|
||
|
|
QUALIFIED = 0x1 - Fully qualified device.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="CHIPID0" class="panel-title">CHIPID0 - Unique Chip ID 0</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x40020004</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>Unique Chip ID 0</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="32">VALUE
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:0</td>
|
||
|
|
<td>VALUE</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Unique chip ID 0.<br><br>
|
||
|
|
APOLLO = 0x0 - Apollo CHIPID0.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="CHIPID1" class="panel-title">CHIPID1 - Unique Chip ID 1</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x40020008</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>Unique Chip ID 1</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="32">VALUE
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:0</td>
|
||
|
|
<td>VALUE</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Unique chip ID 1.<br><br>
|
||
|
|
APOLLO = 0x0 - Apollo CHIPID1.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="CHIPREV" class="panel-title">CHIPREV - Chip Revision</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x4002000C</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>Chip Revision</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="24">RSVD
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="8">REVISION
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:8</td>
|
||
|
|
<td>RSVD</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>RESERVED.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>7:0</td>
|
||
|
|
<td>REVISION</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Chip Revision Number.<br><br>
|
||
|
|
APOLLO = 0x0 - Apollo CHIPREV.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="SUPPLYSRC" class="panel-title">SUPPLYSRC - Memory and Core Voltage Supply Source Select Register</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x40020010</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>Memory and Core Voltage Supply Source Select Register</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="30">RSVD
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">COREBUCKEN
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">MEMBUCKEN
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:2</td>
|
||
|
|
<td>RSVD</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>RESERVED.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>1</td>
|
||
|
|
<td>COREBUCKEN</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Enables and Selects the Core Buck as the supply for the low-voltage power domain.<br><br>
|
||
|
|
EN = 0x1 - Enable the Core Buck for the low-voltage power domain.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>0</td>
|
||
|
|
<td>MEMBUCKEN</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Enables and select the Memory Buck as the supply for the Flash and SRAM power domain.<br><br>
|
||
|
|
EN = 0x1 - Enable the Memory Buck as the supply for flash and SRAM.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="SUPPLYSTATUS" class="panel-title">SUPPLYSTATUS - Memory and Core Voltage Supply Source Status Register</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x40020014</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>Memory and Core Voltage Supply Source Status Register</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="30">RSVD
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">COREBUCKON
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">MEMBUCKON
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:2</td>
|
||
|
|
<td>RSVD</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>RESERVED.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>1</td>
|
||
|
|
<td>COREBUCKON</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Indicates whether the Core low-voltage domain is supplied from the LDO or the Buck.<br><br>
|
||
|
|
LDO = 0x0 - Indicates the the LDO is supplying the Core low-voltage.<br>
|
||
|
|
BUCK = 0x1 - Indicates the the Buck is supplying the Core low-voltage.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>0</td>
|
||
|
|
<td>MEMBUCKON</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>Indicate whether the Memory power domain is supplied from the LDO or the Buck.<br><br>
|
||
|
|
LDO = 0x0 - Indicates the LDO is supplying the memory power domain.<br>
|
||
|
|
BUCK = 0x1 - Indicates the Buck is supplying the memory power domain.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="BANDGAPEN" class="panel-title">BANDGAPEN - Band Gap Enable</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x400200FC</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>Band Gap Enable</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="31">RSVD
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BGPEN
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:1</td>
|
||
|
|
<td>RSVD</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>RESERVED.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>0</td>
|
||
|
|
<td>BGPEN</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Bandgap Enable<br><br>
|
||
|
|
DIS = 0x0 - Bandgap disable.<br>
|
||
|
|
EN = 0x1 - Bandgap enable.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="SRAMPWDINSLEEP" class="panel-title">SRAMPWDINSLEEP - Powerdown an SRAM Bank in Deep Sleep mode</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x40020140</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>Powerdown an SRAM Bank in Deep Sleep mode</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="24">RSVD
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK7
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK6
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK5
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK4
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK3
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK2
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK1
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK0
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:8</td>
|
||
|
|
<td>RSVD</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>RESERVED.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>7</td>
|
||
|
|
<td>BANK7</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Force SRAM Bank 7 to powerdown in deep sleep mode, causing the contents of the bank to be lost.<br><br>
|
||
|
|
NORMAL = 0x0 - SRAM Bank 7 normal operation.<br>
|
||
|
|
PWRDN_IN_DEEPSLEEP = 0x1 - SRAM Bank 7 deep sleep.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>6</td>
|
||
|
|
<td>BANK6</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Force SRAM Bank 6 to powerdown in deep sleep mode, causing the contents of the bank to be lost.<br><br>
|
||
|
|
NORMAL = 0x0 - SRAM Bank 6 normal operation.<br>
|
||
|
|
PWRDN_IN_DEEPSLEEP = 0x1 - SRAM Bank 6 deep sleep.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>5</td>
|
||
|
|
<td>BANK5</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Force SRAM Bank 5 to powerdown in deep sleep mode, causing the contents of the bank to be lost.<br><br>
|
||
|
|
NORMAL = 0x0 - SRAM Bank 5 normal operation.<br>
|
||
|
|
PWRDN_IN_DEEPSLEEP = 0x1 - SRAM Bank 5 deep sleep.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>4</td>
|
||
|
|
<td>BANK4</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Force SRAM Bank 4 to powerdown in deep sleep mode, causing the contents of the bank to be lost.<br><br>
|
||
|
|
NORMAL = 0x0 - SRAM Bank 4 normal operation.<br>
|
||
|
|
PWRDN_IN_DEEPSLEEP = 0x1 - SRAM Bank 4 deep sleep.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>3</td>
|
||
|
|
<td>BANK3</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Force SRAM Bank 3 to powerdown in deep sleep mode, causing the contents of the bank to be lost.<br><br>
|
||
|
|
NORMAL = 0x0 - SRAM Bank 3 normal operation.<br>
|
||
|
|
PWRDN_IN_DEEPSLEEP = 0x1 - SRAM Bank 3 deep sleep.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>2</td>
|
||
|
|
<td>BANK2</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Force SRAM Bank 2 to powerdown in deep sleep mode, causing the contents of the bank to be lost.<br><br>
|
||
|
|
NORMAL = 0x0 - SRAM Bank 2 normal operation.<br>
|
||
|
|
PWRDN_IN_DEEPSLEEP = 0x1 - SRAM Bank 2 deep sleep.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>1</td>
|
||
|
|
<td>BANK1</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Force SRAM Bank 1 to powerdown in deep sleep mode, causing the contents of the bank to be lost.<br><br>
|
||
|
|
NORMAL = 0x0 - SRAM Bank 1 normal operation.<br>
|
||
|
|
PWRDN_IN_DEEPSLEEP = 0x1 - SRAM Bank 1 deep sleep.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>0</td>
|
||
|
|
<td>BANK0</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Force SRAM Bank 0 to powerdown in deep sleep mode, causing the contents of the bank to be lost.<br><br>
|
||
|
|
NORMAL = 0x0 - SRAM Bank 0 normal operation.<br>
|
||
|
|
PWRDN_IN_DEEPSLEEP = 0x1 - SRAM Bank 0 deep sleep.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="SRAMPWRDIS" class="panel-title">SRAMPWRDIS - Disables individual banks of the SRAM array</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x40020144</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>Disables individual banks of the SRAM array</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="24">RSVD
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK7
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK6
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK5
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK4
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK3
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK2
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK1
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK0
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:8</td>
|
||
|
|
<td>RSVD</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>RESERVED.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>7</td>
|
||
|
|
<td>BANK7</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Remove power from SRAM Bank 7 which will cause an access to its address space to generate a Hard Fault.<br><br>
|
||
|
|
DIS = 0x1 - Disable SRAM Bank 7.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>6</td>
|
||
|
|
<td>BANK6</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Remove power from SRAM Bank 6 which will cause an access to its address space to generate a Hard Fault.<br><br>
|
||
|
|
DIS = 0x1 - Disable SRAM Bank 6.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>5</td>
|
||
|
|
<td>BANK5</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Remove power from SRAM Bank 5 which will cause an access to its address space to generate a Hard Fault.<br><br>
|
||
|
|
DIS = 0x1 - Disable SRAM Bank 5.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>4</td>
|
||
|
|
<td>BANK4</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Remove power from SRAM Bank 4 which will cause an access to its address space to generate a Hard Fault.<br><br>
|
||
|
|
DIS = 0x1 - Disable SRAM Bank 4.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>3</td>
|
||
|
|
<td>BANK3</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Remove power from SRAM Bank 3 which will cause an access to its address space to generate a Hard Fault.<br><br>
|
||
|
|
DIS = 0x1 - Disable SRAM Bank 3.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>2</td>
|
||
|
|
<td>BANK2</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Remove power from SRAM Bank 2 which will cause an access to its address space to generate a Hard Fault.<br><br>
|
||
|
|
DIS = 0x1 - Disable SRAM Bank 2.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>1</td>
|
||
|
|
<td>BANK1</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Remove power from SRAM Bank 1 which will cause an access to its address space to generate a Hard Fault.<br><br>
|
||
|
|
DIS = 0x1 - Disable SRAM Bank 1.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>0</td>
|
||
|
|
<td>BANK0</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Remove power from SRAM Bank 0 which will cause an access to its address space to generate a Hard Fault.<br><br>
|
||
|
|
DIS = 0x1 - Disable SRAM Bank 0.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="FLASHPWRDIS" class="panel-title">FLASHPWRDIS - Disables individual banks of the Flash array</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x40020148</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>Disables individual banks of the Flash array</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="30">RSVD
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK1
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">BANK0
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:2</td>
|
||
|
|
<td>RSVD</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>RESERVED.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>1</td>
|
||
|
|
<td>BANK1</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Remove power from Flash Bank 1 which will cause an access to its address space to generate a Hard Fault.<br><br>
|
||
|
|
DIS = 0x1 - Disable Flash instance 1.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>0</td>
|
||
|
|
<td>BANK0</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Remove power from Flash Bank 0 which will cause an access to its address space to generate a Hard Fault.<br><br>
|
||
|
|
DIS = 0x1 - Disable Flash instance 0.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="ICODEFAULTADDR" class="panel-title">ICODEFAULTADDR - ICODE bus address which was present when a bus fault occurred.</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x400201C0</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>ICODE bus address which was present when a bus fault occurred.</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="32">ADDR
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:0</td>
|
||
|
|
<td>ADDR</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>The ICODE bus address observed when a Bus Fault occurred. Once an address is captured in this field, it is held until the corresponding Fault Observed bit is cleared in the FAULTSTATUS register.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="DCODEFAULTADDR" class="panel-title">DCODEFAULTADDR - DCODE bus address which was present when a bus fault occurred.</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x400201C4</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>DCODE bus address which was present when a bus fault occurred.</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="32">ADDR
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:0</td>
|
||
|
|
<td>ADDR</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>The DCODE bus address observed when a Bus Fault occurred. Once an address is captured in this field, it is held until the corresponding Fault Observed bit is cleared in the FAULTSTATUS register.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="SYSFAULTADDR" class="panel-title">SYSFAULTADDR - System bus address which was present when a bus fault occurred.</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x400201C8</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>System bus address which was present when a bus fault occurred.</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="32">ADDR
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:0</td>
|
||
|
|
<td>ADDR</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>SYS bus address observed when a Bus Fault occurred. Once an address is captured in this field, it is held until the corresponding Fault Observed bit is cleared in the FAULTSTATUS register.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="FAULTSTATUS" class="panel-title">FAULTSTATUS - Reflects the status of the bus decoders' fault detection. Any write to this register will clear all of the status bits within the register.</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x400201CC</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>Reflects the status of the bus decoders' fault detection. Any write to this register will clear all of the status bits within the register.</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="29">RSVD
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">SYS
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">DCODE
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">ICODE
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:3</td>
|
||
|
|
<td>RSVD</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>RESERVED.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>2</td>
|
||
|
|
<td>SYS</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>SYS Bus Decoder Fault Detected bit. When set, a fault has been detected, and the SYSFAULTADDR register will contain the bus address which generated the fault.<br><br>
|
||
|
|
NOFAULT = 0x0 - No bus fault has been detected.<br>
|
||
|
|
FAULT = 0x1 - Bus fault detected.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>1</td>
|
||
|
|
<td>DCODE</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>DCODE Bus Decoder Fault Detected bit. When set, a fault has been detected, and the DCODEFAULTADDR register will contain the bus address which generated the fault.<br><br>
|
||
|
|
NOFAULT = 0x0 - No DCODE fault has been detected.<br>
|
||
|
|
FAULT = 0x1 - DCODE fault detected.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>0</td>
|
||
|
|
<td>ICODE</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>The ICODE Bus Decoder Fault Detected bit. When set, a fault has been detected, and the ICODEFAULTADDR register will contain the bus address which generated the fault.<br><br>
|
||
|
|
NOFAULT = 0x0 - No ICODE fault has been detected.<br>
|
||
|
|
FAULT = 0x1 - ICODE fault detected.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="FAULTCAPTUREEN" class="panel-title">FAULTCAPTUREEN - Enable the fault capture registers</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x400201D0</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>Enable the fault capture registers</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="31">RSVD
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">ENABLE
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:1</td>
|
||
|
|
<td>RSVD</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>RESERVED.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>0</td>
|
||
|
|
<td>ENABLE</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>Fault Capture Enable field. When set, the Fault Capture monitors are enabled and addresses which generate a hard fault are captured into the FAULTADDR registers.<br><br>
|
||
|
|
DIS = 0x0 - Disable fault capture.<br>
|
||
|
|
EN = 0x1 - Enable fault capture.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<div class="panel panel-default">
|
||
|
|
<div class="panel-heading">
|
||
|
|
<h3 id="TPIUCTRL" class="panel-title">TPIUCTRL - TPIU Control Register. Determines the clock enable and frequency for the M4's TPIU interface.</h3>
|
||
|
|
</div>
|
||
|
|
<div class="panel-body">
|
||
|
|
<h3>Address:</h3>
|
||
|
|
<table style="margin:10px">
|
||
|
|
<tr id="row_0_0_">
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">Instance 0 Address:</span>
|
||
|
|
</td>
|
||
|
|
<td class="entry">
|
||
|
|
<span style="width:32px;display:inline-block;"> </span>
|
||
|
|
<span class="h5">0x40020250</span>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</table>
|
||
|
|
<h3>Description:</h3>
|
||
|
|
<p>TPIU Control Register. Determines the clock enable and frequency for the M4's TPIU interface.</p>
|
||
|
|
<h3>Example Macro Usage:</h3>
|
||
|
|
<pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
|
||
|
|
// All macro-based register writes follow the same basic format. For
|
||
|
|
// single-instance modules, you may use the simpler AM_REG macro. For
|
||
|
|
// multi-instance macros, you will need to specify the instance number using
|
||
|
|
// the AM_REGn macro format.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
|
||
|
|
//
|
||
|
|
// For registers that do not have specific enumeration values, you may use this alternate format instead.
|
||
|
|
//
|
||
|
|
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
|
||
|
|
//
|
||
|
|
// For example, the following three lines of code are equivalent methods of
|
||
|
|
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
|
||
|
|
//</span>
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
|
||
|
|
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
|
||
|
|
<h3>Register Fields:</h3>
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>31</th>
|
||
|
|
<th>30</th>
|
||
|
|
<th>29</th>
|
||
|
|
<th>28</th>
|
||
|
|
<th>27</th>
|
||
|
|
<th>26</th>
|
||
|
|
<th>25</th>
|
||
|
|
<th>24</th>
|
||
|
|
<th>23</th>
|
||
|
|
<th>22</th>
|
||
|
|
<th>21</th>
|
||
|
|
<th>20</th>
|
||
|
|
<th>19</th>
|
||
|
|
<th>18</th>
|
||
|
|
<th>17</th>
|
||
|
|
<th>16</th>
|
||
|
|
<th>15</th>
|
||
|
|
<th>14</th>
|
||
|
|
<th>13</th>
|
||
|
|
<th>12</th>
|
||
|
|
<th>11</th>
|
||
|
|
<th>10</th>
|
||
|
|
<th>9</th>
|
||
|
|
<th>8</th>
|
||
|
|
<th>7</th>
|
||
|
|
<th>6</th>
|
||
|
|
<th>5</th>
|
||
|
|
<th>4</th>
|
||
|
|
<th>3</th>
|
||
|
|
<th>2</th>
|
||
|
|
<th>1</th>
|
||
|
|
<th>0</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td align="center" colspan="22">RSVD
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="2">CLKSEL
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="7">RSVD
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
<td align="center" colspan="1">ENABLE
|
||
|
|
<br>0x0</td>
|
||
|
|
|
||
|
|
</tr>
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
|
||
|
|
<table style="margin:10px" class="table table-bordered table-condensed">
|
||
|
|
<thead>
|
||
|
|
<tr>
|
||
|
|
<th>Bits</th>
|
||
|
|
<th>Name</th>
|
||
|
|
<th>RW</th>
|
||
|
|
<th>Description</th>
|
||
|
|
</tr>
|
||
|
|
</thead>
|
||
|
|
<tbody>
|
||
|
|
<tr>
|
||
|
|
<td>31:10</td>
|
||
|
|
<td>RSVD</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>RESERVED.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>9:8</td>
|
||
|
|
<td>CLKSEL</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>This field selects the frequency of the ARM M4 TPIU port.<br><br>
|
||
|
|
LOW_PWR = 0x0 - Low power state.<br>
|
||
|
|
0MHz = 0x0 - Low power state.<br>
|
||
|
|
6MHZ = 0x1 - Selects 6MHz frequency.<br>
|
||
|
|
3MHZ = 0x2 - Selects 3MHz frequency.<br>
|
||
|
|
1_5MHZ = 0x3 - Selects 1.5 MHz frequency.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>7:1</td>
|
||
|
|
<td>RSVD</td>
|
||
|
|
<td>RO</td>
|
||
|
|
<td>RESERVED.<br><br>
|
||
|
|
</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
<tr>
|
||
|
|
<td>0</td>
|
||
|
|
<td>ENABLE</td>
|
||
|
|
<td>RW</td>
|
||
|
|
<td>TPIU Enable field. When set, the ARM M4 TPIU is enabled and data can be streamed out of the MCU's SWO port using the ARM ITM and TPIU modules.<br><br>
|
||
|
|
DIS = 0x0 - Disable the TPIU.<br>
|
||
|
|
EN = 0x1 - Enable the TPIU.</td>
|
||
|
|
</tr>
|
||
|
|
|
||
|
|
</tbody>
|
||
|
|
</table>
|
||
|
|
<br>
|
||
|
|
</div>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
</body>
|
||
|
|
|
||
|
|
<hr size="1">
|
||
|
|
<body>
|
||
|
|
<div id="footer" align="right">
|
||
|
|
<small>
|
||
|
|
AmbiqSuite Register Documentation
|
||
|
|
<a href="http://www.ambiqmicro.com">
|
||
|
|
<img class="footer" src="../resources/ambiqmicro_logo.png" alt="Ambiq Micro"/></a>   Copyright © 2014  <br />
|
||
|
|
This documentation is licensed and distributed under the <a rel="license" href="http://opensource.org/licenses/BSD-3-Clause">BSD 3-Clause License</a>.  <br/>
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