565 lines
23 KiB
C
565 lines
23 KiB
C
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//*****************************************************************************
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//
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// am_hal_gpio.h
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//! @file
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//!
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//! @brief Functions for accessing and configuring the GPIO module.
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//!
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//! @addtogroup gpio1 GPIO
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//! @ingroup apollo1hal
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2020, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// Third party software included in this distribution is subject to the
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// additional license terms as defined in the /docs/licenses directory.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#ifndef AM_HAL_GPIO_H
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#define AM_HAL_GPIO_H
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// DEVICE ADDRESS IS 8-bits
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#define AM_HAL_GPIO_DEV_ADDR_8 (0)
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// DEVICE ADDRESS IS 16-bits
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#define AM_HAL_GPIO_DEV_ADDR_16 (1)
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// DEVICE OFFSET IS 8-bits
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#define AM_HAL_GPIO_DEV_OFFSET_8 (0x00000000)
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// DEVICE OFFSET IS 16-bits
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#define AM_HAL_GPIO_DEV_OFFSET_16 (0x00010000)
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// Maximum number of GPIOs on this device
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#define AM_HAL_GPIO_MAX_PADS (50)
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#define AM_HAL_GPIO_NUMWORDS ((AM_HAL_GPIO_MAX_PADS + 31) / 32)
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//*****************************************************************************
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//
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//! @name GPIO Pin defines
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//! @brief GPIO Pin defines for use with interrupt functions
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//!
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//! These macros may be used to with \e am_hal_gpio_int_x().
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_BIT(n) (((uint64_t) 0x1) << n)
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//! @}
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//
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// AM_HAL_GPIO_MASKBIT(pMaskNm,n)
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// The pMaskNm parameter is not used for Apollo and is simply ignored.
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// n is the desired bitnumber.
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//
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#define AM_HAL_GPIO_MASKBIT(pMaskNm, n) (((uint64_t) 0x1) << n)
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#define AM_HAL_GPIO_MASKCREATE(MaskNm)
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#define AM_HAL_GPIO_MASKCLR(pMaskNm)
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//*****************************************************************************
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//
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// Input options.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_INPEN 0x00000002 // Enable input transistors.
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#define AM_HAL_GPIO_INCFG_RDZERO 0x00000100 // Disable input read registers.
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//*****************************************************************************
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//
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// Output options
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_OUT_DISABLE 0x00000000
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#define AM_HAL_GPIO_OUT_PUSHPULL 0x00000200
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#define AM_HAL_GPIO_OUT_OPENDRAIN 0x00000400
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#define AM_HAL_GPIO_OUT_3STATE 0x00000600
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//*****************************************************************************
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//
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// Interrupt polarity
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_FALLING 0x00000001
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#define AM_HAL_GPIO_RISING 0x00000000
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//*****************************************************************************
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//
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// Pad configuration options.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_POWERSOURCE 0x00000080
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#define AM_HAL_GPIO_POWERSINK 0x00000040
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#define AM_HAL_GPIO_HIGH_DRIVE 0x00000004
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#define AM_HAL_GPIO_LOW_DRIVE 0x00000000
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#define AM_HAL_GPIO_PULLUP 0x00000001
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#define AM_HAL_GPIO_PULL1_5K 0x00000001
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#define AM_HAL_GPIO_PULL6K 0x00000041
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#define AM_HAL_GPIO_PULL12K 0x00000081
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#define AM_HAL_GPIO_PULL24K 0x000000C1
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#define AM_HAL_GPIO_FUNC(x) ((x & 0x7) << 3)
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//*****************************************************************************
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//
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// Common pin configurations.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_DISABLE \
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(AM_HAL_GPIO_FUNC(3))
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#define AM_HAL_GPIO_INPUT \
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(AM_HAL_GPIO_FUNC(3) | AM_HAL_GPIO_INPEN)
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#define AM_HAL_GPIO_OUTPUT \
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(AM_HAL_GPIO_FUNC(3) | AM_HAL_GPIO_OUT_PUSHPULL)
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#define AM_HAL_GPIO_OPENDRAIN \
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(AM_HAL_GPIO_FUNC(3) | AM_HAL_GPIO_OUT_OPENDRAIN | AM_HAL_GPIO_INPEN)
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#define AM_HAL_GPIO_3STATE \
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(AM_HAL_GPIO_FUNC(3) | AM_HAL_GPIO_OUT_3STATE)
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//*****************************************************************************
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//
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// PADREG helper macros.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_PADREG(n) \
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(AM_REG_GPIOn(0) + AM_REG_GPIO_PADREGA_O + (n & 0xFC))
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#define AM_HAL_GPIO_PADREG_S(n) \
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(((uint32_t)(n) % 4) << 3)
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#define AM_HAL_GPIO_PADREG_M(n) \
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((uint32_t) 0xFF << AM_HAL_GPIO_PADREG_S(n))
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#define AM_HAL_GPIO_PADREG_FIELD(n, configval) \
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(((uint32_t)(configval) & 0xFF) << AM_HAL_GPIO_PADREG_S(n))
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#define AM_HAL_GPIO_PADREG_W(n, configval) \
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AM_REGVAL(AM_HAL_GPIO_PADREG(n)) = \
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(AM_HAL_GPIO_PADREG_FIELD(n, configval) | \
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(AM_REGVAL(AM_HAL_GPIO_PADREG(n)) & ~AM_HAL_GPIO_PADREG_M(n)))
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#define AM_HAL_GPIO_PADREG_R(n) \
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((AM_REGVAL(AM_HAL_GPIO_PADREG(n)) & AM_HAL_GPIO_PADREG_M(n)) >> \
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AM_HAL_GPIO_PADREG_S(n))
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//*****************************************************************************
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//
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// CFG helper macros.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_CFG(n) \
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(AM_REG_GPIOn(0) + AM_REG_GPIO_CFGA_O + ((n & 0xF8) >> 1))
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#define AM_HAL_GPIO_CFG_S(n) \
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(((uint32_t)(n) % 8) << 2)
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#define AM_HAL_GPIO_CFG_M(n) \
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((uint32_t) 0x7 << AM_HAL_GPIO_CFG_S(n))
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#define AM_HAL_GPIO_CFG_FIELD(n, configval) \
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((((uint32_t)(configval) & 0x700) >> 8) << AM_HAL_GPIO_CFG_S(n))
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#define AM_HAL_GPIO_CFG_W(n, configval) \
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AM_REGVAL(AM_HAL_GPIO_CFG(n)) = \
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(AM_HAL_GPIO_CFG_FIELD(n, configval) | \
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(AM_REGVAL(AM_HAL_GPIO_CFG(n)) & ~AM_HAL_GPIO_CFG_M(n)))
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#define AM_HAL_GPIO_CFG_R(n) \
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((AM_REGVAL(AM_HAL_GPIO_CFG(n)) & AM_HAL_GPIO_CFG_M(n)) >> \
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AM_HAL_GPIO_CFG_S(n))
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//*****************************************************************************
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//
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// Polarity helper macros.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_POL_S(n) \
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((((uint32_t)(n) % 8) << 2) + 3)
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#define AM_HAL_GPIO_POL_M(n) \
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((uint32_t) 0x1 << AM_HAL_GPIO_POL_S(n))
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#define AM_HAL_GPIO_POL_FIELD(n, polarity) \
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(((uint32_t)(polarity) & 0x1) << AM_HAL_GPIO_POL_S(n))
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#define AM_HAL_GPIO_POL_W(n, polarity) \
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AM_REGVAL(AM_HAL_GPIO_CFG(n)) = \
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(AM_HAL_GPIO_POL_FIELD(n, polarity) | \
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(AM_REGVAL(AM_HAL_GPIO_CFG(n)) & ~AM_HAL_GPIO_POL_M(n)))
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//*****************************************************************************
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//
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// RD helper macros.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_RD_REG(n) \
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(AM_REG_GPIOn(0) + AM_REG_GPIO_RDA_O + (((uint32_t)(n) & 0x20) >> 3))
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#define AM_HAL_GPIO_RD_S(n) \
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((uint32_t)(n) % 32)
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#define AM_HAL_GPIO_RD_M(n) \
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((uint32_t) 0x1 << AM_HAL_GPIO_RD_S(n))
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#define AM_HAL_GPIO_RD(n) \
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AM_REGVAL(AM_HAL_GPIO_RD_REG(n))
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//*****************************************************************************
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//
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// WT helper macros.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_WT_REG(n) \
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(AM_REG_GPIOn(0) + AM_REG_GPIO_WTA_O + (((uint32_t)(n) & 0x20) >> 3))
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#define AM_HAL_GPIO_WT_S(n) \
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((uint32_t)(n) % 32)
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#define AM_HAL_GPIO_WT_M(n) \
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((uint32_t) 0x1 << AM_HAL_GPIO_WT_S(n))
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#define AM_HAL_GPIO_WT(n) \
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AM_REGVAL(AM_HAL_GPIO_WT_REG(n))
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//*****************************************************************************
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//
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// WTS helper macros.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_WTS_REG(n) \
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(AM_REG_GPIOn(0) + AM_REG_GPIO_WTSA_O + (((uint32_t)(n) & 0x20) >> 3))
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#define AM_HAL_GPIO_WTS_S(n) \
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((uint32_t)(n) % 32)
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#define AM_HAL_GPIO_WTS_M(n) \
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((uint32_t) 0x1 << AM_HAL_GPIO_WTS_S(n))
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#define AM_HAL_GPIO_WTS(n) \
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AM_REGVAL(AM_HAL_GPIO_WTS_REG(n))
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//*****************************************************************************
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//
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// WTC helper macros.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_WTC_REG(n) \
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(AM_REG_GPIOn(0) + AM_REG_GPIO_WTCA_O + (((uint32_t)(n) & 0x20) >> 3))
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#define AM_HAL_GPIO_WTC_S(n) \
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((uint32_t)(n) % 32)
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#define AM_HAL_GPIO_WTC_M(n) \
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((uint32_t) 0x1 << AM_HAL_GPIO_WTC_S(n))
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#define AM_HAL_GPIO_WTC(n) \
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AM_REGVAL(AM_HAL_GPIO_WTC_REG(n))
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//*****************************************************************************
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//
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// EN helper macros.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_EN_REG(n) \
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(AM_REG_GPIOn(0) + AM_REG_GPIO_ENA_O + (((uint32_t)(n) & 0x20) >> 3))
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#define AM_HAL_GPIO_EN_S(n) \
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((uint32_t)(n) % 32)
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#define AM_HAL_GPIO_EN_M(n) \
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((uint32_t) 0x1 << AM_HAL_GPIO_EN_S(n))
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#define AM_HAL_GPIO_EN(n) \
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AM_REGVAL(AM_HAL_GPIO_EN_REG(n))
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//*****************************************************************************
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//
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// ENS helper macros.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_ENS_REG(n) \
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(AM_REG_GPIOn(0) + AM_REG_GPIO_ENSA_O + (((uint32_t)(n) & 0x20) >> 3))
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#define AM_HAL_GPIO_ENS_S(n) \
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((uint32_t)(n) % 32)
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#define AM_HAL_GPIO_ENS_M(n) \
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((uint32_t) 0x1 << AM_HAL_GPIO_ENS_S(n))
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#define AM_HAL_GPIO_ENS(n) \
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AM_REGVAL(AM_HAL_GPIO_ENS_REG(n))
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//*****************************************************************************
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//
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// ENC helper macros.
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//
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//*****************************************************************************
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#define AM_HAL_GPIO_ENC_REG(n) \
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(AM_REG_GPIOn(0) + AM_REG_GPIO_ENCA_O + (((uint32_t)(n) & 0x20) >> 3))
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#define AM_HAL_GPIO_ENC_S(n) \
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((uint32_t)(n) % 32)
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#define AM_HAL_GPIO_ENC_M(n) \
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((uint32_t) 0x1 << AM_HAL_GPIO_ENC_S(n))
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#define AM_HAL_GPIO_ENC(n) \
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AM_REGVAL(AM_HAL_GPIO_ENC_REG(n))
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//*****************************************************************************
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//
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//! @brief Configure the GPIO PAD MUX & GPIO PIN Configurations
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//!
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//! @param ui32PinNumber - GPIO pin number.
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//! @param ui32Config - Configuration options.
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//!
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//! This function applies the settings for a single GPIO. For a list of valid
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//! options please see the top of this file (am_hal_gpio.h) and am_hal_pin.h.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define am_hal_gpio_pin_config(ui32PinNumber, ui32Config) \
|
||
|
|
do \
|
||
|
|
{ \
|
||
|
|
if ( (int32_t)(ui32PinNumber) < 0 ) \
|
||
|
|
{ \
|
||
|
|
break; \
|
||
|
|
} \
|
||
|
|
\
|
||
|
|
AM_REGn(GPIO, 0, PADKEY) = AM_REG_GPIO_PADKEY_KEYVAL; \
|
||
|
|
\
|
||
|
|
AM_HAL_GPIO_CFG_W(ui32PinNumber, ui32Config); \
|
||
|
|
AM_HAL_GPIO_PADREG_W(ui32PinNumber, ui32Config); \
|
||
|
|
\
|
||
|
|
AM_REGn(GPIO, 0, PADKEY) = 0; \
|
||
|
|
} \
|
||
|
|
while(0)
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Set the state of one GPIO polarity bit.
|
||
|
|
//!
|
||
|
|
//! @param ui32BitNum - GPIO number.
|
||
|
|
//! @param ui32Polarity - Desired state.
|
||
|
|
//!
|
||
|
|
//! This function sets the state of one GPIO polarity bit to a supplied value.
|
||
|
|
//! The ui32Polarity parameter should be one of the following values:
|
||
|
|
//!
|
||
|
|
//! AM_HAL_GPIO_FALLING
|
||
|
|
//! AM_HAL_GPIO_RISING
|
||
|
|
//!
|
||
|
|
//! @return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define am_hal_gpio_int_polarity_bit_set(ui32PinNumber, ui32Polarity) \
|
||
|
|
do \
|
||
|
|
{ \
|
||
|
|
if ( (int32_t)(ui32PinNumber) < 0 ) \
|
||
|
|
{ \
|
||
|
|
break; \
|
||
|
|
} \
|
||
|
|
\
|
||
|
|
AM_REGn(GPIO, 0, PADKEY) = AM_REG_GPIO_PADKEY_KEYVAL; \
|
||
|
|
AM_HAL_GPIO_POL_W(ui32PinNumber, ui32Polarity); \
|
||
|
|
AM_REGn(GPIO, 0, PADKEY) = 0; \
|
||
|
|
} \
|
||
|
|
while(0)
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Get the state of one GPIO from the INPUT READ REGISTER.
|
||
|
|
//!
|
||
|
|
//! @param ui32BitNum - GPIO number.
|
||
|
|
//!
|
||
|
|
//! This function retrieves the state of one GPIO from the INPUT READ
|
||
|
|
//! REGISTER.
|
||
|
|
//!
|
||
|
|
//! @return the state for the requested GPIO.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define am_hal_gpio_input_bit_read(ui32BitNum) \
|
||
|
|
((AM_HAL_GPIO_RD(ui32BitNum) & AM_HAL_GPIO_RD_M(ui32BitNum)) != 0)
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Get the state of one GPIO in the DATA OUTPUT REGISTER
|
||
|
|
//!
|
||
|
|
//! @param ui32BitNum - GPIO number.
|
||
|
|
//!
|
||
|
|
//! This function retrieves the state of one GPIO in the DATA OUTPUT REGISTER.
|
||
|
|
//!
|
||
|
|
//! @return the state for the requested GPIO or -1 for error.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define am_hal_gpio_out_bit_read(ui32BitNum) \
|
||
|
|
((AM_HAL_GPIO_WT(ui32BitNum) & AM_HAL_GPIO_WT_M(ui32BitNum)) != 0)
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Set the output state high for one GPIO.
|
||
|
|
//!
|
||
|
|
//! @param ui32BitNum - GPIO number.
|
||
|
|
//!
|
||
|
|
//! This function sets the output state to high for one GPIO.
|
||
|
|
//!
|
||
|
|
//! @return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define am_hal_gpio_out_bit_set(ui32BitNum) \
|
||
|
|
AM_HAL_GPIO_WTS(ui32BitNum) = AM_HAL_GPIO_WTS_M(ui32BitNum)
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Sets the output state to low for one GPIO.
|
||
|
|
//!
|
||
|
|
//! @param ui32BitNum - GPIO number.
|
||
|
|
//!
|
||
|
|
//! This function sets the output state to low for one GPIO.
|
||
|
|
//!
|
||
|
|
//! @return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define am_hal_gpio_out_bit_clear(ui32BitNum) \
|
||
|
|
AM_HAL_GPIO_WTC(ui32BitNum) = AM_HAL_GPIO_WTC_M(ui32BitNum)
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Sets the output state to ui32Value for one GPIO.
|
||
|
|
//!
|
||
|
|
//! @param ui32BitNum - GPIO number.
|
||
|
|
//! @param ui32Value - Desired output state.
|
||
|
|
//!
|
||
|
|
//! This function sets the output state to ui32Value for one GPIO.
|
||
|
|
//!
|
||
|
|
//! @return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define am_hal_gpio_out_bit_replace(ui32BitNum, ui32Value) \
|
||
|
|
AM_HAL_GPIO_WT(ui32BitNum) = ui32Value ? \
|
||
|
|
(AM_HAL_GPIO_WT(ui32BitNum) | AM_HAL_GPIO_WT_M(ui32BitNum)) : \
|
||
|
|
(AM_HAL_GPIO_WT(ui32BitNum) & ~AM_HAL_GPIO_WT_M(ui32BitNum))
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Toggle the output state of one GPIO.
|
||
|
|
//!
|
||
|
|
//! @param ui32BitNum - GPIO number.
|
||
|
|
//!
|
||
|
|
//! This function toggles the output state of one GPIO.
|
||
|
|
//!
|
||
|
|
//! @return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define am_hal_gpio_out_bit_toggle(ui32BitNum) \
|
||
|
|
AM_HAL_GPIO_WT(ui32BitNum) = (AM_HAL_GPIO_WT(ui32BitNum) ^ \
|
||
|
|
AM_HAL_GPIO_WT_M(ui32BitNum))
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Sets the output enable for one GPIO.
|
||
|
|
//!
|
||
|
|
//! @param ui32BitNum - GPIO number.
|
||
|
|
//!
|
||
|
|
//! This function sets the output enable for one GPIO.
|
||
|
|
//!
|
||
|
|
//! @return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define am_hal_gpio_out_enable_bit_set(ui32BitNum) \
|
||
|
|
AM_HAL_GPIO_ENS(ui32BitNum) = AM_HAL_GPIO_ENS_M(ui32BitNum)
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Clears the output enable for one GPIO.
|
||
|
|
//!
|
||
|
|
//! @param ui32BitNum - GPIO number.
|
||
|
|
//!
|
||
|
|
//! This function clears the output enable for one GPIO.
|
||
|
|
//!
|
||
|
|
//! @return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define am_hal_gpio_out_enable_bit_clear(ui32BitNum) \
|
||
|
|
AM_HAL_GPIO_ENC(ui32BitNum) = AM_HAL_GPIO_ENC_M(ui32BitNum)
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Function pointer type for GPIO interrupt handlers.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
typedef void (*am_hal_gpio_handler_t)(void);
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// External function prototypes
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#ifdef __cplusplus
|
||
|
|
extern "C"
|
||
|
|
{
|
||
|
|
#endif
|
||
|
|
|
||
|
|
extern uint32_t am_hal_gpio_pin_config_read(uint32_t ui32PinNumber);
|
||
|
|
extern uint64_t am_hal_gpio_input_read(void);
|
||
|
|
extern uint64_t am_hal_gpio_out_read(void);
|
||
|
|
extern uint32_t am_hal_gpio_out_enable_bit_get(uint32_t ui32BitNum);
|
||
|
|
extern uint64_t am_hal_gpio_out_enable_get(void);
|
||
|
|
extern void am_hal_gpio_int_enable(uint64_t ui64Interrupt);
|
||
|
|
extern uint64_t am_hal_gpio_int_enable_get(void);
|
||
|
|
extern void am_hal_gpio_int_disable(uint64_t ui64Interrupt);
|
||
|
|
extern void am_hal_gpio_int_clear(uint64_t ui64Interrupt);
|
||
|
|
extern void am_hal_gpio_int_set(uint64_t ui64Interrupt);
|
||
|
|
extern uint64_t am_hal_gpio_int_status_get(bool bEnabledOnly);
|
||
|
|
extern void am_hal_gpio_int_service(uint64_t ui64Status);
|
||
|
|
extern void am_hal_gpio_int_register(uint32_t ui32GPIONumber,
|
||
|
|
am_hal_gpio_handler_t pfnHandler);
|
||
|
|
|
||
|
|
extern bool am_hal_gpio_int_polarity_bit_get(uint32_t ui32BitNum);
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif // AM_HAL_GPIO_H
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// End Doxygen group.
|
||
|
|
//! @}
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|