533 lines
18 KiB
C
533 lines
18 KiB
C
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//*****************************************************************************
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//
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//! @file am_uart_boot_handlers.c
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//!
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//! @brief Boot related functions for the UART interface.
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//!
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//! This file contains the main state machine for handling boot commands via
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//! the UART interface.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2020, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// Third party software included in this distribution is subject to the
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// additional license terms as defined in the /docs/licenses directory.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.4.2 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#include "am_mcu_apollo.h"
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#include "am_bsp.h"
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#include "am_util.h"
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#include "am_multi_boot_private.h"
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//*****************************************************************************
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//
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// UART configuration settings.
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//
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//*****************************************************************************
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am_hal_uart_config_t g_sUartConfig =
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{
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.ui32BaudRate = 115200,
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.ui32DataBits = AM_HAL_UART_DATA_BITS_8,
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.bTwoStopBits = false,
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.ui32Parity = AM_HAL_UART_PARITY_NONE,
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.ui32FlowCtrl = AM_HAL_UART_FLOW_CTRL_NONE,
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};
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//
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//
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#define MAX_CHUNK_SIZE 512 // Support max 512B chunks
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#define MAX_BUFFER (MAX_CHUNK_SIZE + 8)
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volatile uint32_t ui32_serial_status;
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volatile unsigned char cRecChar, RX_FIFO_FULL, RX_FIFO_EMPTY;
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volatile unsigned char uart_RX_buffer[MAX_BUFFER];
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volatile uint32_t uart_RX_cnt, uart_RX_head, uart_RX_tail;
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// ************************************
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unsigned char cTxChar, TX_FIFO_FULL, TX_FIFO_EMPTY;
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unsigned char uart_TX_buffer[8];
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unsigned char uart_TX_cnt, uart_TX_head, uart_TX_tail;
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// ************************************
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uint32_t command;
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uint32_t packet_cnt, pkt_size;
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volatile bool g_bUartImageValid = false;
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//
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void
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ser_out(uint32_t ui32Module, unsigned char data)
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{
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AM_REGn(UART, ui32Module, DR) = data;
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while ( AM_BFRn(UART, ui32Module, FR, TXFF) );
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}
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//*****************************************************************************
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//
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//! @brief Configure the UART port for UART boot
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//!
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//! @param i32Module is UART port to configure.
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//! @param ui32BaudRate is requested baud rate.
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//!
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//! This function configures the UART port
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//!
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//! @return none
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//
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//*****************************************************************************
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void
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am_multiboot_setup_serial(int32_t i32Module, uint32_t ui32BaudRate)
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{
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uint32_t uartInt = AM_HAL_INTERRUPT_UART;
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command = 0;
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uart_RX_head = uart_RX_tail = uart_RX_cnt = 0;
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RX_FIFO_FULL = 0; // check serial FIFO operation
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RX_FIFO_EMPTY = 1;
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packet_cnt = 0xff;
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//
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// Power on the selected UART
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//
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am_hal_uart_pwrctrl_enable(i32Module);
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//
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// Start the UART interface, apply the desired configuration settings, and
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// enable the FIFOs.
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//
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am_hal_uart_clock_enable(i32Module);
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//
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// Disable the UART before configuring it.
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//
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am_hal_uart_disable(i32Module);
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//
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// Configure the UART.
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//
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g_sUartConfig.ui32BaudRate = ui32BaudRate;
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am_hal_uart_config(i32Module, &g_sUartConfig);
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//
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// Enable the UART FIFO.
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//
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am_hal_uart_fifo_config(i32Module,
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AM_HAL_UART_TX_FIFO_3_4 | AM_HAL_UART_RX_FIFO_3_4);
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// am_util_delay_ms(100);
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//
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// Enable the UART.
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//
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am_hal_uart_enable(i32Module);
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am_hal_uart_int_clear(i32Module, AM_HAL_UART_INT_RX | AM_HAL_UART_INT_RX_TMOUT);
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am_hal_uart_int_enable(i32Module, AM_HAL_UART_INT_RX | AM_HAL_UART_INT_RX_TMOUT);
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#ifndef AM_PART_APOLLO
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if (i32Module == 1)
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{
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uartInt = AM_HAL_INTERRUPT_UART1;
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}
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#endif
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am_hal_interrupt_enable(uartInt);
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}
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//*****************************************************************************
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//
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//! @brief Multiboot protocol handler for UART implemented in ISR
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//!
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//! @param i32Module is UART port being used for bootloader.
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//!
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//! This function should be invoked from respective UART ISR.
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//!
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//! @return none.
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//
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//*****************************************************************************
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void
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am_multiboot_uart_isr_handler(uint32_t ui32Module)
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{
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uint32_t *rx_pui32Packet;
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unsigned char send_byte_cnt, flush = 0;
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uint32_t cnt = 0;
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uint32_t *tx_pui32Packet;
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uint32_t ui32Status;
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uint8_t rxData;
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//
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// Check to see what caused this interrupt, then clear the bit from the
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// interrupt register.
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//
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ui32Status = am_hal_uart_int_status_get(ui32Module, false);
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am_hal_uart_int_clear(ui32Module, ui32Status);
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// ui32_serial_status = ui32Status;
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//
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// Service the uart FIFO.
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//
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RX_FIFO_EMPTY = 0;
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// Read the UART FIFO till we have data
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while ( !AM_BFRn(UART, ui32Module, FR, RXFE) )
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{
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if ( uart_RX_head == MAX_BUFFER )
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{
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// We should never reach here!
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RX_FIFO_FULL = 1;
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tx_pui32Packet = (uint32_t *) uart_TX_buffer;
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//
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// Bad packet; Send back an error.
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//
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tx_pui32Packet[0] = AM_BOOTLOADER_ERROR;
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flush = 1;
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send_byte_cnt = 4;
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break;
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}
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rxData = AM_REGn(UART, ui32Module, DR);
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uart_RX_buffer[uart_RX_head++] = rxData;
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uart_RX_cnt++;
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cnt++;
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if ( uart_RX_cnt == 4 ) // cmd received, wait for parameters
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{
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command = uart_RX_buffer[0];
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switch (command)
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{
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case AM_BOOTLOADER_NEW_IMAGE:
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#ifndef MULTIBOOT_SECURE
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packet_cnt = 16;
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#endif
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break;
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case AM_BOOTLOADER_SET_OVERRIDE_CMD:
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packet_cnt = 12;
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break;
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case AM_BOOTLOADER_NEW_PACKET:
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// packet_cnt = pkt_size+8;
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break;
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case AM_BOOTLOADER_RESET:
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packet_cnt = 4;
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break;
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case AM_BOOTLOADER_BL_VERSION_CMD:
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packet_cnt = 4;
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break;
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case AM_BOOTLOADER_ACK_CMD:
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packet_cnt = 4;
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break;
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case AM_BOOTLOADER_NAK_CMD:
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packet_cnt = 4;
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break;
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case AM_BOOTLOADER_RESTART:
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packet_cnt = 4;
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break;
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default:
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// Unknown command
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packet_cnt = 4;
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break;
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}
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}
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if ( (command == AM_BOOTLOADER_NEW_PACKET) && (uart_RX_cnt == 8) )
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{
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pkt_size = *(uint32_t *) (&uart_RX_buffer[4]);
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packet_cnt = pkt_size + 8;
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}
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#ifdef MULTIBOOT_SECURE
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if ( (command == AM_BOOTLOADER_NEW_IMAGE) && (uart_RX_cnt == 20) )
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{
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pkt_size = *(uint32_t *) (&uart_RX_buffer[16]);
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packet_cnt = pkt_size + 20;
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}
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#endif
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if ( (uart_RX_cnt >= 4) && (uart_RX_cnt == packet_cnt) )
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{
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rx_pui32Packet = (uint32_t *) uart_RX_buffer;
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tx_pui32Packet = (uint32_t *) uart_TX_buffer;
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switch (rx_pui32Packet[0])
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{
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case AM_BOOTLOADER_NEW_IMAGE:
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//
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// Parse the image packet, and store the result to the global
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// image structure.
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//
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g_bUartImageValid = image_start_packet_read(&g_sImage,
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(uint32_t *) uart_RX_buffer);
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//
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// Make sure the image packet had reasonable contents. If it
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// didn't, we need to let the host know.
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//
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if ( g_bUartImageValid )
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{
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//
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// Good image; Send back a "READY" packet.
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//
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tx_pui32Packet[0] = AM_BOOTLOADER_READY;
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}
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else
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{
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//
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// Bad image; Send back an error.
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//
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tx_pui32Packet[0] = AM_BOOTLOADER_ERROR;
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}
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flush = 1;
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send_byte_cnt = 4;
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break;
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case AM_BOOTLOADER_SET_OVERRIDE_CMD:
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//
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// Set the override GPIO settings based on the packet
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// information.
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//
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g_sImage.ui32OverrideGPIO = rx_pui32Packet[1];
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g_sImage.ui32OverridePolarity = rx_pui32Packet[2];
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//
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// Send back a "READY" packet.
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//
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tx_pui32Packet[0] = AM_BOOTLOADER_READY;
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flush = 1;
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send_byte_cnt = 4;
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break;
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case AM_BOOTLOADER_NEW_PACKET:
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//
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// Only take new packets if our image structure is valid.
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//
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if ( !g_bUartImageValid )
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{
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tx_pui32Packet[0] = AM_BOOTLOADER_ERROR;
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break;
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}
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//
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// Parse the rest of the packet sitting in the IOS LRAM.
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//
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image_data_packet_read((uint8_t *)(uart_RX_buffer + 8),
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*((uint32_t *)(uart_RX_buffer + 4)));
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//
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// If this packet completed the image...
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//
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if ( g_ui32BytesReceived == g_sImage.ui32NumBytes )
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{
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#ifdef MULTIBOOT_SECURE
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if ( (g_ui32CRC != g_sImage.ui32CRC) || multiboot_secure_verify(&g_sImage.ui32CRC) )
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{
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tx_pui32Packet[0] = AM_BOOTLOADER_BAD_CRC;
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}
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#else
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if ( g_ui32CRC != g_sImage.ui32CRC )
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{
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tx_pui32Packet[0] = AM_BOOTLOADER_BAD_CRC;
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}
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#endif
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else
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{
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// Protect (and optionally write if stored in SRAM)
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// image in flash now as it has been validated now
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program_image(g_sImage.bEncrypted);
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// Validate the flash contents of a boot image to make
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// sure it's safe to run
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if ( am_bootloader_flash_check(&g_sImage) )
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{
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tx_pui32Packet[0] = AM_BOOTLOADER_IMAGE_COMPLETE;
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}
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else
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{
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tx_pui32Packet[0] = AM_BOOTLOADER_ERROR;
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}
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}
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}
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else
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{
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//
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// If this wasn't the end of the image, just send back a
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||
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// "READY" packet.
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||
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//
|
||
|
|
tx_pui32Packet[0] = AM_BOOTLOADER_READY;
|
||
|
|
}
|
||
|
|
|
||
|
|
flush = 1;
|
||
|
|
send_byte_cnt = 4;
|
||
|
|
|
||
|
|
break;
|
||
|
|
|
||
|
|
case AM_BOOTLOADER_RESET:
|
||
|
|
if ( USE_FLAG_PAGE )
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Write the flag page.
|
||
|
|
//
|
||
|
|
am_bootloader_flag_page_update(&g_sImage,
|
||
|
|
(uint32_t *)FLAG_PAGE_LOCATION);
|
||
|
|
}
|
||
|
|
#ifdef MULTIBOOT_SECURE
|
||
|
|
wipe_sram();
|
||
|
|
#endif
|
||
|
|
|
||
|
|
case AM_BOOTLOADER_RESTART:
|
||
|
|
//
|
||
|
|
// Perform a software reset.
|
||
|
|
//
|
||
|
|
#if AM_APOLLO3_RESET
|
||
|
|
am_hal_reset_control(AM_HAL_RESET_CONTROL_SWPOI);
|
||
|
|
#else // AM_APOLLO3_RESET
|
||
|
|
am_hal_reset_poi();
|
||
|
|
#endif // AM_APOLLO3_RESET
|
||
|
|
|
||
|
|
//
|
||
|
|
// Wait for the reset to take effect.
|
||
|
|
//
|
||
|
|
while (1);
|
||
|
|
|
||
|
|
case AM_BOOTLOADER_BL_VERSION_CMD:
|
||
|
|
//
|
||
|
|
// Respond with the version number.
|
||
|
|
//
|
||
|
|
tx_pui32Packet[0] = AM_BOOTLOADER_BL_VERSION;
|
||
|
|
tx_pui32Packet[1] = AM_BOOTLOADER_VERSION_NUM;
|
||
|
|
|
||
|
|
flush = 1;
|
||
|
|
send_byte_cnt = 8;
|
||
|
|
break;
|
||
|
|
|
||
|
|
case AM_BOOTLOADER_ACK_CMD:
|
||
|
|
case AM_BOOTLOADER_NAK_CMD:
|
||
|
|
break;
|
||
|
|
|
||
|
|
default:
|
||
|
|
// Error
|
||
|
|
tx_pui32Packet[0] = AM_BOOTLOADER_ERROR;
|
||
|
|
flush = 1;
|
||
|
|
send_byte_cnt = 4;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
if ( flush )
|
||
|
|
{
|
||
|
|
uart_TX_tail = 0;
|
||
|
|
|
||
|
|
for ( cnt = 0; cnt < send_byte_cnt; cnt++ )
|
||
|
|
{
|
||
|
|
ser_out(ui32Module, uart_TX_buffer[uart_TX_tail++]);
|
||
|
|
}
|
||
|
|
command = 0;
|
||
|
|
uart_RX_head = uart_RX_tail = uart_RX_cnt = 0;
|
||
|
|
RX_FIFO_FULL = 0; // check serial FIFO operation
|
||
|
|
RX_FIFO_EMPTY = 1;
|
||
|
|
flush = 0;
|
||
|
|
send_byte_cnt = 0;
|
||
|
|
packet_cnt = 0xff;
|
||
|
|
}
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief implementation to detect the baudrate configuration from host
|
||
|
|
//!
|
||
|
|
//! @param ui32RxPin is the Pin used for UART-Rx
|
||
|
|
//!
|
||
|
|
//! This function implements a simple algorithm to compute the host baud rate.
|
||
|
|
//! It expects host to send 0x55 on the UART. Baudrate is computed based on the
|
||
|
|
//! timing of the bits.
|
||
|
|
//! It assumes that systick is configured and operational at the core frequency
|
||
|
|
//!
|
||
|
|
//! @return the computed baud rate.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
uint32_t am_multiboot_uart_detect_baudrate(uint32_t ui32RxPin)
|
||
|
|
{
|
||
|
|
uint32_t ui32Start, ui32End, ui32Counts, ui32BaudRate;
|
||
|
|
|
||
|
|
//
|
||
|
|
// Check the time, and record this as the "start" time.
|
||
|
|
//
|
||
|
|
// We need to hit this register as early as possible, so we are skipping
|
||
|
|
// all of the normal logic that checks to make sure we are responding to
|
||
|
|
// the right GPIO. In the interest of time, we will just assume that this
|
||
|
|
// interrupt is coming from the UART RX pin.
|
||
|
|
//
|
||
|
|
ui32Start = am_hal_systick_count();
|
||
|
|
|
||
|
|
//
|
||
|
|
// Wait for exactly 9 edges on the UART RX pin. This corresponds to the
|
||
|
|
// number of edges in the byte 0x55 after the start bit. Using a simple
|
||
|
|
// polling approach here gives us the best possible chance to catch every
|
||
|
|
// single edge.
|
||
|
|
//
|
||
|
|
while ( !am_hal_gpio_input_bit_read(ui32RxPin) );
|
||
|
|
while ( am_hal_gpio_input_bit_read(ui32RxPin) );
|
||
|
|
while ( !am_hal_gpio_input_bit_read(ui32RxPin) );
|
||
|
|
while ( am_hal_gpio_input_bit_read(ui32RxPin) );
|
||
|
|
while ( !am_hal_gpio_input_bit_read(ui32RxPin) );
|
||
|
|
while ( am_hal_gpio_input_bit_read(ui32RxPin) );
|
||
|
|
while ( !am_hal_gpio_input_bit_read(ui32RxPin) );
|
||
|
|
while ( am_hal_gpio_input_bit_read(ui32RxPin) );
|
||
|
|
while ( !am_hal_gpio_input_bit_read(ui32RxPin) );
|
||
|
|
|
||
|
|
//
|
||
|
|
// Record the "end" time.
|
||
|
|
//
|
||
|
|
ui32End = am_hal_systick_count();
|
||
|
|
am_hal_systick_stop();
|
||
|
|
|
||
|
|
//
|
||
|
|
// At this point, the timing-critical portion of the interrupt handler is
|
||
|
|
// complete, and we are free to clean up our interrupt status. We only
|
||
|
|
// intend to perform the automatic baud-rate detection once, so we will go
|
||
|
|
// ahead and disable the interrupt on the UART RX pin now.
|
||
|
|
//
|
||
|
|
am_hal_gpio_int_disable(AM_HAL_GPIO_BIT(ui32RxPin));
|
||
|
|
am_hal_gpio_int_clear(AM_HAL_GPIO_BIT(ui32RxPin));
|
||
|
|
|
||
|
|
//
|
||
|
|
// Check to see how long those nine edges took to arrive. This should
|
||
|
|
// correspond to exactly nine bit-times of UART traffic from the host. From
|
||
|
|
// there, we can use the speed of the processor (which is known) to
|
||
|
|
// calculate the host's baud rate.
|
||
|
|
//
|
||
|
|
ui32Counts = ui32Start - ui32End;
|
||
|
|
ui32BaudRate = AM_HAL_CLKGEN_FREQ_MAX_HZ * 9 / ui32Counts;
|
||
|
|
return ui32BaudRate;
|
||
|
|
}
|