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Apply new naming rule to all projects except Vp9 (#5407)

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TSRBerry 2023-06-28 01:18:19 +02:00 committed by GitHub
parent b186ec9fc5
commit fbaf62c230
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42 changed files with 334 additions and 335 deletions
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10
src/ARMeilleure/CodeGen/X86/CodeGenerator.cs
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@ -1296,11 +1296,11 @@ namespace ARMeilleure.CodeGen.X86
}
else
{
const byte mask = 0b01_00_11_10;
const byte Mask = 0b01_00_11_10;
context.Assembler.Pshufd(src1, src1, mask);
context.Assembler.Pshufd(src1, src1, Mask);
context.Assembler.Movq(dest, src1);
context.Assembler.Pshufd(src1, src1, mask);
context.Assembler.Pshufd(src1, src1, Mask);
}
}
else
@ -1853,9 +1853,9 @@ namespace ARMeilleure.CodeGen.X86
// that the OS will map all pages that we'll use. We do that by
// doing a dummy read on those pages, forcing a page fault and
// the OS to map them. If they are already mapped, nothing happens.
const int pageMask = PageSize - 1;
const int PageMask = PageSize - 1;
size = (size + pageMask) & ~pageMask;
size = (size + PageMask) & ~PageMask;
Operand rsp = Register(X86Register.Rsp);
Operand temp = Register(CallingConvention.GetIntReturnRegister());

4
src/ARMeilleure/Decoders/Decoder.cs
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@ -304,9 +304,9 @@ namespace ARMeilleure.Decoders
}
else if (opCode is IOpCode32MemMult opMemMult)
{
const int pcMask = 1 << RegisterAlias.Aarch32Pc;
const int PCMask = 1 << RegisterAlias.Aarch32Pc;
rt = (opMemMult.RegisterMask & pcMask) != 0 ? RegisterAlias.Aarch32Pc : 0;
rt = (opMemMult.RegisterMask & PCMask) != 0 ? RegisterAlias.Aarch32Pc : 0;
rn = opMemMult.Rn;
wBack = opMemMult.PostOffset != 0;
isLoad = opMemMult.IsLoad;

6
src/ARMeilleure/Decoders/Optimizations/TailCallRemover.cs
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@ -17,7 +17,7 @@ namespace ARMeilleure.Decoders.Optimizations
throw new InvalidOperationException("Function entry point is not contained in a block.");
}
const ulong allowance = 4;
const ulong Allowance = 4;
Block entryBlock = blocks[entryBlockId];
@ -31,7 +31,7 @@ namespace ARMeilleure.Decoders.Optimizations
{
Block block = blocks[i];
if (endBlock.EndAddress < block.Address - allowance)
if (endBlock.EndAddress < block.Address - Allowance)
{
break; // End of contiguous function.
}
@ -44,7 +44,7 @@ namespace ARMeilleure.Decoders.Optimizations
{
Block block = blocks[i];
if (startBlock.Address > block.EndAddress + allowance)
if (startBlock.Address > block.EndAddress + Allowance)
{
break; // End of contiguous function.
}

32
src/ARMeilleure/Instructions/InstEmitSimdHelper.cs
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@ -1299,17 +1299,17 @@ namespace ARMeilleure.Instructions
Debug.Assert((op.Size & 1) == 0 && op.RegisterSize == RegisterSize.Simd128);
const int sm0 = 0 << 6 | 0 << 4 | 0 << 2 | 0 << 0;
const int sm1 = 1 << 6 | 1 << 4 | 1 << 2 | 1 << 0;
const int sm2 = 2 << 6 | 2 << 4 | 2 << 2 | 2 << 0;
const int sm3 = 3 << 6 | 3 << 4 | 3 << 2 | 3 << 0;
const int SM0 = 0 << 6 | 0 << 4 | 0 << 2 | 0 << 0;
const int SM1 = 1 << 6 | 1 << 4 | 1 << 2 | 1 << 0;
const int SM2 = 2 << 6 | 2 << 4 | 2 << 2 | 2 << 0;
const int SM3 = 3 << 6 | 3 << 4 | 3 << 2 | 3 << 0;
Operand nCopy = context.Copy(GetVec(op.Rn));
Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm0));
Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm1));
Operand part2 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm2));
Operand part3 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm3));
Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(SM0));
Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(SM1));
Operand part2 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(SM2));
Operand part3 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(SM3));
Operand res = emit(emit(part0, part1), emit(part2, part3));
@ -1340,13 +1340,13 @@ namespace ARMeilleure.Instructions
if ((op.Size & 1) == 0)
{
const int sm0 = 2 << 6 | 2 << 4 | 2 << 2 | 0 << 0;
const int sm1 = 2 << 6 | 2 << 4 | 2 << 2 | 1 << 0;
const int SM0 = 2 << 6 | 2 << 4 | 2 << 2 | 0 << 0;
const int SM1 = 2 << 6 | 2 << 4 | 2 << 2 | 1 << 0;
Operand zeroN = context.VectorZeroUpper64(n);
op0 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(sm0));
op1 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(sm1));
op0 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(SM0));
op1 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(SM1));
}
else /* if ((op.Size & 1) == 1) */
{
@ -1412,11 +1412,11 @@ namespace ARMeilleure.Instructions
}
else /* if (op.RegisterSize == RegisterSize.Simd128) */
{
const int sm0 = 2 << 6 | 0 << 4 | 2 << 2 | 0 << 0;
const int sm1 = 3 << 6 | 1 << 4 | 3 << 2 | 1 << 0;
const int SM0 = 2 << 6 | 0 << 4 | 2 << 2 | 0 << 0;
const int SM1 = 3 << 6 | 1 << 4 | 3 << 2 | 1 << 0;
Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(sm0));
Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(sm1));
Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(SM0));
Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(SM1));
context.Copy(GetVec(op.Rd), emit(part0, part1));
}

52
src/ARMeilleure/Instructions/InstEmitSimdLogical.cs
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@ -408,7 +408,7 @@ namespace ARMeilleure.Instructions
if (Optimizations.UseGfni)
{
const long bitMatrix =
const long BitMatrix =
(0b10000000L << 56) |
(0b01000000L << 48) |
(0b00100000L << 40) |
@ -418,7 +418,7 @@ namespace ARMeilleure.Instructions
(0b00000010L << 8) |
(0b00000001L << 0);
Operand vBitMatrix = X86GetAllElements(context, bitMatrix);
Operand vBitMatrix = X86GetAllElements(context, BitMatrix);
Operand res = context.AddIntrinsic(Intrinsic.X86Gf2p8affineqb, GetVec(op.Rn), vBitMatrix, Const(0));
@ -469,12 +469,12 @@ namespace ARMeilleure.Instructions
Operand n = GetVec(op.Rn);
const long maskE0 = 06L << 56 | 07L << 48 | 04L << 40 | 05L << 32 | 02L << 24 | 03L << 16 | 00L << 8 | 01L << 0;
const long maskE1 = 14L << 56 | 15L << 48 | 12L << 40 | 13L << 32 | 10L << 24 | 11L << 16 | 08L << 8 | 09L << 0;
const long MaskE0 = 06L << 56 | 07L << 48 | 04L << 40 | 05L << 32 | 02L << 24 | 03L << 16 | 00L << 8 | 01L << 0;
const long MaskE1 = 14L << 56 | 15L << 48 | 12L << 40 | 13L << 32 | 10L << 24 | 11L << 16 | 08L << 8 | 09L << 0;
Operand mask = X86GetScalar(context, maskE0);
Operand mask = X86GetScalar(context, MaskE0);
mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
Operand res = context.AddIntrinsic(Intrinsic.X86Pshufb, n, mask);
@ -503,21 +503,21 @@ namespace ARMeilleure.Instructions
if (op.Size == 0)
{
const long maskE0 = 04L << 56 | 05L << 48 | 06L << 40 | 07L << 32 | 00L << 24 | 01L << 16 | 02L << 8 | 03L << 0;
const long maskE1 = 12L << 56 | 13L << 48 | 14L << 40 | 15L << 32 | 08L << 24 | 09L << 16 | 10L << 8 | 11L << 0;
const long MaskE0 = 04L << 56 | 05L << 48 | 06L << 40 | 07L << 32 | 00L << 24 | 01L << 16 | 02L << 8 | 03L << 0;
const long MaskE1 = 12L << 56 | 13L << 48 | 14L << 40 | 15L << 32 | 08L << 24 | 09L << 16 | 10L << 8 | 11L << 0;
mask = X86GetScalar(context, maskE0);
mask = X86GetScalar(context, MaskE0);
mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
}
else /* if (op.Size == 1) */
{
const long maskE0 = 05L << 56 | 04L << 48 | 07L << 40 | 06L << 32 | 01L << 24 | 00L << 16 | 03L << 8 | 02L << 0;
const long maskE1 = 13L << 56 | 12L << 48 | 15L << 40 | 14L << 32 | 09L << 24 | 08L << 16 | 11L << 8 | 10L << 0;
const long MaskE0 = 05L << 56 | 04L << 48 | 07L << 40 | 06L << 32 | 01L << 24 | 00L << 16 | 03L << 8 | 02L << 0;
const long MaskE1 = 13L << 56 | 12L << 48 | 15L << 40 | 14L << 32 | 09L << 24 | 08L << 16 | 11L << 8 | 10L << 0;
mask = X86GetScalar(context, maskE0);
mask = X86GetScalar(context, MaskE0);
mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
}
Operand res = context.AddIntrinsic(Intrinsic.X86Pshufb, n, mask);
@ -547,30 +547,30 @@ namespace ARMeilleure.Instructions
if (op.Size == 0)
{
const long maskE0 = 00L << 56 | 01L << 48 | 02L << 40 | 03L << 32 | 04L << 24 | 05L << 16 | 06L << 8 | 07L << 0;
const long maskE1 = 08L << 56 | 09L << 48 | 10L << 40 | 11L << 32 | 12L << 24 | 13L << 16 | 14L << 8 | 15L << 0;
const long MaskE0 = 00L << 56 | 01L << 48 | 02L << 40 | 03L << 32 | 04L << 24 | 05L << 16 | 06L << 8 | 07L << 0;
const long MaskE1 = 08L << 56 | 09L << 48 | 10L << 40 | 11L << 32 | 12L << 24 | 13L << 16 | 14L << 8 | 15L << 0;
mask = X86GetScalar(context, maskE0);
mask = X86GetScalar(context, MaskE0);
mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
}
else if (op.Size == 1)
{
const long maskE0 = 01L << 56 | 00L << 48 | 03L << 40 | 02L << 32 | 05L << 24 | 04L << 16 | 07L << 8 | 06L << 0;
const long maskE1 = 09L << 56 | 08L << 48 | 11L << 40 | 10L << 32 | 13L << 24 | 12L << 16 | 15L << 8 | 14L << 0;
const long MaskE0 = 01L << 56 | 00L << 48 | 03L << 40 | 02L << 32 | 05L << 24 | 04L << 16 | 07L << 8 | 06L << 0;
const long MaskE1 = 09L << 56 | 08L << 48 | 11L << 40 | 10L << 32 | 13L << 24 | 12L << 16 | 15L << 8 | 14L << 0;
mask = X86GetScalar(context, maskE0);
mask = X86GetScalar(context, MaskE0);
mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
}
else /* if (op.Size == 2) */
{
const long maskE0 = 03L << 56 | 02L << 48 | 01L << 40 | 00L << 32 | 07L << 24 | 06L << 16 | 05L << 8 | 04L << 0;
const long maskE1 = 11L << 56 | 10L << 48 | 09L << 40 | 08L << 32 | 15L << 24 | 14L << 16 | 13L << 8 | 12L << 0;
const long MaskE0 = 03L << 56 | 02L << 48 | 01L << 40 | 00L << 32 | 07L << 24 | 06L << 16 | 05L << 8 | 04L << 0;
const long MaskE1 = 11L << 56 | 10L << 48 | 09L << 40 | 08L << 32 | 15L << 24 | 14L << 16 | 13L << 8 | 12L << 0;
mask = X86GetScalar(context, maskE0);
mask = X86GetScalar(context, MaskE0);
mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
mask = EmitVectorInsert(context, mask, Const(MaskE1), 1, 3);
}
Operand res = context.AddIntrinsic(Intrinsic.X86Pshufb, n, mask);

66
src/ARMeilleure/Instructions/SoftFloat.cs
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@ -175,10 +175,10 @@ namespace ARMeilleure.Instructions
public static ushort FPRoundCv(double real, ExecutionContext context)
{
const int minimumExp = -14;
const int MinimumExp = -14;
const int e = 5;
const int f = 10;
const int E = 5;
const int F = 10;
bool sign;
double mantissa;
@ -208,15 +208,15 @@ namespace ARMeilleure.Instructions
exponent++;
}
uint biasedExp = (uint)Math.Max(exponent - minimumExp + 1, 0);
uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
if (biasedExp == 0u)
{
mantissa /= Math.Pow(2d, minimumExp - exponent);
mantissa /= Math.Pow(2d, MinimumExp - exponent);
}
uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, f));
double error = mantissa * Math.Pow(2d, f) - (double)intMant;
uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, F));
double error = mantissa * Math.Pow(2d, F) - (double)intMant;
if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
{
@ -256,12 +256,12 @@ namespace ARMeilleure.Instructions
{
intMant++;
if (intMant == 1u << f)
if (intMant == 1u << F)
{
biasedExp = 1u;
}
if (intMant == 1u << (f + 1))
if (intMant == 1u << (F + 1))
{
biasedExp++;
intMant >>= 1;
@ -272,7 +272,7 @@ namespace ARMeilleure.Instructions
if ((context.Fpcr & FPCR.Ahp) == 0)
{
if (biasedExp >= (1u << e) - 1u)
if (biasedExp >= (1u << E) - 1u)
{
resultBits = overflowToInf ? FPInfinity(sign) : FPMaxNormal(sign);
@ -287,7 +287,7 @@ namespace ARMeilleure.Instructions
}
else
{
if (biasedExp >= 1u << e)
if (biasedExp >= 1u << E)
{
resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu);
@ -354,10 +354,10 @@ namespace ARMeilleure.Instructions
private static float FPRoundCv(double real, ExecutionContext context)
{
const int minimumExp = -126;
const int MinimumExp = -126;
const int e = 8;
const int f = 23;
const int E = 8;
const int F = 23;
bool sign;
double mantissa;
@ -387,22 +387,22 @@ namespace ARMeilleure.Instructions
exponent++;
}
if ((context.Fpcr & FPCR.Fz) != 0 && exponent < minimumExp)
if ((context.Fpcr & FPCR.Fz) != 0 && exponent < MinimumExp)
{
context.Fpsr |= FPSR.Ufc;
return SoftFloat32.FPZero(sign);
}
uint biasedExp = (uint)Math.Max(exponent - minimumExp + 1, 0);
uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
if (biasedExp == 0u)
{
mantissa /= Math.Pow(2d, minimumExp - exponent);
mantissa /= Math.Pow(2d, MinimumExp - exponent);
}
uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, f));
double error = mantissa * Math.Pow(2d, f) - (double)intMant;
uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, F));
double error = mantissa * Math.Pow(2d, F) - (double)intMant;
if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
{
@ -442,12 +442,12 @@ namespace ARMeilleure.Instructions
{
intMant++;
if (intMant == 1u << f)
if (intMant == 1u << F)
{
biasedExp = 1u;
}
if (intMant == 1u << (f + 1))
if (intMant == 1u << (F + 1))
{
biasedExp++;
intMant >>= 1;
@ -456,7 +456,7 @@ namespace ARMeilleure.Instructions
float result;
if (biasedExp >= (1u << e) - 1u)
if (biasedExp >= (1u << E) - 1u)
{
result = overflowToInf ? SoftFloat32.FPInfinity(sign) : SoftFloat32.FPMaxNormal(sign);
@ -529,10 +529,10 @@ namespace ARMeilleure.Instructions
private static double FPRoundCv(double real, ExecutionContext context)
{
const int minimumExp = -1022;
const int MinimumExp = -1022;
const int e = 11;
const int f = 52;
const int E = 11;
const int F = 52;
bool sign;
double mantissa;
@ -562,22 +562,22 @@ namespace ARMeilleure.Instructions
exponent++;
}
if ((context.Fpcr & FPCR.Fz) != 0 && exponent < minimumExp)
if ((context.Fpcr & FPCR.Fz) != 0 && exponent < MinimumExp)
{
context.Fpsr |= FPSR.Ufc;
return SoftFloat64.FPZero(sign);
}
uint biasedExp = (uint)Math.Max(exponent - minimumExp + 1, 0);
uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
if (biasedExp == 0u)
{
mantissa /= Math.Pow(2d, minimumExp - exponent);
mantissa /= Math.Pow(2d, MinimumExp - exponent);
}
ulong intMant = (ulong)Math.Floor(mantissa * Math.Pow(2d, f));
double error = mantissa * Math.Pow(2d, f) - (double)intMant;
ulong intMant = (ulong)Math.Floor(mantissa * Math.Pow(2d, F));
double error = mantissa * Math.Pow(2d, F) - (double)intMant;
if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
{
@ -617,12 +617,12 @@ namespace ARMeilleure.Instructions
{
intMant++;
if (intMant == 1ul << f)
if (intMant == 1ul << F)
{
biasedExp = 1u;
}
if (intMant == 1ul << (f + 1))
if (intMant == 1ul << (F + 1))
{
biasedExp++;
intMant >>= 1;
@ -631,7 +631,7 @@ namespace ARMeilleure.Instructions
double result;
if (biasedExp >= (1u << e) - 1u)
if (biasedExp >= (1u << E) - 1u)
{
result = overflowToInf ? SoftFloat64.FPInfinity(sign) : SoftFloat64.FPMaxNormal(sign);

25
src/ARMeilleure/Signal/NativeSignalHandler.cs
View File

@ -5,7 +5,6 @@ using ARMeilleure.Translation.Cache;
using System;
using System.Runtime.CompilerServices;
using System.Runtime.InteropServices;
using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
namespace ARMeilleure.Signal
@ -261,20 +260,20 @@ namespace ARMeilleure.Signal
{
if (OperatingSystem.IsMacOS())
{
const ulong mcontextOffset = 48; // uc_mcontext
Operand ctxPtr = context.Load(OperandType.I64, context.Add(ucontextPtr, Const(mcontextOffset)));
const ulong McontextOffset = 48; // uc_mcontext
Operand ctxPtr = context.Load(OperandType.I64, context.Add(ucontextPtr, Const(McontextOffset)));
if (RuntimeInformation.ProcessArchitecture == Architecture.Arm64)
{
const ulong esrOffset = 8; // __es.__esr
Operand esr = context.Load(OperandType.I64, context.Add(ctxPtr, Const(esrOffset)));
const ulong EsrOffset = 8; // __es.__esr
Operand esr = context.Load(OperandType.I64, context.Add(ctxPtr, Const(EsrOffset)));
return context.BitwiseAnd(esr, Const(0x40ul));
}
if (RuntimeInformation.ProcessArchitecture == Architecture.X64)
{
const ulong errOffset = 4; // __es.__err
Operand err = context.Load(OperandType.I64, context.Add(ctxPtr, Const(errOffset)));
const ulong ErrOffset = 4; // __es.__err
Operand err = context.Load(OperandType.I64, context.Add(ctxPtr, Const(ErrOffset)));
return context.BitwiseAnd(err, Const(2ul));
}
}
@ -287,10 +286,10 @@ namespace ARMeilleure.Signal
Operand loopLabel = Label();
Operand successLabel = Label();
const ulong auxOffset = 464; // uc_mcontext.__reserved
const uint esrMagic = 0x45535201;
const ulong AuxOffset = 464; // uc_mcontext.__reserved
const uint EsrMagic = 0x45535201;
context.Copy(auxPtr, context.Add(ucontextPtr, Const(auxOffset)));
context.Copy(auxPtr, context.Add(ucontextPtr, Const(AuxOffset)));
context.MarkLabel(loopLabel);
@ -299,7 +298,7 @@ namespace ARMeilleure.Signal
// _aarch64_ctx::size
Operand size = context.Load(OperandType.I32, context.Add(auxPtr, Const(4ul)));
context.BranchIf(successLabel, magic, Const(esrMagic), Comparison.Equal);
context.BranchIf(successLabel, magic, Const(EsrMagic), Comparison.Equal);
context.Copy(auxPtr, context.Add(auxPtr, context.ZeroExtend32(OperandType.I64, size)));
@ -314,8 +313,8 @@ namespace ARMeilleure.Signal
if (RuntimeInformation.ProcessArchitecture == Architecture.X64)
{
const int errOffset = 192; // uc_mcontext.gregs[REG_ERR]
Operand err = context.Load(OperandType.I64, context.Add(ucontextPtr, Const(errOffset)));
const int ErrOffset = 192; // uc_mcontext.gregs[REG_ERR]
Operand err = context.Load(OperandType.I64, context.Add(ucontextPtr, Const(ErrOffset)));
return context.BitwiseAnd(err, Const(2ul));
}
}

4
src/ARMeilleure/Translation/PTC/Ptc.cs
View File

@ -880,7 +880,7 @@ namespace ARMeilleure.Translation.PTC
private void ReportProgress(object state)
{
const int refreshRate = 50; // ms.
const int RefreshRate = 50; // ms.
AutoResetEvent endEvent = (AutoResetEvent)state;
@ -896,7 +896,7 @@ namespace ARMeilleure.Translation.PTC
count = newCount;
}
}
while (!endEvent.WaitOne(refreshRate));
while (!endEvent.WaitOne(RefreshRate));
}
public static Hash128 ComputeHash(IMemoryManager memory, ulong address, ulong guestSize)

8
src/Ryujinx.Audio/Renderer/Dsp/Command/CircularBufferSinkCommand.cs
View File

@ -43,7 +43,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
public void Process(CommandList context)
{
const int targetChannelCount = 2;
const int TargetChannelCount = 2;
ulong currentOffset = CurrentOffset;
@ -59,10 +59,10 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
for (int y = 0; y < context.SampleCount; y++)
{
context.MemoryManager.Write(targetOffset + (ulong)y * targetChannelCount, PcmHelper.Saturate(inputBuffer[y]));
context.MemoryManager.Write(targetOffset + (ulong)y * TargetChannelCount, PcmHelper.Saturate(inputBuffer[y]));
}
currentOffset += context.SampleCount * targetChannelCount;
currentOffset += context.SampleCount * TargetChannelCount;
if (currentOffset >= CircularBufferSize)
{
@ -73,4 +73,4 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
}
}
}
}
}

18
src/Ryujinx.Audio/Renderer/Dsp/Command/DelayCommand.cs
View File

@ -56,7 +56,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
private unsafe void ProcessDelayMono(ref DelayState state, float* outputBuffer, float* inputBuffer, uint sampleCount)
{
const ushort channelCount = 1;
const ushort ChannelCount = 1;
float feedbackGain = FixedPointHelper.ToFloat(Parameter.FeedbackGain, FixedPointPrecision);
float inGain = FixedPointHelper.ToFloat(Parameter.InGain, FixedPointPrecision);
@ -70,7 +70,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
float temp = input * inGain + delayLineValue * feedbackGain;
state.UpdateLowPassFilter(ref temp, channelCount);
state.UpdateLowPassFilter(ref temp, ChannelCount);
outputBuffer[i] = (input * dryGain + delayLineValue * outGain) / 64;
}
@ -79,7 +79,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
private unsafe void ProcessDelayStereo(ref DelayState state, Span<IntPtr> outputBuffers, ReadOnlySpan<IntPtr> inputBuffers, uint sampleCount)
{
const ushort channelCount = 2;
const ushort ChannelCount = 2;
float delayFeedbackBaseGain = state.DelayFeedbackBaseGain;
float delayFeedbackCrossGain = state.DelayFeedbackCrossGain;
@ -106,7 +106,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
Vector2 temp = MatrixHelper.Transform(ref delayLineValues, ref delayFeedback) + channelInput * inGain;
state.UpdateLowPassFilter(ref Unsafe.As<Vector2, float>(ref temp), channelCount);
state.UpdateLowPassFilter(ref Unsafe.As<Vector2, float>(ref temp), ChannelCount);
*((float*)outputBuffers[0] + i) = (channelInput.X * dryGain + delayLineValues.X * outGain) / 64;
*((float*)outputBuffers[1] + i) = (channelInput.Y * dryGain + delayLineValues.Y * outGain) / 64;
@ -116,7 +116,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
private unsafe void ProcessDelayQuadraphonic(ref DelayState state, Span<IntPtr> outputBuffers, ReadOnlySpan<IntPtr> inputBuffers, uint sampleCount)
{
const ushort channelCount = 4;
const ushort ChannelCount = 4;
float delayFeedbackBaseGain = state.DelayFeedbackBaseGain;
float delayFeedbackCrossGain = state.DelayFeedbackCrossGain;
@ -150,7 +150,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
Vector4 temp = MatrixHelper.Transform(ref delayLineValues, ref delayFeedback) + channelInput * inGain;
state.UpdateLowPassFilter(ref Unsafe.As<Vector4, float>(ref temp), channelCount);
state.UpdateLowPassFilter(ref Unsafe.As<Vector4, float>(ref temp), ChannelCount);
*((float*)outputBuffers[0] + i) = (channelInput.X * dryGain + delayLineValues.X * outGain) / 64;
*((float*)outputBuffers[1] + i) = (channelInput.Y * dryGain + delayLineValues.Y * outGain) / 64;
@ -162,7 +162,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
private unsafe void ProcessDelaySurround(ref DelayState state, Span<IntPtr> outputBuffers, ReadOnlySpan<IntPtr> inputBuffers, uint sampleCount)
{
const ushort channelCount = 6;
const ushort ChannelCount = 6;
float feedbackGain = FixedPointHelper.ToFloat(Parameter.FeedbackGain, FixedPointPrecision);
float delayFeedbackBaseGain = state.DelayFeedbackBaseGain;
@ -202,7 +202,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
Vector6 temp = MatrixHelper.Transform(ref delayLineValues, ref delayFeedback) + channelInput * inGain;
state.UpdateLowPassFilter(ref Unsafe.As<Vector6, float>(ref temp), channelCount);
state.UpdateLowPassFilter(ref Unsafe.As<Vector6, float>(ref temp), ChannelCount);
*((float*)outputBuffers[0] + i) = (channelInput.X * dryGain + delayLineValues.X * outGain) / 64;
*((float*)outputBuffers[1] + i) = (channelInput.Y * dryGain + delayLineValues.Y * outGain) / 64;
@ -277,4 +277,4 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
ProcessDelay(context, ref state);
}
}
}
}

10
src/Ryujinx.Audio/Renderer/Dsp/Command/DeviceSinkCommand.cs
View File

@ -65,7 +65,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
int channelCount = (int)device.GetChannelCount();
uint bufferCount = Math.Min(device.GetChannelCount(), InputCount);
const int sampleCount = Constants.TargetSampleCount;
const int SampleCount = Constants.TargetSampleCount;
uint inputCount;
@ -79,13 +79,13 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
inputCount = bufferCount;
}
short[] outputBuffer = new short[inputCount * sampleCount];
short[] outputBuffer = new short[inputCount * SampleCount];
for (int i = 0; i < bufferCount; i++)
{
ReadOnlySpan<float> inputBuffer = GetBuffer(InputBufferIndices[i], sampleCount);
ReadOnlySpan<float> inputBuffer = GetBuffer(InputBufferIndices[i], SampleCount);
for (int j = 0; j < sampleCount; j++)
for (int j = 0; j < SampleCount; j++)
{
outputBuffer[i + j * channelCount] = PcmHelper.Saturate(inputBuffer[j]);
}
@ -100,4 +100,4 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
}
}
}
}
}

8
src/Ryujinx.Audio/Renderer/Dsp/Command/Reverb3dCommand.cs
View File

@ -96,7 +96,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
private unsafe void ProcessReverb3dGeneric(ref Reverb3dState state, ReadOnlySpan<IntPtr> outputBuffers, ReadOnlySpan<IntPtr> inputBuffers, uint sampleCount, ReadOnlySpan<int> outputEarlyIndicesTable, ReadOnlySpan<int> targetEarlyDelayLineIndicesTable, ReadOnlySpan<int> targetOutputFeedbackIndicesTable)
{
const int delayLineSampleIndexOffset = 1;
const int DelayLineSampleIndexOffset = 1;
bool isMono = Parameter.ChannelCount == 1;
bool isSurround = Parameter.ChannelCount == 6;
@ -111,14 +111,14 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
{
outputValues.Fill(0);
float tapOut = state.PreDelayLine.TapUnsafe(state.ReflectionDelayTime, delayLineSampleIndexOffset);
float tapOut = state.PreDelayLine.TapUnsafe(state.ReflectionDelayTime, DelayLineSampleIndexOffset);
for (int i = 0; i < targetEarlyDelayLineIndicesTable.Length; i++)
{
int earlyDelayIndex = targetEarlyDelayLineIndicesTable[i];
int outputIndex = outputEarlyIndicesTable[earlyDelayIndex];
float tempTapOut = state.PreDelayLine.TapUnsafe(state.EarlyDelayTime[earlyDelayIndex], delayLineSampleIndexOffset);
float tempTapOut = state.PreDelayLine.TapUnsafe(state.EarlyDelayTime[earlyDelayIndex], DelayLineSampleIndexOffset);
outputValues[outputIndex] += tempTapOut * state.EarlyGain[earlyDelayIndex];
}
@ -251,4 +251,4 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
ProcessReverb3d(context, ref state);
}
}
}
}

10
src/Ryujinx.Audio/Renderer/Dsp/DataSourceHelper.cs
View File

@ -44,9 +44,9 @@ namespace Ryujinx.Audio.Renderer.Dsp
public static void ProcessWaveBuffers(IVirtualMemoryManager memoryManager, Span<float> outputBuffer, ref WaveBufferInformation info, Span<WaveBuffer> wavebuffers, ref VoiceUpdateState voiceState, uint targetSampleRate, int sampleCount)
{
const int tempBufferSize = 0x3F00;
const int TempBufferSize = 0x3F00;
Span<short> tempBuffer = stackalloc short[tempBufferSize];
Span<short> tempBuffer = stackalloc short[TempBufferSize];
float sampleRateRatio = (float)info.SourceSampleRate / targetSampleRate * info.Pitch;
@ -60,11 +60,11 @@ namespace Ryujinx.Audio.Renderer.Dsp
int totalNeededSize = (int)MathF.Truncate(fraction + sampleRateRatio * sampleCount);
if (totalNeededSize + pitchMaxLength <= tempBufferSize && totalNeededSize >= 0)
if (totalNeededSize + pitchMaxLength <= TempBufferSize && totalNeededSize >= 0)
{
int sourceSampleCountToProcess = sampleCount;
int maxSampleCountPerIteration = Math.Min((int)MathF.Truncate((tempBufferSize - fraction) / sampleRateRatio), sampleCount);
int maxSampleCountPerIteration = Math.Min((int)MathF.Truncate((TempBufferSize - fraction) / sampleRateRatio), sampleCount);
bool isStarving = false;
@ -463,4 +463,4 @@ namespace Ryujinx.Audio.Renderer.Dsp
}
}
}
}
}

16
src/Ryujinx.Audio/Renderer/Dsp/UpsamplerHelper.cs
View File

@ -32,13 +32,13 @@ namespace Ryujinx.Audio.Renderer.Dsp
float BlackmanWindow(float x)
{
const float a = 0.18f;
const float a0 = 0.5f - 0.5f * a;
const float a1 = -0.5f;
const float a2 = 0.5f * a;
return a0 + a1 * MathF.Cos(2 * MathF.PI * x) + a2 * MathF.Cos(4 * MathF.PI * x);
const float A = 0.18f;
const float A0 = 0.5f - 0.5f * A;
const float A1 = -0.5f;
const float A2 = 0.5f * A;
return A0 + A1 * MathF.Cos(2 * MathF.PI * x) + A2 * MathF.Cos(4 * MathF.PI * x);
}
Array20<float> result = new Array20<float>();
for (int i = 0; i < FilterBankLength; i++)
@ -112,7 +112,7 @@ namespace Ryujinx.Audio.Renderer.Dsp
int inputBufferIndex = 0;
switch (state.Scale)
{
{
case 6.0f:
for (int i = 0; i < outputSampleCount; i++)
{
@ -189,4 +189,4 @@ namespace Ryujinx.Audio.Renderer.Dsp
}
}
}
}
}

6
src/Ryujinx.Audio/Renderer/Server/CommandProcessingTimeEstimatorVersion2.cs
View File

@ -60,7 +60,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(MixRampGroupedCommand command)
{
const float costPerSample = 7.245f;
const float CostPerSample = 7.245f;
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
@ -74,7 +74,7 @@ namespace Ryujinx.Audio.Renderer.Server
}
}
return (uint)(_sampleCount * costPerSample * volumeCount);
return (uint)(_sampleCount * CostPerSample * volumeCount);
}
public uint Estimate(MixRampCommand command)
@ -549,4 +549,4 @@ namespace Ryujinx.Audio.Renderer.Server
return 0;
}
}
}
}

8
src/Ryujinx.Audio/Renderer/Server/MemoryPool/PoolMapper.cs
View File

@ -256,19 +256,19 @@ namespace Ryujinx.Audio.Renderer.Server.MemoryPool
MemoryPoolUserState outputState;
const uint pageSize = 0x1000;
const uint PageSize = 0x1000;
if (inputState != MemoryPoolUserState.RequestAttach && inputState != MemoryPoolUserState.RequestDetach)
{
return UpdateResult.Success;
}
if (inParameter.CpuAddress == 0 || (inParameter.CpuAddress % pageSize) != 0)
if (inParameter.CpuAddress == 0 || (inParameter.CpuAddress % PageSize) != 0)
{
return UpdateResult.InvalidParameter;
}
if (inParameter.Size == 0 || (inParameter.Size % pageSize) != 0)
if (inParameter.Size == 0 || (inParameter.Size % PageSize) != 0)
{
return UpdateResult.InvalidParameter;
}
@ -363,4 +363,4 @@ namespace Ryujinx.Audio.Renderer.Server.MemoryPool
}
}
}
}
}

2
src/Ryujinx.Ava/UI/Controls/ApplicationContextMenu.axaml.cs
View File

@ -10,8 +10,8 @@ using Ryujinx.Ava.UI.Helpers;
using Ryujinx.Ava.UI.ViewModels;
using Ryujinx.Ava.UI.Windows;
using Ryujinx.Common.Configuration;
using Ryujinx.Ui.App.Common;
using Ryujinx.HLE.HOS;
using Ryujinx.Ui.App.Common;
using Ryujinx.Ui.Common.Helper;
using System;
using System.Collections.Generic;

8
src/Ryujinx.Ava/UI/Models/SaveModel.cs
View File

@ -40,9 +40,9 @@ namespace Ryujinx.Ava.UI.Models
private string GetSizeString()
{
const int scale = 1024;
const int Scale = 1024;
string[] orders = { "GiB", "MiB", "KiB" };
long max = (long)Math.Pow(scale, orders.Length);
long max = (long)Math.Pow(Scale, orders.Length);
foreach (string order in orders)
{
@ -51,7 +51,7 @@ namespace Ryujinx.Ava.UI.Models
return $"{decimal.Divide(Size, max):##.##} {order}";
}
max /= scale;
max /= Scale;
}
return "0 KiB";
@ -109,4 +109,4 @@ namespace Ryujinx.Ava.UI.Models
}
}
}
}

12
src/Ryujinx.Ava/UI/ViewModels/MainWindowViewModel.cs
View File

@ -622,7 +622,7 @@ namespace Ryujinx.Ava.UI.ViewModels
OnPropertyChanged();
}
}
public double WindowWidth
{
get => _windowWidth;
@ -1124,13 +1124,13 @@ namespace Ryujinx.Ava.UI.ViewModels
var dominantColor = IconColorPicker.GetFilteredColor(gameIconBmp).ToPixel<Bgra32>();
const float colorMultiple = 0.5f;
const float ColorMultiple = 0.5f;
Color progressFgColor = Color.FromRgb(dominantColor.R, dominantColor.G, dominantColor.B);
Color progressBgColor = Color.FromRgb(
(byte)(dominantColor.R * colorMultiple),
(byte)(dominantColor.G * colorMultiple),
(byte)(dominantColor.B * colorMultiple));
(byte)(dominantColor.R * ColorMultiple),
(byte)(dominantColor.G * ColorMultiple),
(byte)(dominantColor.B * ColorMultiple));
ProgressBarForegroundColor = new SolidColorBrush(progressFgColor);
ProgressBarBackgroundColor = new SolidColorBrush(progressBgColor);
@ -1677,4 +1677,4 @@ namespace Ryujinx.Ava.UI.ViewModels
#endregion
}
}
}

4
src/Ryujinx.Ava/UI/ViewModels/SettingsViewModel.cs
View File

@ -18,14 +18,14 @@ using Ryujinx.HLE.FileSystem;
using Ryujinx.HLE.HOS.Services.Time.TimeZone;
using Ryujinx.Ui.Common.Configuration;
using Ryujinx.Ui.Common.Configuration.System;
using Silk.NET.Vulkan;
using System;
using System.Collections.Generic;
using System.Collections.ObjectModel;
using System.Linq;
using System.Runtime.InteropServices;
using System.Net.NetworkInformation;
using System.Runtime.InteropServices;
using TimeZone = Ryujinx.Ava.UI.Models.TimeZone;
using Silk.NET.Vulkan;
namespace Ryujinx.Ava.UI.ViewModels
{

6
src/Ryujinx.Common/SystemInfo/MacOSSystemInfo.cs
View File

@ -44,10 +44,10 @@ namespace Ryujinx.Common.SystemInfo
return 0;
}
const int flavor = 4; // HOST_VM_INFO64
const int Flavor = 4; // HOST_VM_INFO64
uint count = (uint)(Marshal.SizeOf<VMStatistics64>() / sizeof(int)); // HOST_VM_INFO64_COUNT
VMStatistics64 stats = new();
result = host_statistics64(port, flavor, ref stats, ref count);
result = host_statistics64(port, Flavor, ref stats, ref count);
if (result != 0)
{
@ -154,4 +154,4 @@ namespace Ryujinx.Common.SystemInfo
[LibraryImport(SystemLibraryName, SetLastError = true)]
private static partial int host_statistics64(uint host_priv, int host_flavor, ref VMStatistics64 host_info64_out, ref uint host_info64_outCnt);
}
}
}

4
src/Ryujinx.Common/SystemInterop/StdErrAdapter.cs
View File

@ -29,10 +29,10 @@ namespace Ryujinx.Common.SystemInterop
[SupportedOSPlatform("macos")]
private void RegisterPosix()
{
const int stdErrFileno = 2;
const int StdErrFileno = 2;
(int readFd, int writeFd) = MakePipe();
dup2(writeFd, stdErrFileno);
dup2(writeFd, StdErrFileno);
_pipeReader = CreateFileDescriptorStream(readFd);
_pipeWriter = CreateFileDescriptorStream(writeFd);

2
src/Ryujinx.Graphics.Gpu/Memory/PhysicalMemory.cs
View File

@ -6,8 +6,8 @@ using Ryujinx.Memory.Range;
using Ryujinx.Memory.Tracking;
using System;
using System.Collections.Generic;
using System.Runtime.InteropServices;
using System.Linq;
using System.Runtime.InteropServices;
using System.Threading;
namespace Ryujinx.Graphics.Gpu.Memory

2
src/Ryujinx.Graphics.Vulkan/BufferManager.cs
View File

@ -4,8 +4,8 @@ using Silk.NET.Vulkan;
using System;
using System.Runtime.CompilerServices;
using System.Runtime.InteropServices;
using VkFormat = Silk.NET.Vulkan.Format;
using VkBuffer = Silk.NET.Vulkan.Buffer;
using VkFormat = Silk.NET.Vulkan.Format;
namespace Ryujinx.Graphics.Vulkan
{

8
src/Ryujinx.HLE/FileSystem/VirtualFileSystem.cs
View File

@ -354,8 +354,8 @@ namespace Ryujinx.HLE.FileSystem
if (info.SpaceId != SaveDataSpaceId.User && info.SpaceId != SaveDataSpaceId.System)
return Result.Success;
const string mountName = "SaveDir";
var mountNameU8 = mountName.ToU8Span();
const string MountName = "SaveDir";
var mountNameU8 = MountName.ToU8Span();
BisPartitionId partitionId = info.SpaceId switch
{
@ -368,7 +368,7 @@ namespace Ryujinx.HLE.FileSystem
if (rc.IsFailure()) return rc;
try
{
var path = $"{mountName}:/save/{info.SaveDataId:x16}".ToU8Span();
var path = $"{MountName}:/save/{info.SaveDataId:x16}".ToU8Span();
rc = hos.Fs.GetEntryType(out _, path);
@ -612,4 +612,4 @@ namespace Ryujinx.HLE.FileSystem
}
}
}
}
}

6
src/Ryujinx.HLE/HOS/Horizon.cs
View File

@ -332,13 +332,13 @@ namespace Ryujinx.HLE.HOS
foreach (var service in services)
{
const ProcessCreationFlags flags =
const ProcessCreationFlags Flags =
ProcessCreationFlags.EnableAslr |
ProcessCreationFlags.AddressSpace64Bit |
ProcessCreationFlags.Is64Bit |
ProcessCreationFlags.PoolPartitionSystem;
ProcessCreationInfo creationInfo = new ProcessCreationInfo("Service", 1, 0, 0x8000000, 1, flags, 0, 0);
ProcessCreationInfo creationInfo = new ProcessCreationInfo("Service", 1, 0, 0x8000000, 1, Flags, 0, 0);
uint[] defaultCapabilities = new uint[]
{
@ -554,4 +554,4 @@ namespace Ryujinx.HLE.HOS
IsPaused = pause;
}
}
}
}

18
src/Ryujinx.HLE/HOS/Services/Hid/Hid.cs
View File

@ -83,18 +83,18 @@ namespace Ryujinx.HLE.HOS.Services.Hid
public ControllerKeys UpdateStickButtons(JoystickPosition leftStick, JoystickPosition rightStick)
{
const int stickButtonThreshold = short.MaxValue / 2;
const int StickButtonThreshold = short.MaxValue / 2;
ControllerKeys result = 0;
result |= (leftStick.Dx < -stickButtonThreshold) ? ControllerKeys.LStickLeft : result;
result |= (leftStick.Dx > stickButtonThreshold) ? ControllerKeys.LStickRight : result;
result |= (leftStick.Dy < -stickButtonThreshold) ? ControllerKeys.LStickDown : result;
result |= (leftStick.Dy > stickButtonThreshold) ? ControllerKeys.LStickUp : result;
result |= (leftStick.Dx < -StickButtonThreshold) ? ControllerKeys.LStickLeft : result;
result |= (leftStick.Dx > StickButtonThreshold) ? ControllerKeys.LStickRight : result;
result |= (leftStick.Dy < -StickButtonThreshold) ? ControllerKeys.LStickDown : result;
result |= (leftStick.Dy > StickButtonThreshold) ? ControllerKeys.LStickUp : result;
result |= (rightStick.Dx < -stickButtonThreshold) ? ControllerKeys.RStickLeft : result;
result |= (rightStick.Dx > stickButtonThreshold) ? ControllerKeys.RStickRight : result;
result |= (rightStick.Dy < -stickButtonThreshold) ? ControllerKeys.RStickDown : result;
result |= (rightStick.Dy > stickButtonThreshold) ? ControllerKeys.RStickUp : result;
result |= (rightStick.Dx < -StickButtonThreshold) ? ControllerKeys.RStickLeft : result;
result |= (rightStick.Dx > StickButtonThreshold) ? ControllerKeys.RStickRight : result;
result |= (rightStick.Dy < -StickButtonThreshold) ? ControllerKeys.RStickDown : result;
result |= (rightStick.Dy > StickButtonThreshold) ? ControllerKeys.RStickUp : result;
return result;
}

4
src/Ryujinx.HLE/HOS/Services/Mii/Helper.cs
View File

@ -8,7 +8,7 @@ namespace Ryujinx.HLE.HOS.Services.Mii
{
public static ushort CalculateCrc16(ReadOnlySpan<byte> data, int crc, bool reverseEndianess)
{
const ushort poly = 0x1021;
const ushort Poly = 0x1021;
for (int i = 0; i < data.Length; i++)
{
@ -20,7 +20,7 @@ namespace Ryujinx.HLE.HOS.Services.Mii
if ((crc & 0x10000) != 0)
{
crc = (crc ^ poly) & 0xFFFF;
crc = (crc ^ Poly) & 0xFFFF;
}
}
}

6
src/Ryujinx.HLE/HOS/Services/Sdb/Pl/SharedFontManager.cs
View File

@ -134,9 +134,9 @@ namespace Ryujinx.HLE.HOS.Services.Sdb.Pl
private void WriteMagicAndSize(ulong offset, int size)
{
const int key = 0x49621806;
const int Key = 0x49621806;
int encryptedSize = BinaryPrimitives.ReverseEndianness(size ^ key);
int encryptedSize = BinaryPrimitives.ReverseEndianness(size ^ Key);
_storage.GetRef<int>(offset + 0) = (int)BFTTFMagic;
_storage.GetRef<int>(offset + 4) = encryptedSize;
@ -180,4 +180,4 @@ namespace Ryujinx.HLE.HOS.Services.Sdb.Pl
}
}
}
}
}

4
src/Ryujinx.HLE/HOS/Services/ServerBase.cs
View File

@ -70,13 +70,13 @@ namespace Ryujinx.HLE.HOS.Services
Name = name;
SmObjectFactory = smObjectFactory;
const ProcessCreationFlags flags =
const ProcessCreationFlags Flags =
ProcessCreationFlags.EnableAslr |
ProcessCreationFlags.AddressSpace64Bit |
ProcessCreationFlags.Is64Bit |
ProcessCreationFlags.PoolPartitionSystem;
ProcessCreationInfo creationInfo = new ProcessCreationInfo("Service", 1, 0, 0x8000000, 1, flags, 0, 0);
ProcessCreationInfo creationInfo = new ProcessCreationInfo("Service", 1, 0, 0x8000000, 1, Flags, 0, 0);
KernelStatic.StartInitialProcess(context, creationInfo, DefaultCapabilities, 44, Main);
}

36
src/Ryujinx.HLE/HOS/Services/Settings/ISystemSettingsServer.cs
View File

@ -43,43 +43,43 @@ namespace Ryujinx.HLE.HOS.Services.Settings
return ResultCode.Success;
}
const byte majorFwVersion = 0x03;
const byte minorFwVersion = 0x00;
const byte microFwVersion = 0x00;
const byte unknown = 0x00; //Build?
const byte MajorFwVersion = 0x03;
const byte MinorFwVersion = 0x00;
const byte MicroFwVersion = 0x00;
const byte Unknown = 0x00; //Build?
const int revisionNumber = 0x0A;
const int RevisionNumber = 0x0A;
const string platform = "NX";
const string unknownHex = "7fbde2b0bba4d14107bf836e4643043d9f6c8e47";
const string version = "3.0.0";
const string build = "NintendoSDK Firmware for NX 3.0.0-10.0";
const string Platform = "NX";
const string UnknownHex = "7fbde2b0bba4d14107bf836e4643043d9f6c8e47";
const string Version = "3.0.0";
const string Build = "NintendoSDK Firmware for NX 3.0.0-10.0";
// http://switchbrew.org/index.php?title=System_Version_Title
using (MemoryStream ms = new MemoryStream(0x100))
{
BinaryWriter writer = new BinaryWriter(ms);
writer.Write(majorFwVersion);
writer.Write(minorFwVersion);
writer.Write(microFwVersion);
writer.Write(unknown);
writer.Write(MajorFwVersion);
writer.Write(MinorFwVersion);
writer.Write(MicroFwVersion);
writer.Write(Unknown);
writer.Write(revisionNumber);
writer.Write(RevisionNumber);
writer.Write(Encoding.ASCII.GetBytes(platform));
writer.Write(Encoding.ASCII.GetBytes(Platform));
ms.Seek(0x28, SeekOrigin.Begin);
writer.Write(Encoding.ASCII.GetBytes(unknownHex));
writer.Write(Encoding.ASCII.GetBytes(UnknownHex));
ms.Seek(0x68, SeekOrigin.Begin);
writer.Write(Encoding.ASCII.GetBytes(version));
writer.Write(Encoding.ASCII.GetBytes(Version));
ms.Seek(0x80, SeekOrigin.Begin);
writer.Write(Encoding.ASCII.GetBytes(build));
writer.Write(Encoding.ASCII.GetBytes(Build));
context.Memory.Write(replyPos, ms.ToArray());
}

10
src/Ryujinx.HLE/HOS/Services/Vi/RootService/IApplicationDisplayService.cs
View File

@ -354,16 +354,16 @@ namespace Ryujinx.HLE.HOS.Services.Vi.RootService
private ulong GetA8B8G8R8LayerSize(int width, int height, out int pitch, out int alignment)
{
const int defaultAlignment = 0x1000;
const ulong defaultSize = 0x20000;
const int DefaultAlignment = 0x1000;
const ulong DefaultSize = 0x20000;
alignment = defaultAlignment;
alignment = DefaultAlignment;
pitch = BitUtils.AlignUp(BitUtils.DivRoundUp(width * 32, 8), 64);
int memorySize = pitch * BitUtils.AlignUp(height, 64);
ulong requiredMemorySize = (ulong)BitUtils.AlignUp(memorySize, alignment);
return (requiredMemorySize + defaultSize - 1) / defaultSize * defaultSize;
return (requiredMemorySize + DefaultSize - 1) / DefaultSize * DefaultSize;
}
[CommandCmif(2450)]
@ -484,4 +484,4 @@ namespace Ryujinx.HLE.HOS.Services.Vi.RootService
return ResultCode.Success;
}
}
}
}

10
src/Ryujinx.HLE/HOS/Tamper/InstructionHelper.cs
View File

@ -96,14 +96,14 @@ namespace Ryujinx.HLE.HOS.Tamper
public static byte[] ParseRawInstruction(string rawInstruction)
{
const int wordSize = 2 * sizeof(uint);
const int WordSize = 2 * sizeof(uint);
// Instructions are multi-word, with 32bit words. Split the raw instruction
// and parse each word into individual nybbles of bits.
var words = rawInstruction.Split((char[])null, StringSplitOptions.RemoveEmptyEntries);
byte[] instruction = new byte[wordSize * words.Length];
byte[] instruction = new byte[WordSize * words.Length];
if (words.Length == 0)
{
@ -114,14 +114,14 @@ namespace Ryujinx.HLE.HOS.Tamper
{
string word = words[wordIndex];
if (word.Length != wordSize)
if (word.Length != WordSize)
{
throw new TamperCompilationException($"Invalid word length for {word} in Atmosphere cheat");
}
for (int nybbleIndex = 0; nybbleIndex < wordSize; nybbleIndex++)
for (int nybbleIndex = 0; nybbleIndex < WordSize; nybbleIndex++)
{
int index = wordIndex * wordSize + nybbleIndex;
int index = wordIndex * WordSize + nybbleIndex;
instruction[index] = byte.Parse(word.AsSpan(nybbleIndex, 1), NumberStyles.HexNumber, CultureInfo.InvariantCulture);
}

60
src/Ryujinx.Tests.Memory/MultiRegionTrackingTests.cs
View File

@ -100,14 +100,14 @@ namespace Ryujinx.Tests.Memory
[Test]
public void DirtyRegionOrdering([Values] bool smart)
{
const int pageCount = 32;
IMultiRegionHandle handle = GetGranular(smart, 0, PageSize * pageCount, PageSize);
const int PageCount = 32;
IMultiRegionHandle handle = GetGranular(smart, 0, PageSize * PageCount, PageSize);
Random random = new();
PreparePages(handle, pageCount);
PreparePages(handle, PageCount);
IEnumerable<int> halfRange = Enumerable.Range(0, pageCount / 2);
IEnumerable<int> halfRange = Enumerable.Range(0, PageCount / 2);
List<int> odd = halfRange.Select(x => x * 2 + 1).ToList();
List<int> even = halfRange.Select(x => x * 2).ToList();
@ -117,9 +117,9 @@ namespace Ryujinx.Tests.Memory
_tracking.VirtualMemoryEvent((ulong)i * PageSize, PageSize, true);
});
int oddRegionCount = ExpectQueryInOrder(handle, 0, PageSize * pageCount, (address) => (address / PageSize) % 2 == 1);
int oddRegionCount = ExpectQueryInOrder(handle, 0, PageSize * PageCount, (address) => (address / PageSize) % 2 == 1);
Assert.AreEqual(oddRegionCount, pageCount / 2); // Must have written to all odd pages.
Assert.AreEqual(oddRegionCount, PageCount / 2); // Must have written to all odd pages.
// Write to all the even pages.
RandomOrder(random, even, (i) =>
@ -127,9 +127,9 @@ namespace Ryujinx.Tests.Memory
_tracking.VirtualMemoryEvent((ulong)i * PageSize, PageSize, true);
});
int evenRegionCount = ExpectQueryInOrder(handle, 0, PageSize * pageCount, (address) => (address / PageSize) % 2 == 0);
int evenRegionCount = ExpectQueryInOrder(handle, 0, PageSize * PageCount, (address) => (address / PageSize) % 2 == 0);
Assert.AreEqual(evenRegionCount, pageCount / 2);
Assert.AreEqual(evenRegionCount, PageCount / 2);
}
[Test]
@ -142,14 +142,14 @@ namespace Ryujinx.Tests.Memory
// This is useful for situations where we know that the data was complete when the sequence number was set.
// ...essentially, when that data can only be updated on a future sequence number.
const int pageCount = 32;
IMultiRegionHandle handle = GetGranular(smart, 0, PageSize * pageCount, PageSize);
const int PageCount = 32;
IMultiRegionHandle handle = GetGranular(smart, 0, PageSize * PageCount, PageSize);
PreparePages(handle, pageCount);
PreparePages(handle, PageCount);
Random random = new();
IEnumerable<int> halfRange = Enumerable.Range(0, pageCount / 2);
IEnumerable<int> halfRange = Enumerable.Range(0, PageCount / 2);
List<int> odd = halfRange.Select(x => x * 2 + 1).ToList();
List<int> even = halfRange.Select(x => x * 2).ToList();
@ -172,29 +172,29 @@ namespace Ryujinx.Tests.Memory
}, 1);
}
Assert.AreEqual(oddRegionCount, pageCount / 2); // Must have written to all odd pages.
Assert.AreEqual(oddRegionCount, PageCount / 2); // Must have written to all odd pages.
// Write to all pages.
_tracking.VirtualMemoryEvent(0, PageSize * pageCount, true);
_tracking.VirtualMemoryEvent(0, PageSize * PageCount, true);
// Only the even regions should be reported for sequence number 1.
int evenRegionCount = ExpectQueryInOrder(handle, 0, PageSize * pageCount, (address) => (address / PageSize) % 2 == 0, 1);
int evenRegionCount = ExpectQueryInOrder(handle, 0, PageSize * PageCount, (address) => (address / PageSize) % 2 == 0, 1);
Assert.AreEqual(evenRegionCount, pageCount / 2); // Must have written to all even pages.
Assert.AreEqual(evenRegionCount, PageCount / 2); // Must have written to all even pages.
oddRegionCount = 0;
handle.QueryModified(0, PageSize * pageCount, (address, range) => { oddRegionCount++; }, 1);
handle.QueryModified(0, PageSize * PageCount, (address, range) => { oddRegionCount++; }, 1);
Assert.AreEqual(oddRegionCount, 0); // Sequence number has not changed, so found no dirty subregions.
// With sequence number 2, all all pages should be reported as modified.
oddRegionCount = ExpectQueryInOrder(handle, 0, PageSize * pageCount, (address) => (address / PageSize) % 2 == 1, 2);
oddRegionCount = ExpectQueryInOrder(handle, 0, PageSize * PageCount, (address) => (address / PageSize) % 2 == 1, 2);
Assert.AreEqual(oddRegionCount, pageCount / 2); // Must have written to all odd pages.
Assert.AreEqual(oddRegionCount, PageCount / 2); // Must have written to all odd pages.
}
[Test]
@ -203,8 +203,8 @@ namespace Ryujinx.Tests.Memory
// Smart multi region handles dynamically change their tracking granularity based on QueryMemory calls.
// This can save on reprotects on larger resources.
const int pageCount = 32;
IMultiRegionHandle handle = GetGranular(true, 0, PageSize * pageCount, PageSize);
const int PageCount = 32;
IMultiRegionHandle handle = GetGranular(true, 0, PageSize * PageCount, PageSize);
// Query some large regions to prep the subdivision of the tracking region.
@ -253,27 +253,27 @@ namespace Ryujinx.Tests.Memory
public void DisposeMultiHandles([Values] bool smart)
{
// Create and initialize two overlapping Multi Region Handles, with PageSize granularity.
const int pageCount = 32;
const int overlapStart = 16;
const int PageCount = 32;
const int OverlapStart = 16;
Assert.AreEqual(0, _tracking.GetRegionCount());
IMultiRegionHandle handleLow = GetGranular(smart, 0, PageSize * pageCount, PageSize);
PreparePages(handleLow, pageCount);
IMultiRegionHandle handleLow = GetGranular(smart, 0, PageSize * PageCount, PageSize);
PreparePages(handleLow, PageCount);
Assert.AreEqual(pageCount, _tracking.GetRegionCount());
Assert.AreEqual(PageCount, _tracking.GetRegionCount());
IMultiRegionHandle handleHigh = GetGranular(smart, PageSize * overlapStart, PageSize * pageCount, PageSize);
PreparePages(handleHigh, pageCount, PageSize * overlapStart);
IMultiRegionHandle handleHigh = GetGranular(smart, PageSize * OverlapStart, PageSize * PageCount, PageSize);
PreparePages(handleHigh, PageCount, PageSize * OverlapStart);
// Combined pages (and assuming overlapStart <= pageCount) should be pageCount after overlapStart.
int totalPages = overlapStart + pageCount;
int totalPages = OverlapStart + PageCount;
Assert.AreEqual(totalPages, _tracking.GetRegionCount());
handleLow.Dispose(); // After disposing one, the pages for the other remain.
Assert.AreEqual(pageCount, _tracking.GetRegionCount());
Assert.AreEqual(PageCount, _tracking.GetRegionCount());
handleHigh.Dispose(); // After disposing the other, there are no pages left.

36
src/Ryujinx.Tests.Memory/TrackingTests.cs
View File

@ -201,11 +201,11 @@ namespace Ryujinx.Tests.Memory
// This test should not throw or deadlock due to invalid state.
const int threadCount = 1;
const int handlesPerThread = 16;
const int ThreadCount = 1;
const int HandlesPerThread = 16;
long finishedTime = 0;
RegionHandle[] handles = new RegionHandle[threadCount * handlesPerThread];
RegionHandle[] handles = new RegionHandle[ThreadCount * HandlesPerThread];
Random globalRand = new();
for (int i = 0; i < handles.Length; i++)
@ -218,16 +218,16 @@ namespace Ryujinx.Tests.Memory
// Dirty flag consumer threads
int dirtyFlagReprotects = 0;
for (int i = 0; i < threadCount; i++)
for (int i = 0; i < ThreadCount; i++)
{
int randSeed = i;
testThreads.Add(new Thread(() =>
{
int handleBase = randSeed * handlesPerThread;
int handleBase = randSeed * HandlesPerThread;
while (Stopwatch.GetTimestamp() < finishedTime)
{
Random random = new(randSeed);
RegionHandle handle = handles[handleBase + random.Next(handlesPerThread)];
RegionHandle handle = handles[handleBase + random.Next(HandlesPerThread)];
if (handle.Dirty)
{
@ -240,16 +240,16 @@ namespace Ryujinx.Tests.Memory
// Write trigger threads
int writeTriggers = 0;
for (int i = 0; i < threadCount; i++)
for (int i = 0; i < ThreadCount; i++)
{
int randSeed = i;
testThreads.Add(new Thread(() =>
{
Random random = new(randSeed);
ulong handleBase = (ulong)(randSeed * handlesPerThread * PageSize);
ulong handleBase = (ulong)(randSeed * HandlesPerThread * PageSize);
while (Stopwatch.GetTimestamp() < finishedTime)
{
_tracking.VirtualMemoryEvent(handleBase + (ulong)random.Next(PageSize * handlesPerThread), PageSize / 2, true);
_tracking.VirtualMemoryEvent(handleBase + (ulong)random.Next(PageSize * HandlesPerThread), PageSize / 2, true);
Interlocked.Increment(ref writeTriggers);
}
}));
@ -257,12 +257,12 @@ namespace Ryujinx.Tests.Memory
// Handle create/delete threads
int handleLifecycles = 0;
for (int i = 0; i < threadCount; i++)
for (int i = 0; i < ThreadCount; i++)
{
int randSeed = i;
testThreads.Add(new Thread(() =>
{
int maxAddress = threadCount * handlesPerThread * PageSize;
int maxAddress = ThreadCount * HandlesPerThread * PageSize;
Random random = new(randSeed + 512);
while (Stopwatch.GetTimestamp() < finishedTime)
{
@ -315,17 +315,17 @@ namespace Ryujinx.Tests.Memory
});
}
const int threadCount = 16;
const int iterationCount = 10000;
Thread[] signalThreads = new Thread[threadCount];
const int ThreadCount = 16;
const int IterationCount = 10000;
Thread[] signalThreads = new Thread[ThreadCount];
for (int i = 0; i < threadCount; i++)
for (int i = 0; i < ThreadCount; i++)
{
int randSeed = i;
signalThreads[i] = new Thread(() =>
{
Random random = new(randSeed);
for (int j = 0; j < iterationCount; j++)
for (int j = 0; j < IterationCount; j++)
{
_tracking.VirtualMemoryEvent((ulong)random.Next(PageSize), 4, false);
}
@ -333,14 +333,14 @@ namespace Ryujinx.Tests.Memory
});
}
for (int i = 0; i < threadCount; i++)
for (int i = 0; i < ThreadCount; i++)
{
signalThreads[i].Start();
}
while (signalThreadsDone != -1)
{
if (signalThreadsDone == threadCount)
if (signalThreadsDone == ThreadCount)
{
signalThreadsDone = -1;
}

8
src/Ryujinx.Tests/Cpu/CpuTestMisc.cs
View File

@ -359,7 +359,7 @@ namespace Ryujinx.Tests.Cpu
[Test]
public void MiscR()
{
const ulong result = 5;
const ulong Result = 5;
/*
0x0000000000001000: MOV X0, #2
@ -374,7 +374,7 @@ namespace Ryujinx.Tests.Cpu
Opcode(0xD65F03C0);
ExecuteOpcodes();
Assert.That(GetContext().GetX(0), Is.EqualTo(result));
Assert.That(GetContext().GetX(0), Is.EqualTo(Result));
Reset();
@ -391,7 +391,7 @@ namespace Ryujinx.Tests.Cpu
Opcode(0xD65F03C0);
ExecuteOpcodes();
Assert.That(GetContext().GetX(0), Is.EqualTo(result));
Assert.That(GetContext().GetX(0), Is.EqualTo(Result));
}
[Explicit]
@ -479,4 +479,4 @@ namespace Ryujinx.Tests.Cpu
}
#endif
}
}
}

110
src/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs
View File

@ -110,9 +110,9 @@ namespace Ryujinx.Tests.Cpu
public void Dup_S_B([ValueSource(nameof(_8B_))] ulong a,
[Values(0u, 15u)] uint index)
{
const int size = 0;
const int TestSize = 0;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x5E000420; // RESERVED
opcode |= (imm5 << 16);
@ -130,9 +130,9 @@ namespace Ryujinx.Tests.Cpu
public void Dup_S_H([ValueSource(nameof(_4H_))] ulong a,
[Values(0u, 7u)] uint index)
{
const int size = 1;
const int TestSize = 1;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x5E000420; // RESERVED
opcode |= (imm5 << 16);
@ -150,9 +150,9 @@ namespace Ryujinx.Tests.Cpu
public void Dup_S_S([ValueSource(nameof(_2S_))] ulong a,
[Values(0u, 1u, 2u, 3u)] uint index)
{
const int size = 2;
const int TestSize = 2;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x5E000420; // RESERVED
opcode |= (imm5 << 16);
@ -170,9 +170,9 @@ namespace Ryujinx.Tests.Cpu
public void Dup_S_D([ValueSource(nameof(_1D_))] ulong a,
[Values(0u, 1u)] uint index)
{
const int size = 3;
const int TestSize = 3;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x5E000420; // RESERVED
opcode |= (imm5 << 16);
@ -194,9 +194,9 @@ namespace Ryujinx.Tests.Cpu
[Values(0u, 15u)] uint index,
[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
{
const int size = 0;
const int TestSize = 0;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x0E000400; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -219,9 +219,9 @@ namespace Ryujinx.Tests.Cpu
[Values(0u, 7u)] uint index,
[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
{
const int size = 1;
const int TestSize = 1;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x0E000400; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -244,9 +244,9 @@ namespace Ryujinx.Tests.Cpu
[Values(0u, 1u, 2u, 3u)] uint index,
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
{
const int size = 2;
const int TestSize = 2;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x0E000400; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -269,9 +269,9 @@ namespace Ryujinx.Tests.Cpu
[Values(0u, 1u)] uint index,
[Values(0b1u)] uint q) // <2D>
{
const int size = 3;
const int TestSize = 3;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x0E000400; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -293,9 +293,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_W_))] uint wn,
[Values(0u, 15u)] uint index)
{
const int size = 0;
const int TestSize = 0;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x4E001C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -316,9 +316,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_W_))] uint wn,
[Values(0u, 7u)] uint index)
{
const int size = 1;
const int TestSize = 1;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x4E001C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -339,9 +339,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_W_))] uint wn,
[Values(0u, 1u, 2u, 3u)] uint index)
{
const int size = 2;
const int TestSize = 2;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x4E001C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -362,9 +362,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_X_))] ulong xn,
[Values(0u, 1u)] uint index)
{
const int size = 3;
const int TestSize = 3;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x4E001C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -386,10 +386,10 @@ namespace Ryujinx.Tests.Cpu
[Values(0u, 15u)] uint dstIndex,
[Values(0u, 15u)] uint srcIndex)
{
const int size = 0;
const int TestSize = 0;
uint imm5 = (dstIndex << (size + 1) | 1u << size) & 0x1Fu;
uint imm4 = (srcIndex << size) & 0xFu;
uint imm5 = (dstIndex << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint imm4 = (srcIndex << TestSize) & 0xFu;
uint opcode = 0x6E000400; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -412,10 +412,10 @@ namespace Ryujinx.Tests.Cpu
[Values(0u, 7u)] uint dstIndex,
[Values(0u, 7u)] uint srcIndex)
{
const int size = 1;
const int TestSize = 1;
uint imm5 = (dstIndex << (size + 1) | 1u << size) & 0x1Fu;
uint imm4 = (srcIndex << size) & 0xFu;
uint imm5 = (dstIndex << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint imm4 = (srcIndex << TestSize) & 0xFu;
uint opcode = 0x6E000400; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -438,10 +438,10 @@ namespace Ryujinx.Tests.Cpu
[Values(0u, 1u, 2u, 3u)] uint dstIndex,
[Values(0u, 1u, 2u, 3u)] uint srcIndex)
{
const int size = 2;
const int TestSize = 2;
uint imm5 = (dstIndex << (size + 1) | 1u << size) & 0x1Fu;
uint imm4 = (srcIndex << size) & 0xFu;
uint imm5 = (dstIndex << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint imm4 = (srcIndex << TestSize) & 0xFu;
uint opcode = 0x6E000400; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -464,10 +464,10 @@ namespace Ryujinx.Tests.Cpu
[Values(0u, 1u)] uint dstIndex,
[Values(0u, 1u)] uint srcIndex)
{
const int size = 3;
const int TestSize = 3;
uint imm5 = (dstIndex << (size + 1) | 1u << size) & 0x1Fu;
uint imm4 = (srcIndex << size) & 0xFu;
uint imm5 = (dstIndex << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint imm4 = (srcIndex << TestSize) & 0xFu;
uint opcode = 0x6E000400; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -488,9 +488,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_8B_))] ulong a,
[Values(0u, 15u)] uint index)
{
const int size = 0;
const int TestSize = 0;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x0E002C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -511,9 +511,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_4H_))] ulong a,
[Values(0u, 7u)] uint index)
{
const int size = 1;
const int TestSize = 1;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x0E002C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -534,9 +534,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_8B_))] ulong a,
[Values(0u, 15u)] uint index)
{
const int size = 0;
const int TestSize = 0;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x4E002C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -556,9 +556,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_4H_))] ulong a,
[Values(0u, 7u)] uint index)
{
const int size = 1;
const int TestSize = 1;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x4E002C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -578,9 +578,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_2S_))] ulong a,
[Values(0u, 1u, 2u, 3u)] uint index)
{
const int size = 2;
const int TestSize = 2;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x4E002C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -600,9 +600,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_8B_))] ulong a,
[Values(0u, 15u)] uint index)
{
const int size = 0;
const int TestSize = 0;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x0E003C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -623,9 +623,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_4H_))] ulong a,
[Values(0u, 7u)] uint index)
{
const int size = 1;
const int TestSize = 1;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x0E003C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -646,9 +646,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_2S_))] ulong a,
[Values(0u, 1u, 2u, 3u)] uint index)
{
const int size = 2;
const int TestSize = 2;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x0E003C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -669,9 +669,9 @@ namespace Ryujinx.Tests.Cpu
[ValueSource(nameof(_1D_))] ulong a,
[Values(0u, 1u)] uint index)
{
const int size = 3;
const int TestSize = 3;
uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
uint imm5 = (index << (TestSize + 1) | 1u << TestSize) & 0x1Fu;
uint opcode = 0x4E003C00; // RESERVED
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -686,4 +686,4 @@ namespace Ryujinx.Tests.Cpu
}
#endif
}
}
}

2
src/Ryujinx.Tests/Cpu/CpuTestSimdMemory32.cs
View File

@ -1,8 +1,8 @@
#define SimdMemory32
using ARMeilleure.State;
using Ryujinx.Memory;
using NUnit.Framework;
using Ryujinx.Memory;
using System;
namespace Ryujinx.Tests.Cpu

10
src/Ryujinx.Tests/Cpu/CpuTestSimdTbl.cs
View File

@ -14,17 +14,17 @@ namespace Ryujinx.Tests.Cpu
#region "Helper methods"
private static ulong GenIdxsForTbls(int regs)
{
const byte idxInRngMin = 0;
const byte IdxInRngMin = 0;
byte idxInRngMax = (byte)((16 * regs) - 1);
byte idxOutRngMin = (byte) (16 * regs);
const byte idxOutRngMax = 255;
const byte IdxOutRngMax = 255;
ulong idxs = 0ul;
for (int cnt = 1; cnt <= 8; cnt++)
{
ulong idxInRng = TestContext.CurrentContext.Random.NextByte(idxInRngMin, idxInRngMax);
ulong idxOutRng = TestContext.CurrentContext.Random.NextByte(idxOutRngMin, idxOutRngMax);
ulong idxInRng = TestContext.CurrentContext.Random.NextByte(IdxInRngMin, idxInRngMax);
ulong idxOutRng = TestContext.CurrentContext.Random.NextByte(idxOutRngMin, IdxOutRngMax);
ulong idx = TestContext.CurrentContext.Random.NextBool() ? idxInRng : idxOutRng;
@ -314,4 +314,4 @@ namespace Ryujinx.Tests.Cpu
}
#endif
}
}
}

12
src/Ryujinx.Ui.Common/App/ApplicationData.cs
View File

@ -1,9 +1,9 @@
using LibHac.Common;
using LibHac.Ns;
using LibHac.Fs;
using LibHac.Fs.Fsa;
using LibHac.FsSystem;
using LibHac.Loader;
using LibHac.Ns;
using LibHac.Tools.Fs;
using LibHac.Tools.FsSystem;
using LibHac.Tools.FsSystem.NcaUtils;
@ -146,9 +146,9 @@ namespace Ryujinx.Ui.App.Common
return string.Empty;
}
const string mainExeFs = "main";
const string MainExeFs = "main";
if (!codeFs.FileExists($"/{mainExeFs}"))
if (!codeFs.FileExists($"/{MainExeFs}"))
{
Logger.Error?.Print(LogClass.Loader, "No main binary ExeFS found in ExeFS");
@ -157,12 +157,12 @@ namespace Ryujinx.Ui.App.Common
using var nsoFile = new UniqueRef<IFile>();
codeFs.OpenFile(ref nsoFile.Ref, $"/{mainExeFs}".ToU8Span(), OpenMode.Read).ThrowIfFailure();
codeFs.OpenFile(ref nsoFile.Ref, $"/{MainExeFs}".ToU8Span(), OpenMode.Read).ThrowIfFailure();
NsoReader reader = new NsoReader();
reader.Initialize(nsoFile.Release().AsStorage().AsFile(OpenMode.Read)).ThrowIfFailure();
return BitConverter.ToString(reader.Header.ModuleId.ItemsRo.ToArray()).Replace("-", "").ToUpper()[..16];
}
}
}
}

2
src/Ryujinx.Ui.Common/App/ApplicationLibrary.cs
View File

@ -18,9 +18,9 @@ using Ryujinx.Ui.Common.Configuration;
using Ryujinx.Ui.Common.Configuration.System;
using System;
using System.Collections.Generic;
using System.Linq;
using System.Globalization;
using System.IO;
using System.Linq;
using System.Reflection;
using System.Text;
using System.Text.Json;

4
src/Ryujinx/Ui/Widgets/GameTableContextMenu.cs
View File

@ -389,12 +389,12 @@ namespace Ryujinx.Ui.Widgets
using (destHandle)
{
const int maxBufferSize = 1024 * 1024;
const int MaxBufferSize = 1024 * 1024;
rc = fs.GetFileSize(out long fileSize, sourceHandle);
if (rc.IsFailure()) return rc;
int bufferSize = (int)Math.Min(maxBufferSize, fileSize);
int bufferSize = (int)Math.Min(MaxBufferSize, fileSize);
byte[] buffer = ArrayPool<byte>.Shared.Rent(bufferSize);
try