Align register index between output targets on pixel shaders (#1559)

2020-09-21 00:45:04 -03:00 · 2020-09-21 00:45:04 -03:00 · 90ab28d1c6
commit 90ab28d1c6
parent 0158dc4db3
1 changed files with 3 additions and 0 deletions
--- a/Ryujinx.Graphics.Shader/Translation/EmitterContext.cs
+++ b/Ryujinx.Graphics.Shader/Translation/EmitterContext.cs
@ -1,3 +1,4 @@
+using Ryujinx.Common;
 using Ryujinx.Graphics.Shader.Decoders;
 using Ryujinx.Graphics.Shader.IntermediateRepresentation;
 using System.Collections.Generic;
@ -127,6 +128,8 @@ namespace Ryujinx.Graphics.Shader.Translation

                        regIndex++;
                    }
+
+                    regIndex = BitUtils.AlignUp(regIndex, 4);
                }
            }
        }