Fix LDXP/LDAXP when Rt == Rn (#274)

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gdkchan 2018-07-16 15:57:15 -03:00 committed by GitHub
parent e71da4fb74
commit 5d698a7d8d
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@ -48,18 +48,24 @@ namespace ChocolArm64.Instruction
{ {
AOpCodeMemEx Op = (AOpCodeMemEx)Context.CurrOp; AOpCodeMemEx Op = (AOpCodeMemEx)Context.CurrOp;
if (AccType.HasFlag(AccessType.Ordered)) bool Ordered = (AccType & AccessType.Ordered) != 0;
bool Exclusive = (AccType & AccessType.Exclusive) != 0;
if (Ordered)
{ {
EmitBarrier(Context); EmitBarrier(Context);
} }
if (AccType.HasFlag(AccessType.Exclusive)) if (Exclusive)
{ {
EmitMemoryCall(Context, nameof(AMemory.SetExclusive), Op.Rn); EmitMemoryCall(Context, nameof(AMemory.SetExclusive), Op.Rn);
} }
Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
Context.EmitLdint(Op.Rn); Context.EmitLdint(Op.Rn);
Context.EmitSttmp();
Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
Context.EmitLdtmp();
EmitReadZxCall(Context, Op.Size); EmitReadZxCall(Context, Op.Size);
@ -68,7 +74,7 @@ namespace ChocolArm64.Instruction
if (Pair) if (Pair)
{ {
Context.EmitLdarg(ATranslatedSub.MemoryArgIdx); Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
Context.EmitLdint(Op.Rn); Context.EmitLdtmp();
Context.EmitLdc_I(8 << Op.Size); Context.EmitLdc_I(8 << Op.Size);
Context.Emit(OpCodes.Add); Context.Emit(OpCodes.Add);
@ -104,7 +110,10 @@ namespace ChocolArm64.Instruction
{ {
AOpCodeMemEx Op = (AOpCodeMemEx)Context.CurrOp; AOpCodeMemEx Op = (AOpCodeMemEx)Context.CurrOp;
if (AccType.HasFlag(AccessType.Ordered)) bool Ordered = (AccType & AccessType.Ordered) != 0;
bool Exclusive = (AccType & AccessType.Exclusive) != 0;
if (Ordered)
{ {
EmitBarrier(Context); EmitBarrier(Context);
} }
@ -112,7 +121,7 @@ namespace ChocolArm64.Instruction
AILLabel LblEx = new AILLabel(); AILLabel LblEx = new AILLabel();
AILLabel LblEnd = new AILLabel(); AILLabel LblEnd = new AILLabel();
if (AccType.HasFlag(AccessType.Exclusive)) if (Exclusive)
{ {
EmitMemoryCall(Context, nameof(AMemory.TestExclusive), Op.Rn); EmitMemoryCall(Context, nameof(AMemory.TestExclusive), Op.Rn);
@ -145,7 +154,7 @@ namespace ChocolArm64.Instruction
EmitWriteCall(Context, Op.Size); EmitWriteCall(Context, Op.Size);
} }
if (AccType.HasFlag(AccessType.Exclusive)) if (Exclusive)
{ {
Context.EmitLdc_I8(0); Context.EmitLdc_I8(0);
Context.EmitStintzr(Op.Rs); Context.EmitStintzr(Op.Rs);